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* Changed physical_entry::{address,size} to phys_{addr,size}_t and changed

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map_physical_memory()'s physicalAddress parameter type from void* to
  phys_addr_t. This breaks source compatibility, but -- as long as
  phys_{addr,size}_t remain 32 bit wide -- keeps binary compatibility with
  BeOS.
* Adjusted all code using the affected interfaces (Oh what fun!). Added a few
  TODOs in places where the wrong types (e.g. void* for physical addresses
  are used). Looks like quite a few drivers aren't 64 bit safe and others
  will break with PAE.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36960 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Ingo Weinhold
2010-05-27 22:07:27 +00:00
parent 1716472d36
commit 64d79eff72
86 changed files with 1378 additions and 1334 deletions
Download Patch File Download Diff File Expand all files Collapse all files
headers/os/drivers/KernelExport.h
+3 -3
View File
@@ -79,8 +79,8 @@ struct timer {
#define B_READ_DEVICE 0x00000002
typedef struct {
void *address; /* address in physical memory */
ulong size; /* size of block */
phys_addr_t address; /* address in physical memory */
phys_size_t size; /* size of block */
} physical_entry;
/* address specifications for mapping physical memory */
@@ -156,7 +156,7 @@ extern status_t get_memory_map_etc(team_id team, const void *address,
extern long get_memory_map(const void *buffer, ulong size,
physical_entry *table, long numEntries);
extern area_id map_physical_memory(const char *areaName,
void *physicalAddress, size_t size, uint32 flags,
phys_addr_t physicalAddress, size_t size, uint32 flags,
uint32 protection, void **_mappedAddress);
/* kernel debugging facilities */
headers/private/graphics/intel_extreme/AreaKeeper.h
+2 -2
View File
@@ -60,8 +60,8 @@ area_id
AreaKeeper::Map(const char *name, void *physicalAddress, size_t numBytes,
uint32 spec, uint32 protection, void **_virtualAddress)
{
fArea = map_physical_memory(name, physicalAddress, numBytes, spec, protection,
_virtualAddress);
fArea = map_physical_memory(name, (addr_t)physicalAddress, numBytes, spec,
protection, _virtualAddress);
return fArea;
}
headers/private/graphics/radeon_hd/AreaKeeper.h
+2 -2
View File
@@ -60,8 +60,8 @@ area_id
AreaKeeper::Map(const char *name, void *physicalAddress, size_t numBytes,
uint32 spec, uint32 protection, void **_virtualAddress)
{
fArea = map_physical_memory(name, physicalAddress, numBytes, spec, protection,
_virtualAddress);
fArea = map_physical_memory(name, (addr_t)physicalAddress, numBytes, spec,
protection, _virtualAddress);
return fArea;
}
src/add-ons/kernel/bus_managers/acpi/acpi_busman.c
+2 -2
View File
@@ -584,7 +584,7 @@ prepare_sleep_state(uint8 state, void (*wakeFunc)(void), size_t size)
if (status != B_OK)
return status;
status = AcpiSetFirmwareWakingVector((addr_t)wakeVector.address);
status = AcpiSetFirmwareWakingVector(wakeVector.address);
if (status != AE_OK)
return B_ERROR;
}
@@ -626,7 +626,7 @@ reboot(void)
status = AcpiReset();
if (status == AE_NOT_EXIST)
return B_UNSUPPORTED;
if (status != AE_OK) {
ERROR("Reset failed, status = %d\n", status);
return B_ERROR;
src/add-ons/kernel/bus_managers/acpi/oshaiku.c
+2 -3
View File
@@ -439,9 +439,8 @@ AcpiOsMapMemory(ACPI_PHYSICAL_ADDRESS where, ACPI_SIZE length)
{
#ifdef _KERNEL_MODE
void *there;
area_id area = map_physical_memory("acpi_physical_mem_area", (void *)where,
length, B_ANY_KERNEL_ADDRESS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, &there);
area_id area = map_physical_memory("acpi_physical_mem_area", where, length,
B_ANY_KERNEL_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, &there);
DEBUG_FUNCTION_F("addr: 0x%08lx; length: %lu; mapped: %p; area: %ld",
(addr_t)where, (size_t)length, there, area);
src/add-ons/kernel/bus_managers/agp_gart/agp_gart.cpp
+4 -3
View File
@@ -640,7 +640,7 @@ Aperture::BindMemory(aperture_memory *memory, addr_t address, size_t size)
TRACE("bind %ld bytes at %lx\n", size, base);
for (addr_t offset = 0; offset < size; offset += B_PAGE_SIZE) {
addr_t physicalAddress = 0;
phys_addr_t physicalAddress = 0;
status_t status;
if (!physical) {
@@ -650,7 +650,7 @@ Aperture::BindMemory(aperture_memory *memory, addr_t address, size_t size)
if (status < B_OK)
return status;
physicalAddress = (addr_t)entry.address;
physicalAddress = entry.address;
} else {
#ifdef __HAIKU__
uint32 index = offset >> PAGE_SHIFT;
@@ -1008,6 +1008,7 @@ static status_t
allocate_memory(aperture_id id, size_t size, size_t alignment, uint32 flags,
addr_t *_apertureBase, addr_t *_physicalBase)
{
// TODO: _physicalBase should be a phys_addr_t*!
if ((flags & ~APERTURE_PUBLIC_FLAGS_MASK) != 0 || _apertureBase == NULL)
return B_BAD_VALUE;
@@ -1042,7 +1043,7 @@ allocate_memory(aperture_id id, size_t size, size_t alignment, uint32 flags,
return status;
}
*_physicalBase = (addr_t)entry.address;
*_physicalBase = entry.address;
#endif
}
src/add-ons/kernel/bus_managers/ata/ATAChannel.cpp
+1 -1
View File
@@ -974,7 +974,7 @@ ATAChannel::_TransferPIOBlock(ATARequest *request, size_t length,
uint32 currentLength = MIN(entry->size - offset, length);
status_t result = _TransferPIOPhysical(request,
(addr_t)entry->address + offset, currentLength, transferred);
entry->address + offset, currentLength, transferred);
if (result != B_OK) {
request->SetSense(SCSIS_KEY_HARDWARE_ERROR,
SCSIS_ASC_INTERNAL_FAILURE);
src/add-ons/kernel/bus_managers/ata/ATAHelper.cpp
+4 -4
View File
@@ -50,11 +50,11 @@ copy_sg_data(scsi_ccb *ccb, uint offset, uint allocationLength,
bytes = MIN(bytes, sgList->size);
if (toBuffer) {
vm_memcpy_from_physical(buffer, (addr_t)sgList->address + offset,
bytes, false);
vm_memcpy_from_physical(buffer, sgList->address + offset, bytes,
false);
} else {
vm_memcpy_to_physical((addr_t)sgList->address + offset, buffer,
bytes, false);
vm_memcpy_to_physical(sgList->address + offset, buffer, bytes,
false);
}
buffer = (char *)buffer + bytes;
src/add-ons/kernel/bus_managers/firewire/util.c
+4 -3
View File
@@ -37,6 +37,7 @@ area_id
alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void *virtadr;
area_id area;
@@ -61,7 +62,7 @@ alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
if (virt)
*virt = virtadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
TRACE("area = %ld, size = %ld, virt = %p, phy = %p\n", area, size, virtadr,
pe.address);
return area;
@@ -83,8 +84,8 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection,
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS,
protection, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
if (area < B_OK) {
ERROR("mapping '%s' failed, error 0x%lx (%s)\n", name, area,
strerror(area));
src/add-ons/kernel/bus_managers/ide/emulation.c
+4 -4
View File
@@ -95,11 +95,11 @@ copy_sg_data(scsi_ccb *request, uint offset, uint allocationLength,
buffer, (void *)(sgList->address + offset), (int)bytes, toBuffer);
if (toBuffer) {
vm_memcpy_from_physical(buffer, (addr_t)sgList->address + offset,
bytes, false);
vm_memcpy_from_physical(buffer, sgList->address + offset, bytes,
false);
} else {
vm_memcpy_to_physical((addr_t)sgList->address + offset, buffer,
bytes, false);
vm_memcpy_to_physical(sgList->address + offset, buffer, bytes,
false);
}
buffer = (char *)buffer + bytes;
src/add-ons/kernel/bus_managers/scsi/dma_buffer.c
+15 -18
View File
@@ -56,29 +56,28 @@ is_sg_list_dma_safe(scsi_ccb *request)
// argh - controller is a bit picky, so make sure he likes us
for (cur_idx = sg_count; cur_idx >= 1; --cur_idx, ++sg_list) {
addr_t max_len;
phys_addr_t max_len;
// calculate space upto next dma boundary crossing and
// verify that it isn't crossed
max_len = (dma_boundary + 1) -
((addr_t)sg_list->address & dma_boundary);
max_len = (dma_boundary + 1) - (sg_list->address & dma_boundary);
if (max_len < sg_list->size) {
SHOW_FLOW(0, "S/G-entry crosses DMA boundary @0x%x",
(int)sg_list->address + (int)max_len);
SHOW_FLOW(0, "S/G-entry crosses DMA boundary @%" B_PRIxPHYSADDR,
sg_list->address + max_len);
return false;
}
// check both begin and end of entry for alignment
if (((addr_t)sg_list->address & alignment) != 0) {
SHOW_FLOW(0, "S/G-entry has bad alignment @0x%x",
(int)sg_list->address);
if ((sg_list->address & alignment) != 0) {
SHOW_FLOW(0, "S/G-entry has bad alignment @%#" B_PRIxPHYSADDR,
sg_list->address);
return false;
}
if ((((addr_t)sg_list->address + sg_list->size) & alignment) != 0) {
SHOW_FLOW(0, "end of S/G-entry has bad alignment @0x%x",
(int)sg_list->address + (int)sg_list->size);
if (((sg_list->address + sg_list->size) & alignment) != 0) {
SHOW_FLOW(0, "end of S/G-entry has bad alignment @%" B_PRIxPHYSADDR,
sg_list->address + sg_list->size);
return false;
}
@@ -118,12 +117,10 @@ scsi_copy_dma_buffer(scsi_ccb *request, uint32 size, bool to_buffer)
bytes = min( size, sg_list->size );
if (to_buffer) {
vm_memcpy_from_physical(buffer_data, (addr_t)sg_list->address,
bytes, false);
} else {
vm_memcpy_to_physical((addr_t)sg_list->address, buffer_data,
bytes, false);
}
vm_memcpy_from_physical(buffer_data, sg_list->address, bytes,
false);
} else
vm_memcpy_to_physical(sg_list->address, buffer_data, bytes, false);
buffer_data += bytes;
}
@@ -345,7 +342,7 @@ dump_sg_table(const physical_entry *sg_list,
SHOW_FLOW(1, "count=%d", (int)sg_list_count);
for (cur_idx = sg_list_count; cur_idx >= 1; --cur_idx, ++sg_list) {
SHOW_FLOW(1, "addr=%x, size=%d", (int)sg_list->address,
SHOW_FLOW(1, "addr=%" B_PRIxPHYSADDR ", size=%d", sg_list->address,
(int)sg_list->size);
}
}
src/add-ons/kernel/bus_managers/scsi/emulation.c
+8 -7
View File
@@ -54,7 +54,8 @@ status_t
scsi_init_emulation_buffer(scsi_device_info *device, size_t buffer_size)
{
physical_entry map[1];
addr_t unaligned_phys, aligned_phys, aligned_addr, unaligned_addr;
phys_addr_t unaligned_phys, aligned_phys;
addr_t aligned_addr, unaligned_addr;
size_t total_size;
SHOW_FLOW0(3, "");
@@ -82,7 +83,7 @@ scsi_init_emulation_buffer(scsi_device_info *device, size_t buffer_size)
get_memory_map((void *)unaligned_addr, B_PAGE_SIZE, map, 1);
// get aligned part
unaligned_phys = (addr_t)map[0].address;
unaligned_phys = map[0].address;
aligned_phys = (unaligned_phys + buffer_size - 1) & ~(buffer_size - 1);
aligned_addr = unaligned_addr + (aligned_phys - unaligned_phys);
@@ -490,14 +491,14 @@ copy_sg_data(scsi_ccb *request, uint offset, uint allocation_length,
bytes = min(bytes, sg_list->size);
SHOW_FLOW(0, "buffer = %p, virt_addr = %#lx, bytes = %lu, to_buffer = %d",
buffer, (addr_t)sg_list->address + offset, bytes, to_buffer);
buffer, sg_list->address + offset, bytes, to_buffer);
if (to_buffer) {
vm_memcpy_from_physical(buffer, (addr_t)sg_list->address + offset,
bytes, false);
vm_memcpy_from_physical(buffer, sg_list->address + offset, bytes,
false);
} else {
vm_memcpy_to_physical((addr_t)sg_list->address + offset, buffer,
bytes, false);
vm_memcpy_to_physical(sg_list->address + offset, buffer, bytes,
false);
}
buffer = (char *)buffer + bytes;
src/add-ons/kernel/bus_managers/scsi/scatter_gather.c
+7 -5
View File
@@ -59,13 +59,14 @@ fill_temp_sg(scsi_ccb *ccb)
// calculate space upto next dma boundary crossing
max_len = (dma_boundary + 1) -
((addr_t)temp_sg[cur_idx].address & dma_boundary);
(temp_sg[cur_idx].address & dma_boundary);
// restrict size per sg item
max_len = min(max_len, max_sg_block_size);
SHOW_FLOW(4, "addr=%p, size=%x, max_len=%x, idx=%d, num=%d",
temp_sg[cur_idx].address, (int)temp_sg[cur_idx].size,
(int)max_len, (int)cur_idx, (int)num_entries);
SHOW_FLOW(4, "addr=%#" B_PRIxPHYSADDR ", size=%x, max_len=%x, "
"idx=%d, num=%d", temp_sg[cur_idx].address,
(int)temp_sg[cur_idx].size, (int)max_len, (int)cur_idx,
(int)num_entries);
if (max_len < temp_sg[cur_idx].size) {
// split sg block
@@ -76,7 +77,8 @@ fill_temp_sg(scsi_ccb *ccb)
(num_entries - 1 - cur_idx) * sizeof(physical_entry));
temp_sg[cur_idx].size = max_len;
temp_sg[cur_idx + 1].address = (void *)((addr_t)temp_sg[cur_idx + 1].address + max_len);
temp_sg[cur_idx + 1].address
= temp_sg[cur_idx + 1].address + max_len;
temp_sg[cur_idx + 1].size -= max_len;
}
}
src/add-ons/kernel/bus_managers/scsi/virtual_memory.c
+2 -1
View File
@@ -94,7 +94,8 @@ get_iovec_memory_map(iovec *vec, size_t vec_count, size_t vec_offset, size_t len
// try to combine with previous sg block
if (cur_num_entries > 0 && cur_idx > 0
&& map[cur_idx].address == (char *)map[cur_idx - 1].address + map[cur_idx - 1].size) {
&& map[cur_idx].address
== map[cur_idx - 1].address + map[cur_idx - 1].size) {
SHOW_FLOW0( 3, "combine with previous chunk" );
map[cur_idx - 1].size += map[cur_idx].size;
memcpy(&map[cur_idx], &map[cur_idx + 1], (cur_num_entries - 1) * sizeof(map[0]));
src/add-ons/kernel/bus_managers/usb/PhysicalMemoryAllocator.cpp
+5 -3
View File
@@ -128,6 +128,7 @@ status_t
PhysicalMemoryAllocator::Allocate(size_t size, void **logicalAddress,
void **physicalAddress)
{
// TODO: physicalAddress should be a phys_addr_t*!
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
if (debug_debugger_running()) {
for (int32 i = 0; i < 64; i++) {
@@ -136,7 +137,7 @@ PhysicalMemoryAllocator::Allocate(size_t size, void **logicalAddress,
fDebugUseMap |= mask;
*logicalAddress = (void *)((uint8 *)fLogicalBase + fDebugBase
+ i * fDebugChunkSize);
*physicalAddress = (void *)((uint8 *)fPhysicalBase + fDebugBase
*physicalAddress = (void *)(fPhysicalBase + fDebugBase
+ i * fDebugChunkSize);
return B_OK;
}
@@ -199,7 +200,7 @@ PhysicalMemoryAllocator::Allocate(size_t size, void **logicalAddress,
_Unlock();
size_t offset = fBlockSize[arrayToUse] * i;
*logicalAddress = (void *)((uint8 *)fLogicalBase + offset);
*physicalAddress = (void *)((uint8 *)fPhysicalBase + offset);
*physicalAddress = (void *)(fPhysicalBase + offset);
return B_OK;
}
}
@@ -222,6 +223,7 @@ status_t
PhysicalMemoryAllocator::Deallocate(size_t size, void *logicalAddress,
void *physicalAddress)
{
// TODO: physicalAddress should be a phys_addr_t!
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
if (debug_debugger_running()) {
uint32 index = ((uint8 *)logicalAddress - (uint8 *)fLogicalBase
@@ -248,7 +250,7 @@ PhysicalMemoryAllocator::Deallocate(size_t size, void *logicalAddress,
if (logicalAddress)
offset = (uint32)logicalAddress - (uint32)fLogicalBase;
else if (physicalAddress)
offset = (uint32)physicalAddress - (uint32)fPhysicalBase;
offset = (addr_t)physicalAddress - fPhysicalBase;
else {
TRACE_ERROR(("PMA: no value given for either physical or logical address\n"));
return B_BAD_VALUE;
src/add-ons/kernel/bus_managers/usb/PhysicalMemoryAllocator.h
+1 -1
View File
@@ -50,7 +50,7 @@ private:
mutex fLock;
area_id fArea;
void *fLogicalBase;
void *fPhysicalBase;
phys_addr_t fPhysicalBase;
int32 fArrayCount;
size_t *fBlockSize;
src/add-ons/kernel/bus_managers/usb/Stack.cpp
+3 -2
View File
@@ -294,6 +294,7 @@ area_id
Stack::AllocateArea(void **logicalAddress, void **physicalAddress, size_t size,
const char *name)
{
// TODO: physicalAddress should be a phys_addr_t*!
TRACE("allocating %ld bytes for %s\n", size, name);
void *logAddress;
@@ -319,9 +320,9 @@ Stack::AllocateArea(void **logicalAddress, void **physicalAddress, size_t size,
*logicalAddress = logAddress;
if (physicalAddress)
*physicalAddress = physicalEntry.address;
*physicalAddress = (void*)(addr_t)physicalEntry.address;
TRACE("area = %ld, size = %ld, log = %p, phy = %p\n",
TRACE("area = %ld, size = %ld, log = %p, phy = %#" B_PRIxPHYSADDR "\n",
area, size, logAddress, physicalEntry.address);
return area;
}
src/add-ons/kernel/busses/agp_gart/intel_gart.cpp
+5 -5
View File
@@ -92,7 +92,7 @@ struct intel_info {
size_t aperture_size;
size_t aperture_stolen_size;
addr_t scratch_page;
phys_addr_t scratch_page;
area_id scratch_area;
};
@@ -165,7 +165,7 @@ determine_memory_sizes(intel_info &info, size_t &gttSize, size_t &stolenSize)
break;
case G4X_GTT_4M_IVT:
gttSize = 4 << 20;
break;
break;
}
} else {
// older models have the GTT as large as their frame buffer mapping
@@ -282,7 +282,7 @@ intel_map(intel_info &info)
mmioIndex = 0;
fbIndex = 2;
}
AreaKeeper mmioMapper;
info.registers_area = mmioMapper.Map("intel GMCH mmio",
(void *)info.display.u.h0.base_registers[mmioIndex],
@@ -352,7 +352,7 @@ intel_map(intel_info &info)
info.aperture_stolen_size = stolenSize;
if (info.aperture_size == 0)
info.aperture_size = info.display.u.h0.base_register_sizes[fbIndex];
dprintf("intel_gart: detected %ld MB of stolen memory, aperture "
"size %ld MB, GTT size %ld KB\n", (stolenSize + (1023 << 10)) >> 20,
info.aperture_size >> 20, gttSize >> 10);
@@ -380,7 +380,7 @@ intel_map(intel_info &info)
return info.aperture_area;
}
info.scratch_page = (addr_t)entry.address;
info.scratch_page = entry.address;
gttMapper.Detach();
mmioMapper.Detach();
src/add-ons/kernel/busses/ata/silicon_image_3112/silicon_image_3112.c
+6 -6
View File
@@ -94,7 +94,7 @@ typedef struct channel_data {
area_id prd_area;
prd_entry * prdt;
void * prdt_phys;
phys_addr_t prdt_phys;
uint32 dma_active;
uint32 lost;
} channel_data;
@@ -272,9 +272,9 @@ controller_init(device_node *node, void **_controllerCookie)
FLOW("controller %p\n", controller);
mmioArea = map_physical_memory("Silicon Image SATA regs",
(void *)mmioBase, kASICData[asicIndex].mmio_bar_size,
B_ANY_KERNEL_ADDRESS, 0, (void **)&mmioAddr);
mmioArea = map_physical_memory("Silicon Image SATA regs", mmioBase,
kASICData[asicIndex].mmio_bar_size, B_ANY_KERNEL_ADDRESS, 0,
(void **)&mmioAddr);
if (mmioArea < B_OK) {
TRACE("controller_init: mapping memory failed\n");
free(controller);
@@ -683,7 +683,7 @@ dma_prepare(void *channelCookie, const physical_entry *sg_list,
for (i = sg_list_count - 1, prd = channel->prdt; i >= 0;
--i, ++prd, ++sg_list ) {
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
sg_list->address));
(void*)(addr_t)sg_list->address));
// 0 means 64K - this is done automatically by discarding upper 16 bits
prd->count = B_HOST_TO_LENDIAN_INT16((uint16)sg_list->size);
@@ -695,7 +695,7 @@ dma_prepare(void *channelCookie, const physical_entry *sg_list,
// XXX move this to chan init?
temp = (*channel->bm_prdt_address) & 3;
temp |= B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
(void *)channel->prdt_phys)) & ~3;
(void *)(addr_t)channel->prdt_phys)) & ~3;
*channel->bm_prdt_address = temp;
*channel->dev_ctrl; // read altstatus to flush
src/add-ons/kernel/busses/ide/silicon_image_3112/silicon_image_3112.c
+6 -6
View File
@@ -103,7 +103,7 @@ typedef struct channel_data {
area_id prd_area;
prd_entry * prdt;
void * prdt_phys;
phys_addr_t prdt_phys;
uint32 dma_active;
uint32 lost;
} channel_data;
@@ -278,9 +278,9 @@ controller_init(device_node *node, void **_controllerCookie)
FLOW("controller %p\n", controller);
mmioArea = map_physical_memory("Silicon Image SATA regs",
(void *)mmioBase, kASICData[asicIndex].mmio_bar_size,
B_ANY_KERNEL_ADDRESS, 0, (void **)&mmioAddr);
mmioArea = map_physical_memory("Silicon Image SATA regs", mmioBase,
kASICData[asicIndex].mmio_bar_size, B_ANY_KERNEL_ADDRESS, 0,
(void **)&mmioAddr);
if (mmioArea < B_OK) {
TRACE("controller_init: mapping memory failed\n");
free(controller);
@@ -691,7 +691,7 @@ dma_prepare(void *channelCookie, const physical_entry *sg_list,
for (i = sg_list_count - 1, prd = channel->prdt; i >= 0;
--i, ++prd, ++sg_list ) {
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
sg_list->address));
(void*)(addr_t)sg_list->address));
// 0 means 64K - this is done automatically by discarding upper 16 bits
prd->count = B_HOST_TO_LENDIAN_INT16((uint16)sg_list->size);
@@ -703,7 +703,7 @@ dma_prepare(void *channelCookie, const physical_entry *sg_list,
// XXX move this to chan init?
temp = (*channel->bm_prdt_address) & 3;
temp |= B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
(void *)channel->prdt_phys)) & ~3;
(void *)(addr_t)channel->prdt_phys)) & ~3;
*channel->bm_prdt_address = temp;
*channel->dev_ctrl; // read altstatus to flush
src/add-ons/kernel/busses/scsi/53c8xx/53c8xx.c
+223 -223
View File
File diff suppressed because it is too large Load Diff
src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp
+5 -4
View File
@@ -452,10 +452,11 @@ AHCIPort::FillPrdTable(volatile prd *prdTable, int *prdCount, int prdMax,
*prdCount = 0;
while (sgCount > 0 && dataSize > 0) {
size_t size = min_c(sgTable->size, dataSize);
void *address = sgTable->address;
phys_addr_t address = sgTable->address;
T_PORT(AHCIPortPrdTable(fController, fIndex, address, size));
FLOW("FillPrdTable: sg-entry addr %p, size %lu\n", address, size);
if ((uint32)address & 1) {
FLOW("FillPrdTable: sg-entry addr %#" B_PRIxPHYSADDR ", size %lu\n",
address, size);
if (address & 1) {
TRACE("AHCIPort::FillPrdTable: data alignment error\n");
return B_ERROR;
}
@@ -475,7 +476,7 @@ AHCIPort::FillPrdTable(volatile prd *prdTable, int *prdCount, int prdMax,
prdTable->dbc = bytes - 1;
*prdCount += 1;
prdTable++;
address = (char *)address + bytes;
address = address + bytes;
size -= bytes;
}
sgTable++;
src/add-ons/kernel/busses/scsi/ahci/util.c
+7 -5
View File
@@ -25,6 +25,7 @@ area_id
alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * virtadr;
area_id areaid;
@@ -48,7 +49,7 @@ alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
if (virt)
*virt = virtadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
TRACE("area = %ld, size = %ld, virt = %p, phy = %p\n", areaid, size, virtadr, pe.address);
return areaid;
}
@@ -68,8 +69,8 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection,
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS,
protection, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
if (area < B_OK) {
ERROR("mapping '%s' failed, error 0x%lx (%s)\n", name, area, strerror(area));
return area;
@@ -92,9 +93,10 @@ sg_memcpy(const physical_entry *sgTable, int sgCount, const void *data,
for (i = 0; i < sgCount && dataSize > 0; i++) {
size_t size = min_c(dataSize, sgTable[i].size);
TRACE("sg_memcpy phyAddr %p, size %lu\n", sgTable[i].address, size);
TRACE("sg_memcpy phyAddr %#" B_PRIxPHYSADDR ", size %lu\n",
sgTable[i].address, size);
vm_memcpy_to_physical((addr_t)sgTable[i].address, data, size, false);
vm_memcpy_to_physical(sgTable[i].address, data, size, false);
data = (char *)data + size;
dataSize -= size;
src/add-ons/kernel/busses/scsi/buslogic/buslogic.c
+73 -73
View File
@@ -1,6 +1,6 @@
/*
** $Id: sim_buslogic.c,v 1.8 1998/04/21 00:54:52 swetland Exp $
**
**
** SCSI Interface Module for BusLogic MultiMaster Controllers
** Copyright 1998, Brian J. Swetland <swetland@frotz.net>
**
@@ -14,7 +14,7 @@
#include <KernelExport.h>
/*
** Debug options:
** Debug options:
*/
#define DEBUG_BUSLOGIC /* Print Debugging Messages */
#define xDEBUG_TRANSACTIONS
@@ -43,8 +43,8 @@
#endif
/* TODO:
**
** - endian issues: the MultiMaster is little endian, should use swap()
**
** - endian issues: the MultiMaster is little endian, should use swap()
** macro for PPC compatibility whenever exchanging addresses with it (DONE)
** - wrap phys addrs with ram_address()
** - support scatter-gather in the ccb_scsiio struct (DONE)
@@ -66,7 +66,7 @@
#include "buslogic.h"
/*
** Constants for the SIM
** Constants for the SIM
*/
#define SIM_VERSION 0x01
#define HBA_VERSION 0x01
@@ -119,13 +119,13 @@ scsi_int_dispatch(void *data)
if(intstat & BL_INT_RSTS){
kprintf("buslogic_irq: BUS RESET\n");
}
/* have we got mail? */
if(intstat & BL_INT_IMBL){
while(bl->in_boxes[bl->in_nextbox].completion_code){
bl_ccb = (BL_CCB32 *)
PhysToVirt(unLE(bl->in_boxes[bl->in_nextbox].ccb_phys));
#ifdef VERBOSE_IRQ
kprintf("buslogic_irq: CCB %08x (%08x) done, cc=0x%02x\n",
unLE(bl->in_boxes[bl->in_nextbox].ccb_phys), (uint32) bl_ccb,
@@ -141,12 +141,12 @@ scsi_int_dispatch(void *data)
/* acknowledge the irq */
outb(BL_CONTROL_REG, BL_CONTROL_RINT);
return B_HANDLED_INTERRUPT;
}
/* Execute a command, with optional params send (in[in_len]) and
/* Execute a command, with optional params send (in[in_len]) and
** results received (out[out_len])
*/
static int bl_execute(BusLogic *bl, uchar command,
@@ -158,18 +158,18 @@ static int bl_execute(BusLogic *bl, uchar command,
#ifdef TIMEOUT
int timeout;
#endif
_in = (uchar *) in;
_out = (uchar *) out;
if(!(inb(BL_STATUS_REG) & BL_STATUS_HARDY)) {
d_printf("buslogic: command 0x%02x %d/%d, not ready\n",
command, in_len, out_len);
command, in_len, out_len);
return 1;
}
outb(BL_COMMAND_REG, command);
#ifdef TIMEOUT
timeout = 100;
#endif
@@ -197,7 +197,7 @@ static int bl_execute(BusLogic *bl, uchar command,
}
#ifdef TIMEOUT
timeout = 100;
timeout = 100;
#endif
while(out_len){
status = inb(BL_STATUS_REG);
@@ -239,7 +239,7 @@ static int bl_execute(BusLogic *bl, uchar command,
return 0;
}
/* Initialize the BT-9X8 and confirm that it is operating as expected
/* Initialize the BT-9X8 and confirm that it is operating as expected
*/
static long init_buslogic(BusLogic *bl)
{
@@ -247,7 +247,7 @@ static long init_buslogic(BusLogic *bl)
uchar id[16];
int i;
char *str = bl->productname;
d_printf("buslogic: init_buslogic()\n");
dprintf("buslogic: reset: ");
@@ -278,21 +278,21 @@ static long init_buslogic(BusLogic *bl)
dprintf(" TIMEOUT\n");
return -1;
}
if(bl_execute(bl, 0x04, NULL, 0, id, 4)){
d_printf("buslogic: can't id?\n");
return B_ERROR;
}
}
d_printf("buslogic: Firmware Rev %c.%c\n",id[2],id[3]);
id[0]=14;
id[14]=id[2];
if(bl_execute(bl, 0x8d, id, 1, id, 14)){
d_printf("buslogic: cannot read extended config\n");
return B_ERROR;
}
}
d_printf("buslogic: rev = %c.%c%c%c mb = %d, sgmax = %d, flags = 0x%02x\n",
id[14], id[10], id[11], id[12], id[4], id[2] | (id[3]<<8), id[13]);
if(id[13] & 0x01) bl->wide = 1;
@@ -316,14 +316,14 @@ static long init_buslogic(BusLogic *bl)
*str++ = 0;
} else {
strcpy(str,"unknown");
}
}
if(bl_execute(bl, 0x0B, NULL, 0, id, 3)){
d_printf("buslogic: cannot read config\n");
return B_ERROR;
}
bl->scsi_id = id[2];
d_printf("buslogic: Adapter SCSI ID = %d\n",bl->scsi_id);
if(install_io_interrupt_handler(bl->irq, scsi_int_dispatch, bl, 0)
== B_ERROR) d_printf("buslogic: can't install irq handler\n");
@@ -338,7 +338,7 @@ static long init_buslogic(BusLogic *bl)
d_printf("buslogic: interrupt test failed\n");
return B_ERROR;
}
/* strict round-robin on */
id[0] = 0;
if(bl_execute(bl,0x8F, id, 1, NULL, 0)){
@@ -346,7 +346,7 @@ static long init_buslogic(BusLogic *bl)
return B_ERROR;
}
id[0] = bl->box_count;
{ int mbaddr = toLE(bl->phys_mailboxes);
memcpy(id + 1, &(mbaddr),4);
@@ -357,7 +357,7 @@ static long init_buslogic(BusLogic *bl)
}
d_printf("buslogic: %d mailboxes @ 0x%08xv/0x%08lxp\n",
bl->box_count, (uint) bl->out_boxes, bl->phys_mailboxes);
return B_NO_ERROR;
}
@@ -376,7 +376,7 @@ static long sim_invalid(BusLogic *bl, CCB_HEADER *ccbh)
/* Convert a CCB_SCSIIO into a BL_CCB32 and (possibly SG array).
**
**
**
*/
@@ -392,13 +392,13 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
physical_entry *scratch;
uint32 tmp;
int i,t,req;
ccb = (CCB_SCSIIO *) ccbh;
#ifdef DEBUG_BUSLOGIC
req = atomic_add(&(bl->reqid),1);
#endif
/* valid cdb len? */
cdb_len = ccb->cam_cdb_len;
if (cdb_len != 6 && cdb_len != 10 && cdb_len != 12) {
@@ -420,10 +420,10 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
/* get contiguous area for bl_ccb in the private data area */
get_memory_map((void *)ccb->cam_sim_priv, 4096, entries, 2);
priv_phys = (uint32) entries[0].address;
priv = (BL_PRIV *) ccb->cam_sim_priv;
/* copy over the CDB */
if(ccb->cam_ch.cam_flags & CAM_CDB_POINTER) {
memcpy(bl_ccb->cdb, ccb->cam_cdb_io.cam_cdb_ptr, cdb_len);
@@ -446,7 +446,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
/* okay, this is really disgusting and could potentially
break if physical_entry{} changes format... we use the
sg list as a scratchpad. Disgusting, but a start */
scratch = (physical_entry *) priv->sg;
@@ -454,12 +454,12 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
/* we're using scatter gather -- things just got trickier */
iovec *iov = (iovec *) ccb->cam_data_ptr;
int j,sgcount = 0;
/* dprintf("buslogic: sg count = %d\n",ccb->cam_sglist_cnt);*/
/* multiple entries, use SG */
bl_ccb->opcode = BL_CCB_OP_INITIATE_RETLEN_SG;
bl_ccb->data = toLE(priv_phys + 256);
/* for each entry in the sglist we were given ... */
for(t=0,i=0;i<ccb->cam_sglist_cnt;i++){
/* map it ... */
@@ -472,12 +472,12 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
sgcount++;
dt_printf("buslogic/%d: SG %03d - 0x%08x (%d)\n",req,
j, (uint32) scratch[j].address, scratch[j].size);
tmp = priv->sg[j].length;
priv->sg[j].length = toLE(priv->sg[j].phys);
priv->sg[j].phys = toLE(tmp);
}
if(scratch[j].size) panic("egads! sgseg overrun in BusLogic SIM");
}
if(t != ccb->cam_dxfer_len){
@@ -493,7 +493,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
return B_ERROR;
}
/* total bytes in DataSegList */
bl_ccb->length_data = toLE(sgcount * 8);
bl_ccb->length_data = toLE(sgcount * 8);
} else {
get_memory_map((void *)ccb->cam_data_ptr, ccb->cam_dxfer_len, scratch,
MAX_SCATTER);
@@ -506,7 +506,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
t += scratch[i].size;
dt_printf("buslogic/%d: SG %03d - 0x%08x (%d)\n",req,
i, (uint32) scratch[i].address, scratch[i].size);
tmp = priv->sg[i].length;
priv->sg[i].length = toLE(priv->sg[i].phys);
priv->sg[i].phys = toLE(tmp);
@@ -514,7 +514,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
if(t != ccb->cam_dxfer_len){
dt_printf("buslogic/%d: error, %d != %d\n",req,t,ccb->cam_dxfer_len);
ccb->cam_ch.cam_status = CAM_REQ_INVALID;
/* put the CCB32 back on the freelist and release our lock */
acquire_sem(bl->ccb_lock);
bl_ccb->next = bl->first_ccb;
@@ -525,7 +525,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
}
/* total bytes in DataSegList */
bl_ccb->length_data = toLE(i * 8);
} else {
bl_ccb->opcode = BL_CCB_OP_INITIATE_RETLEN;
/* single entry, use direct */
@@ -533,17 +533,17 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
bl_ccb->data = toLE((uint32) scratch[0].address);
}
}
dt_printf("buslogic/%d: targ %d, dxfr %d, scsi op = 0x%02x\n",req,
bl_ccb->target_id, t, bl_ccb->cdb[0]);
acquire_sem(bl->hw_lock);
/* check for box in use state XXX */
bl->out_boxes[bl->out_nextbox].ccb_phys = toLE(bl_ccb_phys);
bl->out_boxes[bl->out_nextbox].action_code = BL_ActionCode_Start;
bl->out_nextbox++;
if(bl->out_nextbox == bl->box_count) bl->out_nextbox = 0;
if(bl->out_nextbox == bl->box_count) bl->out_nextbox = 0;
outb(BL_COMMAND_REG, 0x02);
#ifndef SERIALIZE_REQS
@@ -554,7 +554,7 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
acquire_sem(bl_ccb->done);
/* d_printf("buslogic/%d: CCB %08x (%08xv) done\n",
req, bl_ccb_phys, (uint32) bl_ccb);*/
#ifdef SERIALIZE_REQS
release_sem(bl->hw_lock);
#endif
@@ -579,21 +579,21 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
ccb->cam_ch.cam_status = CAM_UNCOR_PARITY;
break;
default:
ccb->cam_ch.cam_status = CAM_REQ_INVALID;
ccb->cam_ch.cam_status = CAM_REQ_INVALID;
}
dt_printf("buslogic/%d: error stat %02x\n",req,bl_ccb->btstat);
} else {
dt_printf("buslogic/%d: data %d/%d, sense %d/%d\n", req,
bl_ccb->length_data, ccb->cam_dxfer_len,
bl_ccb->length_sense, ccb->cam_sense_len);
ccb->cam_resid = bl_ccb->length_data;
/* under what condition should we do this? */
memcpy(ccb->cam_sense_ptr, priv->sensedata, ccb->cam_sense_len);
ccb->cam_scsi_status = bl_ccb->sdstat;
if(bl_ccb->sdstat == 02){
ccb->cam_ch.cam_status = CAM_REQ_CMP_ERR | CAM_AUTOSNS_VALID;
ccb->cam_sense_resid = 0;
@@ -609,10 +609,10 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
release_sem(bl->ccb_lock);
release_sem(bl->ccb_count);
return 0;
}
}
/* put the CCB32 back on the freelist and release our lock */
acquire_sem(bl->ccb_lock);
bl_ccb->next = bl->first_ccb;
@@ -623,16 +623,16 @@ static long sim_execute_scsi_io(BusLogic *bl, CCB_HEADER *ccbh)
}
/*
/*
** sim_path_inquiry returns info on the target/lun.
*/
static long sim_path_inquiry(BusLogic *bl, CCB_HEADER *ccbh)
{
CCB_PATHINQ *ccb;
d_printf("buslogic: sim_path_inquiry()\n");
ccb = (CCB_PATHINQ *) ccbh;
ccb->cam_version_num = SIM_VERSION;
ccb->cam_target_sprt = 0;
ccb->cam_hba_eng_cnt = 0;
@@ -655,7 +655,7 @@ static long sim_path_inquiry(BusLogic *bl, CCB_HEADER *ccbh)
static long sim_extended_path_inquiry(BusLogic *bl, CCB_HEADER *ccbh)
{
CCB_EXTENDED_PATHINQ *ccb;
sim_path_inquiry(bl, ccbh);
ccb = (CCB_EXTENDED_PATHINQ *) ccbh;
sprintf(ccb->cam_sim_version, "%d.0", SIM_VERSION);
@@ -763,9 +763,9 @@ static long sim_action(BusLogic *bl, CCB_HEADER *ccbh)
sim_terminate_process /* terminate an i/o process */
};
uchar op;
/* d_printf("buslogic: sim_execute(), op = %d\n", ccbh->cam_func_code); */
/* check for function codes out of range of dispatch table */
op = ccbh->cam_func_code;
if ((op >= sizeof (sim_functions) / sizeof (long (*)())) &&
@@ -774,7 +774,7 @@ static long sim_action(BusLogic *bl, CCB_HEADER *ccbh)
ccbh->cam_status = CAM_REQ_INVALID;
return -1;
}
ccbh->cam_status = CAM_REQ_INPROG;
if (op == XPT_EXTENDED_PATH_INQ) {
return sim_extended_path_inquiry(bl, ccbh);
@@ -787,7 +787,7 @@ static long sim_action(BusLogic *bl, CCB_HEADER *ccbh)
static char *hextab = "0123456789ABCDEF";
/*
** Allocate the actual memory for the cardinfo object
** Allocate the actual memory for the cardinfo object
*/
static BusLogic *create_cardinfo(int num, int iobase, int irq)
{
@@ -796,18 +796,18 @@ static BusLogic *create_cardinfo(int num, int iobase, int irq)
int i;
physical_entry entries[5];
char name[9] = { 'b', 'l', '_', 'c', 'c', 'b', '0', '0', 0 };
BusLogic *bl = (BusLogic *) malloc(sizeof(BusLogic));
#ifndef __INTEL__
i = map_physical_memory("bl_regs",(void*) iobase, 4096,
i = map_physical_memory("bl_regs", iobase, 4096,
B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA, &a);
iobase = (uint32) a;
if(i < 0) {
dprintf("buslogic: can't map registers...\n");
}
#endif
bl->id = num;
bl->iobase = iobase;
bl->irq = irq;
@@ -838,19 +838,19 @@ static BusLogic *create_cardinfo(int num, int iobase, int irq)
return NULL;
}
get_memory_map(a, 4096*5, entries, 2);
#endif
#endif
/* figure virtual <-> physical translations */
bl->phys_to_virt = ((uint) a) - ((uint) entries[0].address);
bl->virt_to_phys = (((uint) entries[0].address - (uint) a));
bl->phys_mailboxes = (uint) entries[0].address;
bl->phys_mailboxes = (uint) entries[0].address;
/* initialize all mailboxes to empty */
bl->out_boxes = (BL_Out_Mailbox32 *) a;
bl->in_boxes = (BL_In_Mailbox32 *) (a + (8 * bl->box_count));
for(i=0;i<bl->box_count;i++){
bl->out_boxes[i].action_code = BL_ActionCode_NotInUse;
bl->in_boxes[i].completion_code = BL_CompletionCode_NotInUse;
bl->in_boxes[i].completion_code = BL_CompletionCode_NotInUse;
}
/* setup the CCB32 cache */
@@ -858,7 +858,7 @@ static BusLogic *create_cardinfo(int num, int iobase, int irq)
bl->ccb = (BL_CCB32 *) (((uchar *)a) + 1024);
#else
bl->ccb = (BL_CCB32 *) (((uchar *)a) + 4096);
#endif
#endif
bl->first_ccb = NULL;
for(i=0;i<bl->box_count;i++){
name[6] = hextab[(i & 0xF0) >> 4];
@@ -867,12 +867,12 @@ static BusLogic *create_cardinfo(int num, int iobase, int irq)
bl->ccb[i].next = bl->first_ccb;
bl->first_ccb = &(bl->ccb[i]);
}
bl->hw_lock = create_sem(1, "bl_hw_lock");
bl->ccb_lock = create_sem(1, "bl_ccb_lock");
bl->ccb_count = create_sem(MAX_CCB_COUNT, "bl_ccb_count");
bl->reqid = 0;
return bl;
}
@@ -895,7 +895,7 @@ static long sim_action3(CCB_HEADER *ccbh) { return sim_action(cardinfo[3],ccbh)
static long (*sim_init_funcs[MAXCARDS])(void) = {
sim_init0, sim_init1, sim_init2, sim_init3
sim_init0, sim_init1, sim_init2, sim_init3
};
static long (*sim_action_funcs[MAXCARDS])(CCB_HEADER *) = {
@@ -914,7 +914,7 @@ sim_install_buslogic(void)
int cardcount = 0;
pci_info h;
CAM_SIM_ENTRY entry;
/* d_printf("buslogic: sim_install()\n"); */
for (i = 0; ; i++) {
@@ -938,8 +938,8 @@ sim_install_buslogic(void)
if((irq == 0) || (irq > 128)) {
dprintf("buslogic%d: bad irq %d\n",cardcount,irq);
continue;
}
}
if(cardcount == MAXCARDS){
d_printf("buslogic: too many controllers!\n");
return cardcount;
@@ -978,12 +978,12 @@ static status_t std_ops(int32 op, ...)
put_module(pci_name);
put_module(cam_name);
return B_ERROR;
case B_MODULE_UNINIT:
put_module(pci_name);
put_module(cam_name);
return B_OK;
default:
return B_ERROR;
}
src/add-ons/kernel/busses/usb/ehci.cpp
+1 -1
View File
@@ -154,7 +154,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
fPCIInfo->u.h0.base_register_sizes[0]);
fRegisterArea = map_physical_memory("EHCI memory mapped registers",
(void *)physicalAddress, mapSize, B_ANY_KERNEL_BLOCK_ADDRESS,
physicalAddress, mapSize, B_ANY_KERNEL_BLOCK_ADDRESS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_READ_AREA | B_WRITE_AREA,
(void **)&fCapabilityRegisters);
if (fRegisterArea < B_OK) {
src/add-ons/kernel/busses/usb/ohci.cpp
+2 -2
View File
@@ -101,7 +101,7 @@ OHCI::OHCI(pci_info *info, Stack *stack)
offset &= PCI_address_memory_32_mask;
TRACE_ALWAYS("iospace offset: 0x%lx\n", offset);
fRegisterArea = map_physical_memory("OHCI memory mapped registers",
(void *)offset, B_PAGE_SIZE, B_ANY_KERNEL_BLOCK_ADDRESS,
offset, B_PAGE_SIZE, B_ANY_KERNEL_BLOCK_ADDRESS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_READ_AREA | B_WRITE_AREA,
(void **)&fOperationalRegisters);
if (fRegisterArea < B_OK) {
@@ -1595,7 +1595,7 @@ OHCI::_CreateDescriptorChain(ohci_general_td **_firstDescriptor,
| OHCI_TD_BUFFER_ROUNDING
| OHCI_TD_SET_CONDITION_CODE(OHCI_TD_CONDITION_NOT_ACCESSED)
| OHCI_TD_SET_DELAY_INTERRUPT(OHCI_TD_INTERRUPT_NONE)
| OHCI_TD_TOGGLE_CARRY;
| OHCI_TD_TOGGLE_CARRY;
// link to previous
if (lastDescriptor)
src/add-ons/kernel/console/vga_text/vga_text.c
+1 -1
View File
@@ -41,7 +41,7 @@ text_init(void)
return -1;
}
map_physical_memory("video_mem", (void *)SCREEN_START, SCREEN_END - SCREEN_START,
map_physical_memory("video_mem", SCREEN_START, SCREEN_END - SCREEN_START,
B_ANY_KERNEL_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void *)&sOrigin);
dprintf("console/text: mapped vid mem to virtual address %p\n", sOrigin);
src/add-ons/kernel/drivers/audio/ac97/ali5451/util.c
+5 -4
View File
@@ -35,6 +35,7 @@ round_to_pagesize(uint32 size)
static area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void *logadr;
area_id areaid;
@@ -57,7 +58,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
return areaid;
}
@@ -97,7 +98,7 @@ void *
ali_mem_alloc(ali_dev *card, size_t size)
{
ali_mem *mem;
mem = ali_mem_new(card, size);
if (!mem)
return NULL;
@@ -112,13 +113,13 @@ void
ali_mem_free(ali_dev *card, void *ptr)
{
ali_mem *mem;
LIST_FOREACH(mem, &card->mems, next) {
if (mem->log_base != ptr)
continue;
LIST_REMOVE(mem, next);
ali_mem_delete(mem);
break;
}
src/add-ons/kernel/drivers/audio/ac97/auich/util.c
+4 -2
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id area;
@@ -90,7 +91,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr,
pe.address));
return area;
@@ -110,7 +111,8 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_ADDRESS, 0, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size, B_ANY_KERNEL_ADDRESS,
0, &mapadr);
*log = mapadr + offset;
LOG(("physical = %p, logical = %p, offset = %#x, phyadr = %p, mapadr = %p, size = %#x, area = %#x\n",
src/add-ons/kernel/drivers/audio/ac97/auvia/util.c
+2 -1
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -90,7 +91,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n",areaid,size,logadr,pe.address));
return areaid;
}
src/add-ons/kernel/drivers/audio/ac97/es1370/util.c
+4 -3
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -90,7 +91,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", areaid, size,
logadr, pe.address));
return areaid;
@@ -115,8 +116,8 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA, &mapadr);
*log = mapadr + offset;
LOG(("physical = %p, logical = %p, offset = %#x, phyadr = %p, mapadr = %p, size = %#x, area = %#x\n",
src/add-ons/kernel/drivers/audio/ac97/geode/geode_controller.cpp
+20 -20
View File
@@ -39,7 +39,7 @@ geode_codec_wait(geode_controller *controller)
int i;
#define GCSCAUDIO_WAIT_READY_CODEC_TIMEOUT 500
for (i = GCSCAUDIO_WAIT_READY_CODEC_TIMEOUT; (i >= 0)
for (i = GCSCAUDIO_WAIT_READY_CODEC_TIMEOUT; (i >= 0)
&& (controller->Read32(ACC_CODEC_CNTL) & ACC_CODEC_CNTL_CMD_NEW); i--)
snooze(10);
@@ -53,15 +53,15 @@ geode_codec_read(geode_controller *controller, uint8 regno)
uint32 v;
ASSERT(regno >= 0);
controller->Write32(ACC_CODEC_CNTL,
controller->Write32(ACC_CODEC_CNTL,
ACC_CODEC_CNTL_READ_CMD | ACC_CODEC_CNTL_CMD_NEW |
ACC_CODEC_REG2ADDR(regno));
if (geode_codec_wait(controller) != B_OK) {
dprintf("codec busy (2)\n");
return 0xffff;
}
#define GCSCAUDIO_READ_CODEC_TIMEOUT 50
for (i = GCSCAUDIO_READ_CODEC_TIMEOUT; i >= 0; i--) {
v = controller->Read32(ACC_CODEC_STATUS);
@@ -108,7 +108,7 @@ stream_handle_interrupt(geode_controller* controller, geode_stream* stream)
return;
status = stream->Read8(STREAM_STATUS);
if (status & ACC_BMx_STATUS_BM_EOP_ERR) {
dprintf("geode: stream status bus master error\n");
}
@@ -140,13 +140,13 @@ geode_interrupt_handler(geode_controller* controller)
return B_UNHANDLED_INTERRUPT;
for (uint32 index = 0; index < GEODE_MAX_STREAMS; index++) {
if (controller->streams[index]
if (controller->streams[index]
&& (intr & controller->streams[index]->status) != 0) {
stream_handle_interrupt(controller,
controller->streams[index]);
}
}
return B_HANDLED_INTERRUPT;
}
@@ -164,9 +164,9 @@ reset_controller(geode_controller* controller)
// stop streams
// stop DMA
// reset DMA position buffer
return B_OK;
}
@@ -246,9 +246,9 @@ geode_stream_start(geode_stream* stream)
else
value = ACC_BMx_CMD_READ;
stream->Write8(STREAM_CMD, value | ACC_BMx_CMD_BYTE_ORD_EL
stream->Write8(STREAM_CMD, value | ACC_BMx_CMD_BYTE_ORD_EL
| ACC_BMx_CMD_BM_CTL_ENABLE);
stream->running = true;
return B_OK;
}
@@ -262,7 +262,7 @@ geode_stream_stop(geode_stream* stream)
{
dprintf("geode_stream_stop()\n");
stream->Write8(STREAM_CMD, ACC_BMx_CMD_BM_CTL_DISABLE);
stream->running = false;
delete_sem(stream->buffer_ready_sem);
stream->buffer_ready_sem = -1;
@@ -274,13 +274,13 @@ geode_stream_stop(geode_stream* stream)
status_t
geode_stream_setup_buffers(geode_stream* stream, const char* desc)
{
uint32 bufferSize, bufferPhysicalAddress, alloc;
uint32 bufferSize, alloc;
uint32 index;
physical_entry pe;
struct acc_prd* bufferDescriptors;
uint8* buffer;
status_t rc;
/* Clear previously allocated memory */
if (stream->buffer_area >= B_OK) {
delete_area(stream->buffer_area);
@@ -317,7 +317,7 @@ geode_stream_setup_buffers(geode_stream* stream, const char* desc)
return rc;
}
bufferPhysicalAddress = (uint32)pe.address;
phys_addr_t bufferPhysicalAddress = pe.address;
dprintf("%s(%s): Allocated %lu bytes for %ld buffers\n", __func__, desc,
alloc, stream->num_buffers);
@@ -349,7 +349,7 @@ geode_stream_setup_buffers(geode_stream* stream, const char* desc)
return rc;
}
stream->physical_buffer_descriptors = (uint32)pe.address;
stream->physical_buffer_descriptors = pe.address;
dprintf("%s(%s): Allocated %ld bytes for %ld BDLEs\n", __func__, desc,
alloc, stream->num_buffers);
@@ -390,7 +390,7 @@ geode_hw_init(geode_controller* controller)
{
uint16 cmd;
status_t status;
cmd = (gPci->read_pci_config)(controller->pci_info.bus,
controller->pci_info.device, controller->pci_info.function, PCI_command, 2);
if (!(cmd & PCI_command_master)) {
@@ -416,12 +416,12 @@ geode_hw_init(geode_controller* controller)
goto reset_failed;
}
/* attach the codec */
ac97_attach(&controller->ac97, (codec_reg_read)geode_codec_read,
/* attach the codec */
ac97_attach(&controller->ac97, (codec_reg_read)geode_codec_read,
(codec_reg_write)geode_codec_write, controller,
controller->pci_info.u.h0.subsystem_vendor_id,
controller->pci_info.u.h0.subsystem_id);
snooze(1000);
controller->multi = (geode_multi*)calloc(1, sizeof(geode_multi));
src/add-ons/kernel/drivers/audio/ac97/ich/util.c
+4 -2
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **log, void **phy, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -90,7 +91,7 @@ alloc_mem(void **log, void **phy, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n",areaid,size,logadr,pe.address));
return areaid;
}
@@ -114,7 +115,8 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA, &mapadr);
*log = (char *)mapadr + offset;
LOG(("physical = %p, logical = %p, offset = %#x, phyadr = %p, mapadr = %p, size = %#x, area = %#x\n",
src/add-ons/kernel/drivers/audio/ac97/ichaudio/lala/util.c
+4 -2
View File
@@ -47,6 +47,7 @@ area_id
alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * virtadr;
area_id areaid;
@@ -71,7 +72,7 @@ alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
if (virt)
*virt = virtadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %ld, size = %ld, virt = %p, phy = %p\n", areaid, size, virtadr, pe.address));
return areaid;
}
@@ -95,7 +96,8 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection, const char *name
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
*virt = (char *)mapadr + offset;
LOG(("physical = %p, virtual = %p, offset = %ld, phyadr = %p, mapadr = %p, size = %ld, area = 0x%08lx\n",
src/add-ons/kernel/drivers/audio/cmedia/cm.c
+22 -21
View File
@@ -96,7 +96,7 @@ PCI_IO_WR (int offset, uint8 val)
/* detect presence of our hardware */
status_t
status_t
init_hardware(void)
{
int ix=0;
@@ -132,7 +132,7 @@ init_hardware(void)
io_base = area.address;
}
#endif
put_module(pci_name);
return err;
@@ -141,11 +141,11 @@ init_hardware(void)
void set_direct( cmedia_pci_dev * card, int regno, uchar value, uchar mask)
{
if (mask == 0)
if (mask == 0)
{
return;
}
if (mask != 0xff)
if (mask != 0xff)
{
uchar old = PCI_IO_RD(card->enhanced+regno);
value = (value&mask)|(old&~mask);
@@ -167,11 +167,11 @@ void set_indirect(cmedia_pci_dev * card, int regno, uchar value, uchar mask)
{
PCI_IO_WR(card->enhanced+0x23, regno);
EIEIO();
if (mask == 0)
if (mask == 0)
{
return;
}
if (mask != 0xff)
if (mask != 0xff)
{
uchar old = PCI_IO_RD(card->enhanced+0x22);
value = (value&mask)|(old&~mask);
@@ -254,7 +254,7 @@ set_default_registers(
0x1a, 0x00, 0x20, /* SPD32SEL disable */
0x1a, 0x00, 0x10, /* SPDFLOOPI disable */
0x1b, 0x04, 0x04, /* dual channel mode enable */
0x1a, 0x00, 0x80, /* Double DAC structure disable */
@@ -352,7 +352,7 @@ find_low_memory(
ddprintf(("cmedia_pci: no memory map\n"));
goto allocate;
}
if ((uint32)where.address & 0xff000000) {
if ((where.address & ~(phys_addr_t)0xffffff) != 0) {
ddprintf(("cmedia_pci: bad physical address\n"));
goto allocate;
}
@@ -360,7 +360,8 @@ find_low_memory(
ddprintf(("cmedia_pci: lock not contiguous\n"));
goto allocate;
}
dprintf("cmedia_pci: physical %p logical %p\n", where.address, ainfo.address);
dprintf("cmedia_pci: physical %#" B_PRIxPHYSADDR " logical %p\n",
where.address, ainfo.address);
goto a_o_k;
}
@@ -371,9 +372,9 @@ allocate:
}
ddprintf(("cmedia_pci: allocating new low area\n"));
curarea = create_area(name, &addr, B_ANY_KERNEL_ADDRESS,
curarea = create_area(name, &addr, B_ANY_KERNEL_ADDRESS,
trysize, B_LOMEM, B_READ_AREA | B_WRITE_AREA);
ddprintf(("cmedia_pci: create_area(%lx) returned %lx logical %p\n",
ddprintf(("cmedia_pci: create_area(%lx) returned %lx logical %p\n",
trysize, curarea, addr));
if (curarea < 0) {
goto oops;
@@ -384,12 +385,12 @@ allocate:
goto oops;
}
ddprintf(("cmedia_pci: physical %p\n", where.address));
if ((uint32)where.address & 0xff000000) {
if ((where.address & ~(phys_addr_t)0xffffff) != 0) {
delete_area(curarea);
curarea = B_ERROR;
goto oops;
}
if ((((uint32)where.address)+low_size) & 0xff000000) {
if (((where.address + low_size) & ~(phys_addr_t)0xffffff) != 0) {
delete_area(curarea);
curarea = B_ERROR;
goto oops;
@@ -408,7 +409,7 @@ a_o_k:
ddprintf(("cmedia_pci: successfully found or created low area!\n"));
card->low_size = low_size;
card->low_mem = addr;
card->low_phys = (vuchar *)where.address;
card->low_phys = (vuchar *)(addr_t)where.address;
card->map_low = curarea;
return B_OK;
}
@@ -461,7 +462,7 @@ setup_cmedia_pci(
dprintf("cmedia pci: can't setup DMA\n");
goto bail6;
}
set_default_registers(card);
//release_spinlock(&card->hardware);
@@ -470,7 +471,7 @@ setup_cmedia_pci(
return B_OK;
bail6:
// deallocate low memory
// deallocate low memory
bail5:
(*gameport->delete_device)(card->joy.driver);
bail4:
@@ -495,12 +496,12 @@ debug_cmedia(
dprintf("cmedia_pci: dude, you gotta watch your syntax!\n");
return -1;
}
dprintf("%s: enhanced registers at 0x%x\n", cards[ix].name,
dprintf("%s: enhanced registers at 0x%x\n", cards[ix].name,
cards[ix].enhanced);
dprintf("%s: open %ld dma_a at 0x%x dma_c 0x%x\n", cards[ix].pcm.name,
dprintf("%s: open %ld dma_a at 0x%x dma_c 0x%x\n", cards[ix].pcm.name,
cards[ix].pcm.open_count, cards[ix].pcm.dma_a, cards[ix].pcm.dma_c);
if (cards[ix].pcm.open_count) {
dprintf(" dma_a: 0x%lx+0x%lx dma_c: 0x%lx+0x%lx\n",
dprintf(" dma_a: 0x%lx+0x%lx dma_c: 0x%lx+0x%lx\n",
PCI_IO_RD_32((int)cards[ix].pcm.dma_a), PCI_IO_RD_32((int)cards[ix].pcm.dma_a+4),
PCI_IO_RD_32((int)cards[ix].pcm.dma_c), PCI_IO_RD_32((int)cards[ix].pcm.dma_c+4));
}
@@ -741,12 +742,12 @@ cmedia_pci_interrupt(
** But not bother setting the midi interrupt bit in the ISR.
** Thanks a lot, S3.
*/
if(handled == B_UNHANDLED_INTERRUPT){
if(handled == B_UNHANDLED_INTERRUPT){
if (midi_interrupt(card)) {
handled = B_INVOKE_SCHEDULER;
}
}
/* KTRACE(); / * */
release_spinlock(&card->hardware);
restore_interrupts(cp);
src/add-ons/kernel/drivers/audio/echo/util.c
+4 -2
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id area;
@@ -90,7 +91,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr,
pe.address));
return area;
@@ -110,7 +111,8 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (void*)((uint32)phy - offset);
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_ADDRESS, 0, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size, B_ANY_KERNEL_ADDRESS,
0, &mapadr);
*log = (void*) ((uint32)mapadr + offset);
LOG(("physical = %p, logical = %p, offset = %#x, phyadr = %p, mapadr = %p, size = %#x, area = %#x\n",
src/add-ons/kernel/drivers/audio/emuxki/util.c
+2 -1
View File
@@ -66,6 +66,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -90,7 +91,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n",areaid,size,logadr,pe.address));
return areaid;
}
src/add-ons/kernel/drivers/audio/hda/driver.h
+1 -1
View File
@@ -149,7 +149,7 @@ struct hda_stream {
uint32 sample_size;
uint8* buffers[STREAM_MAX_BUFFERS];
/* Virtual addresses for buffer */
uint32 physical_buffers[STREAM_MAX_BUFFERS];
phys_addr_t physical_buffers[STREAM_MAX_BUFFERS];
/* Physical addresses for buffer */
volatile bigtime_t real_time;
src/add-ons/kernel/drivers/audio/hda/hda_controller.cpp
+12 -9
View File
@@ -214,7 +214,7 @@ hda_interrupt_handler(hda_controller* controller)
codec->unsol_responses[codec->unsol_response_write++] =
response;
codec->unsol_response_write %= MAX_CODEC_UNSOL_RESPONSES;
release_sem_etc(codec->unsol_response_sem, 1,
release_sem_etc(codec->unsol_response_sem, 1,
B_DO_NOT_RESCHEDULE);
handled = B_INVOKE_SCHEDULER;
continue;
@@ -411,14 +411,17 @@ init_corb_rirb_pos(hda_controller* controller)
/* Program CORB/RIRB for these locations */
controller->Write32(HDAC_CORB_BASE_LOWER, (uint32)pe.address);
controller->Write32(HDAC_CORB_BASE_UPPER, 0);
controller->Write32(HDAC_CORB_BASE_UPPER,
(uint32)((uint64)pe.address >> 32));
controller->Write32(HDAC_RIRB_BASE_LOWER, (uint32)pe.address + rirbOffset);
controller->Write32(HDAC_RIRB_BASE_UPPER, 0);
controller->Write32(HDAC_RIRB_BASE_UPPER,
(uint32)(((uint64)pe.address + rirbOffset) >> 32));
/* Program DMA position update */
controller->Write32(HDAC_DMA_POSITION_BASE_LOWER,
(uint32)pe.address + posOffset);
controller->Write32(HDAC_DMA_POSITION_BASE_UPPER, 0);
controller->Write32(HDAC_DMA_POSITION_BASE_UPPER,
(uint32)(((uint64)pe.address + posOffset) >> 32));
controller->stream_positions = (uint32*)
((uint8*)controller->corb + posOffset);
@@ -567,7 +570,6 @@ status_t
hda_stream_setup_buffers(hda_audio_group* audioGroup, hda_stream* stream,
const char* desc)
{
uint32 bufferPhysicalAddress;
uint32 response[2];
physical_entry pe;
bdl_entry_t* bufferDescriptors;
@@ -635,7 +637,7 @@ hda_stream_setup_buffers(hda_audio_group* audioGroup, hda_stream* stream,
return rc;
}
bufferPhysicalAddress = (uint32)pe.address;
phys_addr_t bufferPhysicalAddress = pe.address;
dprintf("%s(%s): Allocated %lu bytes for %ld buffers\n", __func__, desc,
alloc, stream->num_buffers);
@@ -678,8 +680,9 @@ hda_stream_setup_buffers(hda_audio_group* audioGroup, hda_stream* stream,
uint32 fragments = 0;
for (uint32 index = 0; index < stream->num_buffers;
index++, bufferDescriptors++) {
bufferDescriptors->lower = stream->physical_buffers[index];
bufferDescriptors->upper = 0;
bufferDescriptors->lower = (uint32)stream->physical_buffers[index];
bufferDescriptors->upper
= (uint32)((uint64)stream->physical_buffers[index] >> 32);
fragments++;
bufferDescriptors->length = stream->buffer_size;
bufferDescriptors->ioc = 1;
@@ -780,7 +783,7 @@ hda_hw_init(hda_controller* controller)
/* Map MMIO registers */
controller->regs_area = map_physical_memory("hda_hw_regs",
(void*)controller->pci_info.u.h0.base_registers[0],
controller->pci_info.u.h0.base_registers[0],
controller->pci_info.u.h0.base_register_sizes[0], B_ANY_KERNEL_ADDRESS,
0, (void**)&controller->regs);
if (controller->regs_area < B_OK) {
src/add-ons/kernel/drivers/audio/ice1712/util.c
+2 -1
View File
@@ -48,6 +48,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **phy, void **log, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -72,7 +73,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
TRACE("area = %d, size = %#08X, log = %#08X, phy = %#08X\n", (int)areaid, (int)size, (int)logadr, (int)pe.address);
return areaid;
}
src/add-ons/kernel/drivers/audio/sis7018/sis7018.c
+50 -50
View File
@@ -7,7 +7,7 @@
*/
#include <stdio.h> //sprintf
#include <string.h>
#include <unistd.h> //posix file i/o - create, write, close
#include <unistd.h> //posix file i/o - create, write, close
#include <driver_settings.h>
#include "sis7018.h"
#include "sis7018hw.h"
@@ -44,8 +44,8 @@ static sem_id loglock;
static void reload_sis7018_setting()
{
void *settingshandle;
settingshandle = load_driver_settings(CHIPNAME);
void *settingshandle;
settingshandle = load_driver_settings(CHIPNAME);
#if !DEBUG
b_log = get_driver_boolean_parameter(settingshandle, "debug_output", b_log, true);
#endif
@@ -109,14 +109,14 @@ card_type card_types[]=
{{SPA_PCI_ID}, "SiS 7018"},
};
#ifdef DEBUG
int _assert_(char *a, int b, char *c)
#ifdef DEBUG
int _assert_(char *a, int b, char *c)
{
char sz[1024];
sprintf(sz, CHIPNAME":tripped assertion in %s/%d (%s)", a, b, c);
TRACE("tripped assertion in %s/%d (%s)\n", a, b, c);
kernel_debugger(sz);
return 0;
TRACE("tripped assertion in %s/%d (%s)\n", a, b, c);
kernel_debugger(sz);
return 0;
}
#endif
@@ -159,17 +159,17 @@ static status_t setup_hardware( sis7018_dev * card)
#endif //DO_MIDI
make_device_names(card);
command_reg = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function,
PCI_command, 2);
command_reg = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function,
PCI_command, 2);
// TRACE("PCI command config was: %lx\n", command_reg);
command_reg |= PCI_command_io | PCI_command_memory | PCI_command_master;
command_reg |= PCI_command_io | PCI_command_memory | PCI_command_master;
(*pci->write_pci_config)(card->info.bus, card->info.device, card->info.function,
PCI_command, 2, command_reg);
PCI_command, 2, command_reg);
// TRACE("PCI command config set to: %lx\n", command_reg);
if(use_io_regs)
{
{
card->io_base = card->info.u.h0.base_registers[0];
TRACE("%s base at %x\n", card->name, card->io_base);
}
@@ -177,9 +177,9 @@ static status_t setup_hardware( sis7018_dev * card)
{
TRACE("%s memory %lx length %lx\n", card->name, card->info.u.h0.base_registers[1], card->info.u.h0.base_register_sizes[1]);
card->regs_area = map_physical_memory("Regs sis7018",
(void *)card->info.u.h0.base_registers[1],
card->info.u.h0.base_register_sizes[1],
B_ANY_KERNEL_ADDRESS,
card->info.u.h0.base_registers[1],
card->info.u.h0.base_register_sizes[1],
B_ANY_KERNEL_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
&card->regs_mem_base);
@@ -189,7 +189,7 @@ static status_t setup_hardware( sis7018_dev * card)
err = hw_initialize(card);
return err;
#if DO_MIDI
#if DO_MIDI
bail3:
#endif //DO_MIDI
delete_sem(card->pcm.init_sem);
@@ -200,18 +200,18 @@ bail:
#if DEBUG
static int debug_sis7018(int argc, char * argv[])
{
int err = (argc < 2 || argc > 3);
int err = (argc < 2 || argc > 3);
int card_id = 0;
if(!err)
{
if(argc == 3)
card_id = parse_expression(argv[2]);
if(card_id < 0 || card_id > num_cards-1)
{
kprintf("ERROR: Wrong card_id: %d\n", card_id);
kprintf("\n");
kprintf("ERROR: Wrong card_id: %d\n", card_id);
kprintf("\n");
err = 1;
}
else
@@ -227,26 +227,26 @@ static int debug_sis7018(int argc, char * argv[])
default:
kprintf("ERROR: Wrong command: %s\n",argv[1]);
kprintf("\n");
err=1;
err=1;
break;
}
}
}
if (err)
{
kprintf("Syntax: "CHIPNAME" < command > [card id]\n");
kprintf(" - where commands is:\n");
kprintf(" d - dump device info\n");
kprintf(" i - dump pci_info\n");
kprintf(" p - dump pcm info\n");
kprintf(" m - dump midi info\n");
kprintf(" c - dump playback channel info\n");
kprintf(" a - dump AC'97 registers info\n");
kprintf(" - and card id is zero-based id of card to be investigated\n");
if (err)
{
kprintf("Syntax: "CHIPNAME" < command > [card id]\n");
kprintf(" - where commands is:\n");
kprintf(" d - dump device info\n");
kprintf(" i - dump pci_info\n");
kprintf(" p - dump pcm info\n");
kprintf(" m - dump midi info\n");
kprintf(" c - dump playback channel info\n");
kprintf(" a - dump AC'97 registers info\n");
kprintf(" - and card id is zero-based id of card to be investigated\n");
kprintf(" default card id is 0\n");
kprintf(" current cards count is %ld\n", num_cards);
kprintf("\n");
kprintf(" current cards count is %ld\n", num_cards);
kprintf("\n");
}
return 0;
@@ -265,7 +265,7 @@ status_t init_hardware (void)
status_t err = ENODEV;
TRACE("init_hardware()\n");
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci))
return ENOSYS;
@@ -279,7 +279,7 @@ status_t init_hardware (void)
}
ix++;
}
put_module(B_PCI_MODULE_NAME);
return err;
}
@@ -294,7 +294,7 @@ init_driver(void)
reload_sis7018_setting();
create_log();
TRACE("\n>>> init_driver()\n");
if (get_module(B_PCI_MODULE_NAME, (module_info **) &pci))
@@ -321,7 +321,7 @@ init_driver(void)
TRACE_ALWAYS("Too many cards installed! Only %d will be used.\n", NUM_CARDS);
break;
}
memset(&cards[num_cards], 0, sizeof(sis7018_dev));
cards[num_cards].info = info;
cards[num_cards].type = &card_types[jx];
@@ -331,7 +331,7 @@ init_driver(void)
}
else
num_cards++;
TRACE_ALWAYS("%s <vendor:%x, card:%x> found.\n",
card_types[jx].chip_name,
card_types[jx].ids.ids.vendor_id,
@@ -339,10 +339,10 @@ init_driver(void)
}
ix++;
}
if (!num_cards)
{
#if DO_MIDI
#if DO_MIDI
put_module(B_MPU_401_MODULE_NAME);
#endif //DO_MIDI
put_module(B_PCI_MODULE_NAME);
@@ -377,7 +377,7 @@ void uninit_driver (void)
TRACE("<<< uninit_driver()\n\n");
#if DEBUG
#if DEBUG
remove_debugger_command(CHIPNAME, debug_sis7018);
#endif
@@ -389,7 +389,7 @@ void uninit_driver (void)
memset(&cards, 0, sizeof(cards));
#if DO_MIDI
put_module(B_MPU_401_MODULE_NAME);
#endif // DO_MIDI
#endif // DO_MIDI
put_module(B_PCI_MODULE_NAME);
}
@@ -402,7 +402,7 @@ const char** publish_devices()
for (ix=0; names[ix]; ix++)
TRACE("publish %s\n", names[ix]);
return (const char **)names;
}
@@ -427,14 +427,14 @@ device_hooks* find_device(const char* name)
{
return &pcm_hooks;
}
if (!strcmp(cards[ix].pcm.oldname, name))
{
return &pcm_hooks;
}
#endif //DO_PCM
}
TRACE("find_device(%s) failed\n", name);
return NULL;
}
src/add-ons/kernel/drivers/audio/sis7018/sis7018hw.c
+32 -32
View File
@@ -81,7 +81,7 @@ static void hw_enaint(sis7018_ch *ch, int enable)
int32 i, reg;
int bank, chan;
cpu_status cp;
cp = disable_interrupts();
acquire_spinlock(&dev->hardware);
@@ -172,10 +172,10 @@ static void hw_wrch(sis7018_ch *ch)
cr[2]=((ch->delta>>8)<<24) | (ch->eso);
cr[3]|=(ch->alpha<<20) | (ch->fms<<16) | (ch->fmc<<14);
break;
}
}
cp = disable_interrupts();
acquire_spinlock(&dev->hardware);
hw_selch(ch);
for (i=0; i<TR_CHN_REGS; i++)
hw_write(dev, TR_REG_CHNBASE+(i<<2), cr[i], 4);
@@ -189,7 +189,7 @@ void hw_rdch(sis7018_ch *ch)
sis7018_dev *dev = ch->card;
int32 cr[5], i;
cpu_status cp;
cp = disable_interrupts();
acquire_spinlock(&dev->hardware);
@@ -209,13 +209,13 @@ void hw_rdch(sis7018_ch *ch)
ch->vol= (cr[4] & 0x00ff0000) >> 16;
ch->ctrl= (cr[4] & 0x0000f000) >> 12;
ch->ec= (cr[4] & 0x00000fff);
switch(ch->card->type->ids.chip_id)
{
case SPA_PCI_ID:
case ALI_PCI_ID:
case TDX_PCI_ID:
case xDX_PCI_ID:
case TDX_PCI_ID:
case xDX_PCI_ID:
ch->cso= (cr[0] & 0xffff0000) >> 16;
ch->alpha= (cr[0] & 0x0000fff0) >> 4;
ch->fms= (cr[0] & 0x0000000f);
@@ -238,11 +238,11 @@ status_t hw_pchannel_init(pcm_dev *dev)
sis7018_ch *ch = &dev->play_channel;
ch->index = PCHANNEL_ID;
hw_pchannel_setblocksize(dev, 8192);
ch->ctrl = 0x0f; // 16-bit stereo signed + loop mode enabled
ch->ctrl = 0x0f; // 16-bit stereo signed + loop mode enabled
ch->delta = (48000 << 12 ) / 48000;
ch->card = dev->card;
ch->areaid=-1;
ch->wr_lock = 0;
ch->write_waiting = 0;
sprintf(name_buf, "WS:%s", dev->name);
@@ -269,7 +269,7 @@ void hw_pchannel_free(pcm_dev *dev)
if(ch->areaid >= 0){
delete_area(ch->areaid);
ch->areaid = -1;
delete_sem(ch->write_sem);
delete_sem(ch->wr_entry);
ch->write_sem = -1;
@@ -283,18 +283,18 @@ void hw_start(pcm_dev *dev)
if(ch->active)
return;
/* start out with a clean slate */
TRACE("hw_start()\n");
/* if (port->config.format == 0x11)
{
memset((void*)port->card->low_mem, 0x80, port->config.play_buf_size +
memset((void*)port->card->low_mem, 0x80, port->config.play_buf_size +
port->config.rec_buf_size);
}
else {*/
// TODO?
// memset((void *)port->card->low_mem, 0, port->config.play_buf_size +
// memset((void *)port->card->low_mem, 0, port->config.play_buf_size +
// port->config.rec_buf_size);
//}
@@ -302,7 +302,7 @@ void hw_start(pcm_dev *dev)
ch->wr_silence = ch->mem_size;
ch->was_written = 0;
ch->wr_total = 0;
ch->fmc = 3;
ch->fms = 0;
ch->ec = 0;
@@ -327,7 +327,7 @@ void hw_stop(pcm_dev *dev)
sis7018_ch *ch = &dev->play_channel;
if(!ch->active)
return;
hw_stopch(ch);
ch->active = 0;
}
@@ -339,7 +339,7 @@ static int32 hw_interrupt_handler(void * data)
sis7018_ch *ch;
int32 handled = B_UNHANDLED_INTERRUPT;
intrs++;
acquire_spinlock(&card->hardware);
intsrc = hw_read(card, TR_REG_MISCINT, 4);
@@ -396,10 +396,10 @@ void hw_decrement_interrupt_handler(sis7018_dev * card)
status_t hw_initialize(sis7018_dev *card)
{
status_t err = B_OK;
cpu_status cp = disable_interrupts();
acquire_spinlock(&card->hardware);
switch (card->type->ids.chip_id){
case SPA_PCI_ID:
hw_write(card, SPA_REG_GPIO, 0, 4);
@@ -413,7 +413,7 @@ status_t hw_initialize(sis7018_dev *card)
hw_write(card, TNX_REG_CODECST, TNX_CDC_ON, 4);
break;
}
hw_write(card, TR_REG_CIR, TR_CIR_MIDENA | TR_CIR_ADDRENA, 4);
release_spinlock(&card->hardware);
@@ -490,13 +490,13 @@ static status_t hw_find_memory(sis7018_ch *ch, size_t blocksize)
delete_area(curarea);
curarea = -1;
}
TRACE("allocating new area\n");
curarea = create_area(name, &addr, B_ANY_KERNEL_ADDRESS,
curarea = create_area(name, &addr, B_ANY_KERNEL_ADDRESS,
trysize, B_LOMEM, B_READ_AREA | B_WRITE_AREA);
TRACE("create_area(%lx) returned %lx logical %p\n", trysize, curarea, addr);
if (curarea < 0)
goto oops;
@@ -505,13 +505,13 @@ static status_t hw_find_memory(sis7018_ch *ch, size_t blocksize)
curarea = B_ERROR;
goto oops;
}
TRACE("physical %p\n", where.address);
if ((uint32)where.address & 0xff000000){
TRACE("physical %#" B_PRIxPHYSADDR "\n", where.address);
if ((where.address & ~(phys_addr_t)0xffffff) != 0){
delete_area(curarea);
curarea = B_ERROR;
goto oops;
}
if ((((uint32)where.address)+low_size) & 0xff000000){
if (((where.address + low_size) & ~(phys_addr_t)0xffffff) != 0){
delete_area(curarea);
curarea = B_ERROR;
goto oops;
@@ -530,19 +530,19 @@ oops:
ch->mem_size = low_size;
ch->mem_ptr = addr;
ch->mem_phys = (vuchar *)where.address;
ch->mem_phys = (vuchar *)(adrr_t)where.address;
ch->wr_1 = ch->mem_ptr;
ch->wr_2 = ch->wr_1+ch->mem_size/2;
ch->wr_size = ch->mem_size/2;
ch->areaid = curarea;
if(ch->active){
hw_stop(&ch->card->pcm);
hw_start(&ch->card->pcm);
hw_start(&ch->card->pcm);
}
return B_OK;
}
src/add-ons/kernel/drivers/dvb/cx23882/util.c
+4 -3
View File
@@ -51,8 +51,8 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection,
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = ROUNDUP(size + offset, B_PAGE_SIZE);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS,
protection, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
if (area < B_OK) {
TRACE("mapping '%s' failed, error 0x%lx (%s)\n", name, area, strerror(area));
return area;
@@ -71,6 +71,7 @@ area_id
alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * virtadr;
area_id areaid;
@@ -94,7 +95,7 @@ alloc_mem(void **virt, void **phy, size_t size, uint32 protection,
if (virt)
*virt = virtadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
TRACE("area = %ld, size = %ld, virt = %p, phy = %p\n", areaid, size, virtadr, pe.address);
return areaid;
}
src/add-ons/kernel/drivers/graphics/ati/driver.cpp
+5 -5
View File
@@ -396,7 +396,7 @@ Mach64_GetBiosParameters(DeviceInfo& di, uint8& clockType)
uint8* romAddr;
area_id romArea = map_physical_memory("ATI Mach64 ROM",
(void*)0x000c0000,
0x000c0000,
M64_BIOS_SIZE,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -475,7 +475,7 @@ Rage128_GetBiosParameters(DeviceInfo& di)
uint8* romAddr;
area_id romArea = map_physical_memory("ATI Rage128 ROM",
(void*)0x000c0000,
0x000c0000,
R128_BIOS_SIZE,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -573,7 +573,7 @@ MapDevice(DeviceInfo& di)
si.videoMemArea = map_physical_memory(
frameBufferAreaName,
(void*)videoRamAddr,
videoRamAddr,
videoRamSize,
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA + B_WRITE_AREA,
@@ -583,7 +583,7 @@ MapDevice(DeviceInfo& di)
// Try to map this time without write combining.
si.videoMemArea = map_physical_memory(
frameBufferAreaName,
(void*)videoRamAddr,
videoRamAddr,
videoRamSize,
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
@@ -623,7 +623,7 @@ MapDevice(DeviceInfo& di)
}
si.regsArea = map_physical_memory("ATI mmio registers",
(void*)regsBase,
regsBase,
regAreaSize,
B_ANY_KERNEL_ADDRESS,
0, // neither read nor write, to hide it from user space apps
src/add-ons/kernel/drivers/graphics/et6x00/driver.c
+1 -1
View File
@@ -395,7 +395,7 @@ pci_info *pcii = &(di->pcii);
* (B_MTR_WC) and the memory mapped registers with B_MTR_UC.
*/
si->memoryArea = map_physical_memory(buffer,
(void *)di->pcii.u.h0.base_registers[0],
di->pcii.u.h0.base_registers[0],
di->pcii.u.h0.base_register_sizes[0],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_UC,
B_READ_AREA + B_WRITE_AREA,
src/add-ons/kernel/drivers/graphics/matrox/driver.c
+6 -6
View File
@@ -360,7 +360,7 @@ static status_t map_device(device_info *di)
/* get a virtual memory address for the registers*/
si->regs_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[registers],
di->pcii.u.h0.base_registers[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
B_USER_CLONEABLE_AREA | (si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
@@ -382,7 +382,7 @@ static status_t map_device(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
32768,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -451,7 +451,7 @@ static status_t map_device(device_info *di)
/* map the pseudo dma into vmem (write-only)*/
si->pseudo_dma_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[pseudo_dma],
di->pcii.u.h0.base_registers[pseudo_dma],
di->pcii.u.h0.base_register_sizes[pseudo_dma],
B_ANY_KERNEL_ADDRESS,
B_WRITE_AREA,
@@ -500,7 +500,7 @@ static status_t map_device(device_info *di)
/* map the framebuffer into vmem, using Write Combining*/
si->fb_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA,
@@ -510,7 +510,7 @@ static status_t map_device(device_info *di)
if (si->fb_area < 0) {
si->fb_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA,
@@ -603,7 +603,7 @@ static void copy_rom(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
32768,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
src/add-ons/kernel/drivers/graphics/neomagic/driver.c
+19 -19
View File
@@ -113,7 +113,7 @@ static uint16 nm_device_list[] = {
0x0016, /* MagicMedia 256XL+ (NM2380) */
0
};
static struct {
uint16 vendor;
uint16 *devices;
@@ -122,7 +122,7 @@ static struct {
{0x0000, NULL}
};
static settings current_settings = { // see comments in nm.settings
static settings current_settings = { // see comments in nm.settings
// for driver
DRIVER_PREFIX ".accelerant",
false, // dumprom
@@ -137,7 +137,7 @@ static void dumprom (void *rom, uint32 size)
{
int fd;
uint32 cnt;
fd = open ("/boot/home/" DRIVER_PREFIX ".rom", O_WRONLY | O_CREAT, 0666);
if (fd < 0) return;
@@ -182,7 +182,7 @@ init_hardware(void) {
long pci_index = 0;
pci_info pcii;
bool found_one = FALSE;
/* choke if we can't find the PCI bus */
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK)
return B_ERROR;
@@ -197,7 +197,7 @@ init_hardware(void) {
/* while there are more pci devices */
while ((*pci_bus->get_nth_pci_info)(pci_index, &pcii) == B_NO_ERROR) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == pcii.vendor_id) {
@@ -206,7 +206,7 @@ init_hardware(void) {
while (*devices) {
/* if we match a supported device */
if (*devices == pcii.device_id ) {
found_one = TRUE;
goto done;
}
@@ -238,7 +238,7 @@ init_driver(void) {
const char *item;
char *end;
uint32 value;
// for driver
item = get_driver_parameter (settings_handle, "accelerant", "", "");
if ((strlen (item) > 0) && (strlen (item) < sizeof (current_settings.accelerant) - 1)) {
@@ -374,7 +374,7 @@ static status_t map_device(device_info *di)
/* get a virtual memory address for the registers*/
si->regs_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[registers],
di->pcii.u.h0.base_registers[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
(si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
@@ -391,7 +391,7 @@ static status_t map_device(device_info *di)
si->regs2_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[registers2],
di->pcii.u.h0.base_registers[registers2],
di->pcii.u.h0.base_register_sizes[registers2],
B_ANY_KERNEL_ADDRESS,
(si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
@@ -424,7 +424,7 @@ static status_t map_device(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_size,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -447,7 +447,7 @@ static status_t map_device(device_info *di)
/* ROM was not assigned an adress, fetch it from ISA legacy memory map! */
rom_area = map_physical_memory(
buffer,
(void *)0x000c0000,
0x000c0000,
65536,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -490,7 +490,7 @@ static status_t map_device(device_info *di)
/* map the framebuffer into vmem, using Write Combining*/
si->fb_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA + B_WRITE_AREA,
@@ -500,13 +500,13 @@ static status_t map_device(device_info *di)
if (si->fb_area < 0) {
si->fb_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_registers[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
&(si->framebuffer));
}
/* if there was an error, delete our other areas and pass on error*/
if (si->fb_area < 0)
{
@@ -543,7 +543,7 @@ static status_t map_device(device_info *di)
si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[frame_buffer];
// remember settings for use here and in accelerant
si->settings = current_settings;
si->settings = current_settings;
/* in any case, return the result */
return si->fb_area;
@@ -575,7 +575,7 @@ static void probe_devices(void) {
/* while there are more pci devices */
while ((count < MAX_DEVICES) && ((*pci_bus->get_nth_pci_info)(pci_index, &(di->pcii)) == B_NO_ERROR)) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == di->pcii.vendor_id) {
@@ -662,7 +662,7 @@ nm_interrupt(void *data)
atomic_and(flags, ~SKD_HANDLER_INSTALLED);
exit0:
return handled;
return handled;
}
static status_t open_hook (const char* name, uint32 flags, void** cookie) {
@@ -768,7 +768,7 @@ mark_as_open:
/* send the cookie to the opener */
*cookie = di;
goto done;
@@ -879,7 +879,7 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
strcpy(sig, current_settings.accelerant);
result = B_OK;
} break;
/* PRIVATE ioctl from here on */
case NM_GET_PRIVATE_DATA: {
nm_get_private_data *gpd = (nm_get_private_data *)buf;
src/add-ons/kernel/drivers/graphics/nvidia/driver.c
+9 -9
View File
@@ -557,7 +557,7 @@ map_device(device_info *di)
si->regs_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map regs as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
B_USER_CLONEABLE_AREA | (si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
@@ -595,7 +595,7 @@ map_device(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_size,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -619,7 +619,7 @@ map_device(device_info *di)
if (!tmpUlong) {
/* ROM was not assigned an adress, fetch it from ISA legacy memory map! */
rom_area = map_physical_memory(buffer, (void *)0x000c0000,
rom_area = map_physical_memory(buffer, 0x000c0000,
65536, B_ANY_KERNEL_ADDRESS, B_READ_AREA, (void **)&(rom_temp));
}
@@ -655,7 +655,7 @@ map_device(device_info *di)
/* map the framebuffer into vmem, using Write Combining*/
si->fb_area = map_physical_memory(buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA,
@@ -665,7 +665,7 @@ map_device(device_info *di)
if (si->fb_area < 0) {
si->fb_area = map_physical_memory(buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA,
@@ -917,17 +917,17 @@ open_hook(const char* name, uint32 flags, void** cookie)
* even on older CPU's. */
get_memory_map(unaligned_dma_buffer, B_PAGE_SIZE, map, 1);
si->dma_buffer_pci = (void*)
((((uint32)(map[0].address)) + net_buf_size - 1) & ~(net_buf_size - 1));
((map[0].address + net_buf_size - 1) & ~(net_buf_size - 1));
/* map the net DMA command buffer into vmem, using Write Combining */
si->dma_area = map_physical_memory(
"NV aligned DMA cmd buffer", si->dma_buffer_pci, net_buf_size,
"NV aligned DMA cmd buffer", (addr_t)si->dma_buffer_pci, net_buf_size,
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA, &(si->dma_buffer));
/* if failed with write combining try again without */
if (si->dma_area < 0) {
si->dma_area = map_physical_memory(
"NV aligned DMA cmd buffer", si->dma_buffer_pci, net_buf_size,
si->dma_area = map_physical_memory("NV aligned DMA cmd buffer",
(addr_t)si->dma_buffer_pci, net_buf_size,
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA, &(si->dma_buffer));
}
src/add-ons/kernel/drivers/graphics/nvidia_gpgpu/driver.c
+9 -9
View File
@@ -321,7 +321,7 @@ map_device(device_info *di)
si->regs_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map regs as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
B_USER_CLONEABLE_AREA | (si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
@@ -359,7 +359,7 @@ map_device(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_size,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -383,7 +383,7 @@ map_device(device_info *di)
if (!tmpUlong) {
/* ROM was not assigned an adress, fetch it from ISA legacy memory map! */
rom_area = map_physical_memory(buffer, (void *)0x000c0000,
rom_area = map_physical_memory(buffer, 0x000c0000,
65536, B_ANY_KERNEL_ADDRESS, B_READ_AREA, (void **)&(rom_temp));
}
@@ -419,7 +419,7 @@ map_device(device_info *di)
/* map the framebuffer into vmem, using Write Combining*/
si->fb_area = map_physical_memory(buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA,
@@ -429,7 +429,7 @@ map_device(device_info *di)
if (si->fb_area < 0) {
si->fb_area = map_physical_memory(buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA,
@@ -676,18 +676,18 @@ open_hook(const char* name, uint32 flags, void** cookie)
* even on older CPU's. */
get_memory_map(unaligned_dma_buffer, B_PAGE_SIZE, map, 1);
si->dma_buffer_pci = (void*)
((((uint32)(map[0].address)) + net_buf_size - 1) & ~(net_buf_size - 1));
((map[0].address + net_buf_size - 1) & ~(net_buf_size - 1));
/* map the net DMA command buffer into vmem, using Write Combining */
si->dma_area = map_physical_memory(
"NV aligned DMA cmd buffer", si->dma_buffer_pci, net_buf_size,
"NV aligned DMA cmd buffer", (addr_t)si->dma_buffer_pci, net_buf_size,
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA, &(si->dma_buffer));
/* if failed with write combining try again without */
if (si->dma_area < 0) {
si->dma_area = map_physical_memory(
"NV aligned DMA cmd buffer", si->dma_buffer_pci, net_buf_size,
B_ANY_KERNEL_BLOCK_ADDRESS,
"NV aligned DMA cmd buffer", (addr_t)si->dma_buffer_pci,
net_buf_size, B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA, &(si->dma_buffer));
}
/* if there was an error, delete our other areas and pass on error*/
src/add-ons/kernel/drivers/graphics/radeon/DMA.c
+38 -38
View File
@@ -1,12 +1,12 @@
/*
Copyright (c) 2002-04, Thomas Kurschel
Part of Radeon accelerant
DMA engine handling.
Currently, VID DMA is always used and data is always copied from
Currently, VID DMA is always used and data is always copied from
graphics memory to other memory.
*/
@@ -26,12 +26,12 @@ status_t Radeon_InitDMA( device_info *di )
status_t res;
// allocate descriptor table in graphics mem
// (docu says that is _must_ be in graphics mem)
// (docu says that is _must_ be in graphics mem)
di->dma_desc_max_num = RADEON_MAX_DMA_SIZE / 4096;
res = mem_alloc( di->memmgr[mt_local], di->dma_desc_max_num * sizeof( DMA_descriptor ), 0,
res = mem_alloc( di->memmgr[mt_local], di->dma_desc_max_num * sizeof( DMA_descriptor ), 0,
&di->dma_desc_handle, &di->dma_desc_offset );
if( res != B_OK )
return res;
@@ -39,13 +39,13 @@ status_t Radeon_InitDMA( device_info *di )
OUTREGP( di->regs, RADEON_GEN_INT_CNTL, RADEON_VIDDMA_MASK, ~RADEON_VIDDMA_MASK );
// acknowledge possibly pending IRQ
OUTREG( di->regs, RADEON_GEN_INT_STATUS, RADEON_VIDDMA_AK );
return B_OK;
}
// prepare DMA engine to copy data from graphics mem to other mem
static status_t Radeon_PrepareDMA(
static status_t Radeon_PrepareDMA(
device_info *di, uint32 src, char *target, size_t size, bool lock_mem, bool contiguous )
{
physical_entry map[16];
@@ -55,7 +55,7 @@ static status_t Radeon_PrepareDMA(
if( lock_mem && !contiguous ) {
res = lock_memory( target, size, B_DMA_IO | B_READ_DEVICE );
if( res != B_OK ) {
SHOW_ERROR( 2, "Cannot lock memory (%s)", strerror( res ));
return res;
@@ -64,14 +64,14 @@ static status_t Radeon_PrepareDMA(
// adjust virtual address for graphics card
src += di->si->memory[mt_local].virtual_addr_start;
cur_desc = (DMA_descriptor *)(di->si->local_mem + di->dma_desc_offset);
num_desc = 0;
// memory may be fragmented, so we create S/G list
while( size > 0 ) {
int i;
if( contiguous ) {
// if memory is contiguous, ask for start address only to reduce work
get_memory_map( target, 1, map, 16 );
@@ -80,32 +80,32 @@ static status_t Radeon_PrepareDMA(
} else {
get_memory_map( target, size, map, 16 );
}
for( i = 0; i < 16; ++i ) {
uint32 address = (uint32)map[i].address;
phys_addr_t address = map[i].address;
size_t contig_size = map[i].size;
if( contig_size == 0 )
break;
target += contig_size;
while( contig_size > 0 ) {
size_t cur_size;
cur_size = min( contig_size, RADEON_DMA_DESC_MAX_SIZE );
if( ++num_desc > (int)di->dma_desc_max_num ) {
SHOW_ERROR( 2, "Overflow of DMA descriptors, %ld bytes left", size );
res = B_BAD_VALUE;
goto err;
}
cur_desc->src_address = src;
cur_desc->dest_address = address;
cur_desc->command = cur_size;
cur_desc->res = 0;
++cur_desc;
address += cur_size;
contig_size -= cur_size;
@@ -114,23 +114,23 @@ static status_t Radeon_PrepareDMA(
}
}
}
// mark last descriptor as being last one
// mark last descriptor as being last one
(cur_desc - 1)->command |= RADEON_DMA_COMMAND_EOL;
return B_OK;
err:
if( lock_mem && !contiguous )
unlock_memory( target, size, B_DMA_IO| B_READ_DEVICE );
return res;
}
// finish DMA
// caller must ensure that DMA channel has stopped
static void Radeon_FinishDMA(
static void Radeon_FinishDMA(
device_info *di, uint32 src, char *target, size_t size, bool lock_mem, bool contiguous )
{
if( lock_mem && !contiguous )
@@ -144,34 +144,34 @@ static void Radeon_FinishDMA(
// size - number of bytes to copy
// lock_mem - true, if memory is not locked
// contiguous - true, if memory is physically contiguous (implies lock_mem=false)
status_t Radeon_DMACopy(
status_t Radeon_DMACopy(
device_info *di, uint32 src, char *target, size_t size, bool lock_mem, bool contiguous )
{
status_t res;
/*SHOW_FLOW( 0, "src=%ld, target=%p, size=%ld, lock_mem=%d, contiguous=%d",
src, target, size, lock_mem, contiguous );*/
res = Radeon_PrepareDMA( di, src, target, size, lock_mem, contiguous );
if( res != B_OK )
return res;
//SHOW_FLOW0( 0, "2" );
OUTREG( di->regs, RADEON_DMA_VID_TABLE_ADDR, di->si->memory[mt_local].virtual_addr_start +
di->dma_desc_offset );
res = acquire_sem_etc( di->dma_sem, 1, B_RELATIVE_TIMEOUT, 1000000 );
// be sure that transmission is really finished
while( (INREG( di->regs, RADEON_DMA_VID_STATUS ) & RADEON_DMA_STATUS_ACTIVE) != 0 ) {
SHOW_FLOW0( 0, "DMA transmission still active" );
snooze( 1000 );
}
Radeon_FinishDMA( di, src, target, size, lock_mem, contiguous );
//SHOW_FLOW0( 0, "3" );
return res;
}
src/add-ons/kernel/drivers/graphics/radeon/PCI_GART.c
+65 -65
View File
@@ -5,7 +5,7 @@
PCI GART.
Currently, we use PCI DMA. Changing to AGP would
Currently, we use PCI DMA. Changing to AGP would
only affect this file, but AGP-GART is specific to
the chipset of the motherboard, and as DMA is really
overkill for 2D, I cannot bother writing a dozen
@@ -31,25 +31,25 @@ static status_t
createGARTBuffer(GART_info *gart, size_t size)
{
SHOW_FLOW0( 3, "" );
gart->buffer.size = size = (size + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
// if this buffer is used for PCI BM, cache snooping
// takes care of syncing memory accesses; if used for AGP,
// we'll have to access via AGP aperture (and mark aperture
// as write-combined) as cache consistency doesn't need to
// as write-combined) as cache consistency doesn't need to
// be guaranteed
// the specs say that some chipsets do kind of lazy flushing
// so the graphics card may read obsolete data; up to now
// we use PCI only where this shouldn't happen by design;
// if we change to AGP we may tweak the pre-charge time of
// the write buffer pointer
// the write buffer pointer
// as some variables in accelerant point directly into
// the DMA buffer, we have to grant access for all apps
gart->buffer.area = create_area("Radeon PCI GART buffer",
&gart->buffer.ptr, B_ANY_KERNEL_ADDRESS,
gart->buffer.area = create_area("Radeon PCI GART buffer",
&gart->buffer.ptr, B_ANY_KERNEL_ADDRESS,
size, B_FULL_LOCK,
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
// TODO: really user read/write?
@@ -63,9 +63,9 @@ createGARTBuffer(GART_info *gart, size_t size)
strerror(gart->buffer.area));
return gart->buffer.area;
}
gart->buffer.unaligned_area = -1;
memset( gart->buffer.ptr, 0, size );
return B_OK;
@@ -77,42 +77,42 @@ static status_t createGARTBuffer( GART_info *gart, size_t size )
{
physical_entry map[1];
void *unaligned_addr, *aligned_phys;
SHOW_FLOW0( 3, "" );
gart->buffer.size = size = (size + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
// we allocate an contiguous area having twice the size
// to be able to find an aligned, contiguous range within it;
// the graphics card doesn't care, but the CPU cannot
// make an arbitrary area WC'ed, at least elder ones
// question: is this necessary for a PCI GART because of bus snooping?
gart->buffer.unaligned_area = create_area( "Radeon PCI GART buffer",
&unaligned_addr, B_ANY_KERNEL_ADDRESS,
gart->buffer.unaligned_area = create_area( "Radeon PCI GART buffer",
&unaligned_addr, B_ANY_KERNEL_ADDRESS,
2 * size, B_CONTIGUOUS/*B_FULL_LOCK*/, B_READ_AREA | B_WRITE_AREA | B_USER_CLONEABLE_AREA );
if (gart->buffer.unaligned_area < 0) {
SHOW_ERROR( 1, "cannot create PCI GART buffer (%s)",
SHOW_ERROR( 1, "cannot create PCI GART buffer (%s)",
strerror( gart->buffer.unaligned_area ));
return gart->buffer.unaligned_area;
}
get_memory_map( unaligned_addr, B_PAGE_SIZE, map, 1 );
aligned_phys =
(void **)(((uint32)map[0].address + size - 1) & ~(size - 1));
aligned_phys =
(void **)((map[0].address + size - 1) & ~(size - 1));
SHOW_FLOW( 3, "aligned_phys=%p", aligned_phys );
gart->buffer.area = map_physical_memory( "Radeon aligned PCI GART buffer",
aligned_phys,
size, B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
gart->buffer.area = map_physical_memory( "Radeon aligned PCI GART buffer",
(addr_t)aligned_phys,
size, B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA | B_WRITE_AREA, &gart->buffer.ptr );
if( gart->buffer.area < 0 ) {
if( gart->buffer.area < 0 ) {
SHOW_ERROR0( 3, "cannot map buffer with WC" );
gart->buffer.area = map_physical_memory( "Radeon aligned PCI GART buffer",
aligned_phys,
size, B_ANY_KERNEL_BLOCK_ADDRESS,
gart->buffer.area = map_physical_memory( "Radeon aligned PCI GART buffer",
(addr_t)aligned_phys,
size, B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA | B_WRITE_AREA, &gart->buffer.ptr );
}
@@ -122,7 +122,7 @@ static status_t createGARTBuffer( GART_info *gart, size_t size )
gart->buffer.unaligned_area = -1;
return gart->buffer.area;
}
memset( gart->buffer.ptr, 0, size );
return B_OK;
@@ -141,15 +141,15 @@ static status_t initGATT( GART_info *gart )
uint32 i;
uint32 *gatt_entry;
size_t num_pages;
SHOW_FLOW0( 3, "" );
num_pages = (gart->buffer.size + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
// GART must be contignuous
gart->GATT.area = create_area("Radeon GATT", (void **)&gart->GATT.ptr,
B_ANY_KERNEL_ADDRESS,
(num_pages * sizeof( uint32 ) + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1),
B_ANY_KERNEL_ADDRESS,
(num_pages * sizeof( uint32 ) + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1),
B_CONTIGUOUS,
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
// TODO: really user read/write?
@@ -158,15 +158,15 @@ static status_t initGATT( GART_info *gart )
0
#endif
);
if (gart->GATT.area < 0) {
SHOW_ERROR(1, "cannot create GATT table (%s)",
SHOW_ERROR(1, "cannot create GATT table (%s)",
strerror(gart->GATT.area));
return gart->GATT.area;
}
get_memory_map(gart->GATT.ptr, B_PAGE_SIZE, PTB_map, 1);
gart->GATT.phys = (uint32)PTB_map[0].address;
gart->GATT.phys = PTB_map[0].address;
SHOW_INFO(3, "GATT_ptr=%p, GATT_phys=%p", gart->GATT.ptr,
(void *)gart->GATT.phys);
@@ -175,29 +175,29 @@ static status_t initGATT( GART_info *gart )
memset(gart->GATT.ptr, 0, num_pages * sizeof(uint32));
map_count = num_pages + 1;
// align size to B_PAGE_SIZE
map_area_size = map_count * sizeof(physical_entry);
if ((map_area_size / B_PAGE_SIZE) * B_PAGE_SIZE != map_area_size)
map_area_size = ((map_area_size / B_PAGE_SIZE) + 1) * B_PAGE_SIZE;
// temporary area where we fill in the memory map (deleted below)
map_area = create_area("pci_gart_map_area", (void **)&map, B_ANY_ADDRESS, map_area_size, B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
dprintf("pci_gart_map_area: %ld\n", map_area);
get_memory_map( gart->buffer.ptr, gart->buffer.size, map, map_count );
// the following looks a bit strange as the kernel
// combines successive entries
gatt_entry = gart->GATT.ptr;
for( i = 0; i < map_count; ++i ) {
uint32 addr = (uint32)map[i].address;
phys_addr_t addr = map[i].address;
size_t size = map[i].size;
if( size == 0 )
break;
while( size > 0 ) {
*gatt_entry++ = addr;
//SHOW_FLOW( 3, "%lx", *(gart_entry-1) );
@@ -205,9 +205,9 @@ static status_t initGATT( GART_info *gart )
size -= ATI_PCIGART_PAGE_SIZE;
}
}
delete_area(map_area);
if( i == map_count ) {
// this case should never happen
SHOW_ERROR0( 0, "memory map of GART buffer too large!" );
@@ -221,13 +221,13 @@ static status_t initGATT( GART_info *gart )
// devices in program order, so a simple final write should be sufficient
// 2. if it is a PCI GART, bus snooping should provide cache coherence
// 3. this function is a no-op :(
clear_caches( gart->GATT.ptr, num_pages * sizeof( uint32 ),
clear_caches( gart->GATT.ptr, num_pages * sizeof( uint32 ),
B_FLUSH_DCACHE );
// back to real live - some chipsets have write buffers that
// back to real live - some chipsets have write buffers that
// proove all previous assumptions wrong
// (don't know whether this really helps though)
asm volatile ( "wbinvd" ::: "memory" );
asm volatile ( "wbinvd" ::: "memory" );
return B_OK;
}
@@ -236,7 +236,7 @@ static void destroyGARTBuffer( GART_info *gart )
{
if( gart->buffer.area > 0 )
delete_area( gart->buffer.area );
if( gart->buffer.unaligned_area > 0 )
delete_area( gart->buffer.unaligned_area );
@@ -249,7 +249,7 @@ static void destroyGATT( GART_info *gart )
{
if( gart->GATT.area > 0 )
delete_area( gart->GATT.area );
gart->GATT.area = -1;
}
@@ -262,16 +262,16 @@ status_t Radeon_InitPCIGART( device_info *di )
result = createGARTBuffer( &di->pci_gart, PCI_GART_SIZE );
if( result < 0 )
goto err1;
result = initGATT( &di->pci_gart );
if( result < 0 )
goto err2;
return B_OK;
err2:
destroyGARTBuffer( &di->pci_gart );
err1:
return result;
}
@@ -281,25 +281,25 @@ err1:
void Radeon_CleanupPCIGART( device_info *di )
{
vuint8 *regs = di->regs;
SHOW_FLOW0( 3, "" );
// perhaps we should wait for FIFO space before messing around with registers, but
// 1. I don't want to add all the sync stuff to the kernel driver
// 2. I doubt that these regs are buffered by FIFO
// but still: in worst case CP has written some commands to register FIFO,
// but still: in worst case CP has written some commands to register FIFO,
// which can do any kind of nasty things
// disable CP BM
OUTREG( regs, RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS );
OUTREG( regs, RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS );
// read-back for flushing
INREG( regs, RADEON_CP_CSQ_CNTL );
// disable bus mastering
// disable bus mastering
OUTREGP( regs, RADEON_BUS_CNTL, RADEON_BUS_MASTER_DIS, ~RADEON_BUS_MASTER_DIS );
// disable PCI GART
// disable PCI GART
OUTREGP( regs, RADEON_AIC_CNTL, 0, ~RADEON_PCIGART_TRANSLATE_EN );
destroyGATT( &di->pci_gart );
destroyGARTBuffer( &di->pci_gart );
}
src/add-ons/kernel/drivers/graphics/radeon/bios.c
+178 -178
View File
@@ -3,9 +3,9 @@
Part of Radeon kernel driver
BIOS detection and retrieval of vital data
Most of this data should be gathered directly,
especially monitor detection should be done on
demand so not all monitors need to be connected
@@ -62,7 +62,7 @@ static const tmds_pll_info default_tmds_pll[14][4] =
// this code is really nasty as maintaining the radeon signatures
// is almost impossible (the signatures provided by ATI are always out-dated);
// further, if there is more then one card built into the computer, we
// may detect the wrong BIOS!
// may detect the wrong BIOS!
// we have two possible solutions:
// 1. use the PCI location as stored in BIOS
// 2. verify the IO-base address as stored in BIOS
@@ -70,26 +70,26 @@ static const tmds_pll_info default_tmds_pll[14][4] =
// unfortunately, every BIOS does the detection in a different way,
// so I'm not sure which is the _right_ way of doing it
static char *Radeon_FindRom( rom_info *ri )
{
{
uint32 segstart;
uint8 *rom_base;
char *rom;
int i;
for( segstart = 0x000c0000; segstart < 0x000f0000; segstart += 0x00001000 ) {
bool found = false;
// find ROM
// find ROM
rom_base = ri->bios_ptr + segstart - 0xc0000;
if( rom_base[0] != 0x55 || rom_base[1] != 0xaa )
continue;
// find signature of ATI
// find signature of ATI
rom = rom_base;
found = false;
for( i = 0; i < 128 - strlen( ati_rom_sig ); i++ ) {
if( ati_rom_sig[0] == rom_base[i] ) {
if( strncmp(ati_rom_sig, rom_base + i, strlen( ati_rom_sig )) == 0 ) {
@@ -98,16 +98,16 @@ static char *Radeon_FindRom( rom_info *ri )
}
}
}
if( !found )
continue;
// EK don't bother looking for signiture now, due to lack of consistancy.
SHOW_INFO( 2, "found ROM @0x%lx", segstart );
return rom_base;
}
SHOW_INFO0( 2, "no ROM found" );
return NULL;
}
@@ -120,7 +120,7 @@ static void Radeon_GetPLLInfo( device_info *di )
uint8 *bios_header;
uint8 *tmp;
PLL_BLOCK pll, *pll_info;
bios_header = di->rom.rom_ptr + *(uint16 *)(di->rom.rom_ptr + 0x48);
pll_info = (PLL_BLOCK *)(di->rom.rom_ptr + *(uint16 *)(bios_header + 0x30));
@@ -128,60 +128,60 @@ static void Radeon_GetPLLInfo( device_info *di )
tmp = bios_header + 4;
if (( *tmp == 'A'
&& *(tmp+1) == 'T'
&& *(tmp+2) == 'O'
if (( *tmp == 'A'
&& *(tmp+1) == 'T'
&& *(tmp+2) == 'O'
&& *(tmp+3) == 'M'
)
||
( *tmp == 'M'
&& *(tmp+1) == 'O'
&& *(tmp+2) == 'T'
)
||
( *tmp == 'M'
&& *(tmp+1) == 'O'
&& *(tmp+2) == 'T'
&& *(tmp+3) == 'A'
))
{
int bios_header, master_data_start, pll_start;
di->is_atombios = true;
bios_header = RADEON_BIOS16(0x48);
master_data_start = RADEON_BIOS16(bios_header + 32);
pll_start = RADEON_BIOS16(master_data_start + 12);
di->pll.ref_div = 0;
di->pll.ref_div = 0;
di->pll.max_pll_freq = RADEON_BIOS16(pll_start + 32);
di->pll.xclk = RADEON_BIOS16(pll_start + 72);
di->pll.min_pll_freq = RADEON_BIOS16(pll_start + 78);
di->pll.ref_freq = RADEON_BIOS16(pll_start + 82);
SHOW_INFO( 2, "TESTING ref_clk=%ld, ref_div=%ld, xclk=%ld, min_freq=%ld, max_freq=%ld from ATOM Bios",
di->pll.ref_freq, di->pll.ref_div, di->pll.xclk,
di->pll.ref_freq, di->pll.ref_div, di->pll.xclk,
di->pll.min_pll_freq, di->pll.max_pll_freq );
// Unused by beos driver so it appears...
// info->sclk = RADEON_BIOS32(pll_info_block + 8) / 100.0;
// info->mclk = RADEON_BIOS32(pll_info_block + 12) / 100.0;
// if (info->sclk == 0) info->sclk = 200;
// if (info->mclk == 0) info->mclk = 200;
}
else
{
di->is_atombios = false;
memcpy( &pll, pll_info, sizeof( pll ));
di->pll.xclk = (uint32)pll.XCLK;
di->pll.ref_freq = (uint32)pll.PCLK_ref_freq;
di->pll.ref_div = (uint32)pll.PCLK_ref_divider;
di->pll.min_pll_freq = pll.PCLK_min_freq;
di->pll.max_pll_freq = pll.PCLK_max_freq;
SHOW_INFO( 2, "ref_clk=%ld, ref_div=%ld, xclk=%ld, min_freq=%ld, max_freq=%ld from Legacy BIOS",
di->pll.ref_freq, di->pll.ref_div, di->pll.xclk,
di->pll.ref_freq, di->pll.ref_div, di->pll.xclk,
di->pll.min_pll_freq, di->pll.max_pll_freq );
}
}
/*
@@ -201,18 +201,18 @@ const char *Mon2Str[] = {
static void Radeon_GetMonType( device_info *di )
{
unsigned int tmp;
SHOW_FLOW0( 3, "" );
di->disp_type[0] = di->disp_type[1] = dt_none;
if (di->has_crtc2) {
tmp = INREG( di->regs, RADEON_BIOS_4_SCRATCH );
// ordering of "if"s is important as multiple
// devices can be concurrently connected to one port
// (like both a CRT and a TV)
// primary port
// having flat-panel support is most important
if (tmp & 0x08)
@@ -252,10 +252,10 @@ static void Radeon_GetMonType( device_info *di )
else
di->disp_type[0] = dt_crt;
}
SHOW_INFO( 1, "BIOS reports %s on primary and %s on secondary port",
SHOW_INFO( 1, "BIOS reports %s on primary and %s on secondary port",
Mon2Str[di->disp_type[0]], Mon2Str[di->disp_type[1]]);
// remove unsupported devices
if( di->disp_type[0] >= dt_dvi_ext )
di->disp_type[0] = dt_none;
@@ -272,8 +272,8 @@ static void Radeon_GetMonType( device_info *di )
di->disp_type[1] = dt_none;
}
}
SHOW_INFO( 1, "Effective routing: %s on primary and %s on secondary port",
SHOW_INFO( 1, "Effective routing: %s on primary and %s on secondary port",
Mon2Str[di->disp_type[0]], Mon2Str[di->disp_type[1]]);
}
*/
@@ -284,11 +284,11 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
ptr_disp_entity ptr_entity = &di->routing;
int i = 0, j, tmp, tmp0=0, tmp1=0;
int bios_header, master_data_start;
bios_header = RADEON_BIOS16(0x48);
if (di->is_atombios)
{
master_data_start = RADEON_BIOS16( bios_header + 32 );
@@ -323,7 +323,7 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
ptr_entity->port_info[crtc].tmds_type = tmds_int;
else if (i == 7)
ptr_entity->port_info[crtc].tmds_type = tmds_ext;
tmp0 = RADEON_BIOS16( master_data_start + 24);
if( tmp0 && id[crtc] ) {
switch (RADEON_BIOS16(tmp0 + 4 + 27 * id[crtc]) * 4)
@@ -407,11 +407,11 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
tmp1 = (((( tmp0 >> 8 ) & 0xf ) == ddc_dvi ) || ( tmp1 == 1 )) ? 0 : 1; /* determine port info index */
ptr_entity->port_info[tmp1].ddc_type = (tmp0 >> 8) & 0x0f;
if (ptr_entity->port_info[tmp1].ddc_type > ddc_crt2)
if (ptr_entity->port_info[tmp1].ddc_type > ddc_crt2)
ptr_entity->port_info[tmp1].ddc_type = ddc_none_detected;
ptr_entity->port_info[tmp1].dac_type = (tmp0 & 0x01) ? dac_tvdac : dac_primary;
ptr_entity->port_info[tmp1].connector_type = (tmp0 >> 12) & 0x0f;
if (ptr_entity->port_info[tmp1].connector_type > connector_unsupported)
if (ptr_entity->port_info[tmp1].connector_type > connector_unsupported)
ptr_entity->port_info[tmp1].connector_type = connector_unsupported;
ptr_entity->port_info[tmp1].tmds_type = ((tmp0 >> 4) & 0x01) ? tmds_ext : tmds_int;
@@ -428,7 +428,7 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
return FALSE;
}
if (di->is_mobility)
if (di->is_mobility)
{
/* For the cases where only one VGA connector is found,
we assume LVDS is not listed in the connector table,
@@ -436,7 +436,7 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
*/
if ((connector_found < 3) && (ptr_entity->port_info[tmp1].connector_type == connector_crt)) {
if (connector_found == 1) {
memcpy (&ptr_entity->port_info[1],
memcpy (&ptr_entity->port_info[1],
&ptr_entity->port_info[0],
sizeof (ptr_entity->port_info[0]));
}
@@ -446,9 +446,9 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
ptr_entity->port_info[0].connector_type = connector_proprietary;
SHOW_INFO0( 4 , "lvds port is not in connector table, added in.");
if (connector_found == 0)
if (connector_found == 0)
connector_found = 1;
else
else
connector_found = 3;
}
@@ -482,7 +482,7 @@ static bool Radeon_GetConnectorInfoFromBIOS ( device_info* di )
SHOW_INFO( 2, "Port%d: DDCType-%d, DACType-%d, TMDSType-%d, ConnectorType-%d",
0, ptr_entity->port_info[0].ddc_type, ptr_entity->port_info[0].dac_type,
ptr_entity->port_info[0].tmds_type, ptr_entity->port_info[0].connector_type);
}
if (connector_found == 3) {
SHOW_INFO( 2, "Port%d: DDCType-%d, DACType-%d, TMDSType-%d, ConnectorType-%d",
@@ -505,9 +505,9 @@ static bool Radeon_GetBIOSDFPInfo( device_info *di )
FPI_BLOCK fpi;
char panel_name[30];
int i;
uint16 tmp;
bios_header = RADEON_BIOS16( 0x48 );
if (di->is_atombios)
@@ -518,7 +518,7 @@ static bool Radeon_GetBIOSDFPInfo( device_info *di )
tmp = RADEON_BIOS16( master_data_start + 16 );
if( tmp )
{
di->fp_info.panel_xres = RADEON_BIOS16( tmp + 6 );
di->fp_info.panel_yres = RADEON_BIOS16( tmp + 10 );
di->fp_info.dot_clock = RADEON_BIOS16( tmp + 4 ) * 10;
@@ -529,19 +529,19 @@ static bool Radeon_GetBIOSDFPInfo( device_info *di )
di->fp_info.v_over_plus = RADEON_BIOS16( tmp + 18 );
di->fp_info.h_sync_width = RADEON_BIOS16( tmp + 20 );
di->fp_info.panel_pwr_delay = RADEON_BIOS16( tmp + 40 );
SHOW_INFO( 2, "Panel Info from ATOMBIOS:\n"
"XRes: %d, YRes: %d, DotClock: %d\n"
"HBlank: %d, HOverPlus: %d, HSyncWidth: %d\n"
"VBlank: %d, VOverPlus: %d, VSyncWidth: %d\n"
SHOW_INFO( 2, "Panel Info from ATOMBIOS:\n"
"XRes: %d, YRes: %d, DotClock: %d\n"
"HBlank: %d, HOverPlus: %d, HSyncWidth: %d\n"
"VBlank: %d, VOverPlus: %d, VSyncWidth: %d\n"
"PanelPowerDelay: %d\n",
di->fp_info.panel_xres, di->fp_info.panel_yres, di->fp_info.dot_clock,
di->fp_info.h_blank, di->fp_info.h_over_plus, di->fp_info.h_sync_width,
di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.h_sync_width,
di->fp_info.panel_pwr_delay );
}
else
}
else
{
di->fp_info.panel_pwr_delay = 200;
SHOW_ERROR0( 2, "No Panel Info Table found in BIOS" );
@@ -550,91 +550,91 @@ static bool Radeon_GetBIOSDFPInfo( device_info *di )
} // is_atombios
else
{
fpi_offset = RADEON_BIOS16(bios_header + 0x40);
if( !fpi_offset ) {
di->fp_info.panel_pwr_delay = 200;
SHOW_ERROR0( 2, "No Panel Info Table found in BIOS" );
return false;
}
}
memcpy( &fpi, di->rom.rom_ptr + fpi_offset, sizeof( fpi ));
memcpy( panel_name, &fpi.name, sizeof( fpi.name ) );
panel_name[sizeof( fpi.name )] = 0;
SHOW_INFO( 2, "Panel ID string: %s", panel_name );
di->fp_info.panel_xres = fpi.panel_xres;
di->fp_info.panel_yres = fpi.panel_yres;
SHOW_INFO( 2, "Panel Size from BIOS: %dx%d",
SHOW_INFO( 2, "Panel Size from BIOS: %dx%d",
di->fp_info.panel_xres, di->fp_info.panel_yres);
di->fp_info.panel_pwr_delay = fpi.panel_pwr_delay;
di->fp_info.panel_pwr_delay = fpi.panel_pwr_delay;
if( di->fp_info.panel_pwr_delay > 2000 || di->fp_info.panel_pwr_delay < 0 )
di->fp_info.panel_pwr_delay = 2000;
di->fp_info.ref_div = fpi.ref_div;
di->fp_info.post_div = fpi.post_div;
di->fp_info.feedback_div = fpi.feedback_div;
di->fp_info.fixed_dividers =
di->fp_info.ref_div != 0 && di->fp_info.feedback_div > 3;
// there might be multiple supported resolutions stored;
// we are looking for native resolution
for( i = 0; i < 20; ++i ) {
uint16 fpi_timing_ofs;
FPI_TIMING_BLOCK fpi_timing;
fpi_timing_ofs = fpi.fpi_timing_ofs[i];
if( fpi_timing_ofs == 0 )
break;
memcpy( &fpi_timing, di->rom.rom_ptr + fpi_timing_ofs, sizeof( fpi_timing ));
if( fpi_timing.panel_xres != di->fp_info.panel_xres ||
fpi_timing.panel_yres != di->fp_info.panel_yres )
continue;
di->fp_info.h_blank = (fpi_timing.h_total - fpi_timing.h_display) * 8;
// TBD: seems like upper four bits of hsync_start contain garbage
di->fp_info.h_over_plus = ((fpi_timing.h_sync_start & 0xfff) - fpi_timing.h_display - 1) * 8;
di->fp_info.h_sync_width = fpi_timing.h_sync_width * 8;
di->fp_info.v_blank = fpi_timing.v_total - fpi_timing.v_display;
di->fp_info.v_over_plus = (fpi_timing.v_sync & 0x7ff) - fpi_timing.v_display;
di->fp_info.v_sync_width = (fpi_timing.v_sync & 0xf800) >> 11;
di->fp_info.v_sync_width = (fpi_timing.v_sync & 0xf800) >> 11;
di->fp_info.dot_clock = fpi_timing.dot_clock * 10;
return true;
}
} // not is_atombios
SHOW_ERROR0( 2, "Radeon: couldn't get Panel Timing from BIOS" );
return false;
}
// try to reverse engineer DFP specification from
// try to reverse engineer DFP specification from
// timing currently set up in graphics cards registers
// (effectively, we hope that BIOS has set it up correctly
// and noone has messed registers up yet; let's pray)
static void Radeon_RevEnvDFPSize( device_info *di )
{
vuint8 *regs = di->regs;
di->fp_info.panel_yres =
((INREG( regs, RADEON_FP_VERT_STRETCH ) & RADEON_VERT_PANEL_SIZE)
di->fp_info.panel_yres =
((INREG( regs, RADEON_FP_VERT_STRETCH ) & RADEON_VERT_PANEL_SIZE)
>> RADEON_VERT_PANEL_SIZE_SHIFT) + 1;
di->fp_info.panel_xres =
(((INREG( regs, RADEON_FP_HORZ_STRETCH ) & RADEON_HORZ_PANEL_SIZE)
di->fp_info.panel_xres =
(((INREG( regs, RADEON_FP_HORZ_STRETCH ) & RADEON_HORZ_PANEL_SIZE)
>> RADEON_HORZ_PANEL_SIZE_SHIFT) + 1) * 8;
SHOW_INFO( 2, "detected panel size from registers: %dx%d",
SHOW_INFO( 2, "detected panel size from registers: %dx%d",
di->fp_info.panel_xres, di->fp_info.panel_yres);
}
@@ -646,64 +646,64 @@ static void Radeon_RevEnvDFPTiming( device_info *di )
uint32 r;
uint16 a, b;
r = INREG( regs, RADEON_FP_CRTC_H_TOTAL_DISP );
// the magic "4" was found by trial and error and probably stems from fudge (see crtc.c)
a = (r & RADEON_FP_CRTC_H_TOTAL_MASK)/* + 4*/;
b = (r & RADEON_FP_CRTC_H_DISP_MASK) >> RADEON_FP_CRTC_H_DISP_SHIFT;
di->fp_info.h_blank = (a - b) * 8;
SHOW_FLOW( 2, "h_total=%d, h_disp=%d", a * 8, b * 8 );
r = INREG( regs, RADEON_FP_H_SYNC_STRT_WID );
di->fp_info.h_over_plus =
di->fp_info.h_over_plus =
((r & RADEON_FP_H_SYNC_STRT_CHAR_MASK)
>> RADEON_FP_H_SYNC_STRT_CHAR_SHIFT) - b/* - 1*/;
di->fp_info.h_over_plus *= 8;
di->fp_info.h_sync_width =
di->fp_info.h_sync_width =
((r & RADEON_FP_H_SYNC_WID_MASK)
>> RADEON_FP_H_SYNC_WID_SHIFT);
// TBD: this seems to be wrong
// (my BIOS tells 112, this calculation leads to 24!)
di->fp_info.h_sync_width *= 8;
r = INREG( regs, RADEON_FP_CRTC_V_TOTAL_DISP );
a = (r & RADEON_FP_CRTC_V_TOTAL_MASK)/* + 1*/;
b = (r & RADEON_FP_CRTC_V_DISP_MASK) >> RADEON_FP_CRTC_V_DISP_SHIFT;
di->fp_info.v_blank = a - b;
SHOW_FLOW( 2, "v_total=%d, v_disp=%d", a, b );
r = INREG( regs, RADEON_FP_V_SYNC_STRT_WID );
di->fp_info.v_over_plus = (r & RADEON_FP_V_SYNC_STRT_MASK) - b;
di->fp_info.v_sync_width = ((r & RADEON_FP_V_SYNC_WID_MASK)
>> RADEON_FP_V_SYNC_WID_SHIFT)/* + 1*/;
// standard CRTC
r = INREG( regs, RADEON_CRTC_H_TOTAL_DISP );
a = (r & RADEON_CRTC_H_TOTAL);
b = (r & RADEON_CRTC_H_DISP) >> RADEON_CRTC_H_DISP_SHIFT;
di->fp_info.h_blank = (a - b) * 8;
SHOW_FLOW( 2, "h_total=%d, h_disp=%d", a * 8, b * 8 );
r = INREG( regs, RADEON_CRTC_H_SYNC_STRT_WID );
di->fp_info.h_over_plus =
di->fp_info.h_over_plus =
((r & RADEON_CRTC_H_SYNC_STRT_CHAR)
>> RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) - b;
di->fp_info.h_over_plus *= 8;
di->fp_info.h_sync_width =
di->fp_info.h_sync_width =
((r & RADEON_CRTC_H_SYNC_WID)
>> RADEON_CRTC_H_SYNC_WID_SHIFT);
di->fp_info.h_sync_width *= 8;
r = INREG( regs, RADEON_CRTC_V_TOTAL_DISP );
a = (r & RADEON_CRTC_V_TOTAL);
b = (r & RADEON_CRTC_V_DISP) >> RADEON_CRTC_V_DISP_SHIFT;
di->fp_info.v_blank = a - b;
SHOW_FLOW( 2, "v_total=%d, v_disp=%d", a, b );
r = INREG( regs, RADEON_CRTC_V_SYNC_STRT_WID );
di->fp_info.v_over_plus = (r & RADEON_CRTC_V_SYNC_STRT) - b;
di->fp_info.v_sync_width = ((r & RADEON_CRTC_V_SYNC_WID)
@@ -724,16 +724,16 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
di->tmds_pll[i].value = 0;
di->tmds_pll[i].freq = 0;
}
if (di->is_atombios)
{
int master_data_start;
master_data_start = RADEON_BIOS16( bios_header + 32 );
if((tmp = RADEON_BIOS16 (master_data_start + 18))) {
maxfreq = RADEON_BIOS16(tmp + 4);
for (i = 0; i < 4; i++) {
di->tmds_pll[i].freq = RADEON_BIOS16(tmp + i * 6 + 6);
// This assumes each field in TMDS_PLL has 6 bit as in R300/R420
@@ -741,9 +741,9 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
((RADEON_BIOS8(tmp + i * 6 + 10) & 0x3f) << 6) |
((RADEON_BIOS8(tmp + i * 6 + 9) & 0xf) << 12) |
((RADEON_BIOS8(tmp + i * 6 + 11) & 0xf) << 16));
SHOW_ERROR( 2, "TMDS PLL from BIOS: %ld %lx",
SHOW_ERROR( 2, "TMDS PLL from BIOS: %ld %lx",
di->tmds_pll[i].freq, di->tmds_pll[i].value);
if (maxfreq == di->tmds_pll[i].freq) {
di->tmds_pll[i].freq = 0xffffffff;
break;
@@ -758,7 +758,7 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
SHOW_ERROR( 2, "DFP table revision: %d", RADEON_BIOS8(tmp));
if (RADEON_BIOS8(tmp) == 3) {
n = RADEON_BIOS8(tmp + 5) + 1;
if (n > 4)
if (n > 4)
n = 4;
for (i = 0; i < n; i++) {
di->tmds_pll[i].value = RADEON_BIOS32(tmp + i * 10 + 0x08);
@@ -768,21 +768,21 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
} else if (RADEON_BIOS8(tmp) == 4) {
int stride = 0;
n = RADEON_BIOS8(tmp + 5) + 1;
if (n > 4)
if (n > 4)
n = 4;
for (i = 0; i < n; i++) {
di->tmds_pll[i].value = RADEON_BIOS32(tmp + stride + 0x08);
di->tmds_pll[i].freq = RADEON_BIOS16(tmp + stride + 0x10);
if (i == 0)
if (i == 0)
stride += 10;
else
else
stride += 6;
}
found = TRUE;
}
// revision 4 has some problem as it appears in RV280,
// comment it off for now, use default instead
// revision 4 has some problem as it appears in RV280,
// comment it off for now, use default instead
/*
else if (RADEON_BIOS8(tmp) == 4) {
int stride = 0;
@@ -791,23 +791,23 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
for (i = 0; i < n; i++) {
di->tmds_pll[i].value = RADEON_BIOS32(tmp + stride + 0x08);
di->tmds_pll[i].freq = RADEON_BIOS16(tmp + stride + 0x10);
if (i == 0)
if (i == 0)
stride += 10;
else
else
stride += 6;
}
found = TRUE;
}
*/
}
}
if (found == FALSE) {
for (i = 0; i < 4; i++) {
di->tmds_pll[i].value = default_tmds_pll[di->asic][i].value;
di->tmds_pll[i].freq = default_tmds_pll[di->asic][i].freq;
SHOW_ERROR( 2, "TMDS PLL from DEFAULTS: %ld %lx",
SHOW_ERROR( 2, "TMDS PLL from DEFAULTS: %ld %lx",
di->tmds_pll[i].freq, di->tmds_pll[i].value);
}
}
@@ -818,29 +818,29 @@ static void Radeon_GetTMDSInfoFromBios( device_info *di )
static void Radeon_GetBIOSMon( device_info *di )
{
Radeon_GetMonType( di );
// reset all Flat Panel Info;
// reset all Flat Panel Info;
// it gets filled out step by step, and this way we know what's still missing
memset( &di->fp_info, 0, sizeof( di->fp_info ));
// we assume that the only fp port is combined with standard port 0
di->fp_info.disp_type = di->disp_type[0];
if( di->is_mobility ) {
// there is a flat panel - get info about it
Radeon_GetBIOSDFPInfo( di );
// if BIOS doesn't know, ask the registers
if( di->fp_info.panel_xres == 0 || di->fp_info.panel_yres == 0)
Radeon_RevEnvDFPSize( di );
if( di->fp_info.h_blank == 0 || di->fp_info.v_blank == 0)
Radeon_RevEnvDFPTiming( di );
SHOW_INFO( 2, "h_disp=%d, h_blank=%d, h_over_plus=%d, h_sync_width=%d",
SHOW_INFO( 2, "h_disp=%d, h_blank=%d, h_over_plus=%d, h_sync_width=%d",
di->fp_info.panel_xres, di->fp_info.h_blank, di->fp_info.h_over_plus, di->fp_info.h_sync_width );
SHOW_INFO( 2, "v_disp=%d, v_blank=%d, v_over_plus=%d, v_sync_width=%d",
di->fp_info.panel_yres, di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.v_sync_width );
SHOW_INFO( 2, "v_disp=%d, v_blank=%d, v_over_plus=%d, v_sync_width=%d",
di->fp_info.panel_yres, di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.v_sync_width );
SHOW_INFO( 2, "pixel_clock=%d", di->fp_info.dot_clock );
}
}
@@ -849,28 +849,28 @@ static void Radeon_GetBIOSMon( device_info *di )
// get info about Laptop flat panel
static void Radeon_GetFPData( device_info *di )
{
// reset all Flat Panel Info;
// reset all Flat Panel Info;
// it gets filled out step by step, and this way we know what's still missing
memset( &di->fp_info, 0, sizeof( di->fp_info ));
// we only use BIOS for Laptop flat panels
if( !di->is_mobility )
return;
// ask BIOS about flat panel spec
Radeon_GetBIOSDFPInfo( di );
// if BIOS doesn't know, ask the registers
if( di->fp_info.panel_xres == 0 || di->fp_info.panel_yres == 0)
Radeon_RevEnvDFPSize( di );
if( di->fp_info.h_blank == 0 || di->fp_info.v_blank == 0)
Radeon_RevEnvDFPTiming( di );
SHOW_INFO( 2, "h_disp=%d, h_blank=%d, h_over_plus=%d, h_sync_width=%d",
SHOW_INFO( 2, "h_disp=%d, h_blank=%d, h_over_plus=%d, h_sync_width=%d",
di->fp_info.panel_xres, di->fp_info.h_blank, di->fp_info.h_over_plus, di->fp_info.h_sync_width );
SHOW_INFO( 2, "v_disp=%d, v_blank=%d, v_over_plus=%d, v_sync_width=%d",
di->fp_info.panel_yres, di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.v_sync_width );
SHOW_INFO( 2, "v_disp=%d, v_blank=%d, v_over_plus=%d, v_sync_width=%d",
di->fp_info.panel_yres, di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.v_sync_width );
SHOW_INFO( 2, "pixel_clock=%d", di->fp_info.dot_clock );
}
@@ -911,7 +911,7 @@ static uint32 RADEON_GetAccessibleVRAM( device_info *di )
// we expect the BIOS to have done the right thing (might be too optimistic...)
if (INREG( regs, RADEON_HOST_PATH_CNTL ) & RADEON_HDP_APER_CNTL )
return aper_size * 2;
return aper_size;
}
@@ -921,10 +921,10 @@ static void Radeon_DetectRAM( device_info *di )
{
vuint8 *regs = di->regs;
uint32 accessible, bar_size, tmp = 0;
if( di->is_igp ) {
uint32 tom;
tom = INREG( regs, RADEON_NB_TOM );
di->local_mem_size = ((tom >> 16) + 1 - (tom & 0xffff)) << 16;
OUTREG( regs, RADEON_CONFIG_MEMSIZE, di->local_mem_size * 1024);
@@ -942,7 +942,7 @@ static void Radeon_DetectRAM( device_info *di )
// Get usable Vram, after asic bugs, configuration screw ups etc
accessible = RADEON_GetAccessibleVRAM( di );
// Crop it to the size of the PCI BAR
// Crop it to the size of the PCI BAR
bar_size = di->pcii.u.h0.base_register_sizes[0];
if (bar_size == 0)
bar_size = 0x200000;
@@ -951,7 +951,7 @@ static void Radeon_DetectRAM( device_info *di )
SHOW_INFO( 0, "Detected total video RAM=%ldK, accessible=%ldK (PCI BAR=%ldK)"
, di->local_mem_size/1024, accessible/1024, bar_size/1024);
if (di->local_mem_size > accessible)
if (di->local_mem_size > accessible)
di->local_mem_size = accessible;
// detect ram bus width only used by dynamic clocks for now.
@@ -967,14 +967,14 @@ static void Radeon_DetectRAM( device_info *di )
} else if ( (di->asic >= rt_rv100) ||
(di->asic >= rt_rs100) ||
(di->asic >= rt_rs200)) {
if (tmp & RV100_HALF_MODE)
if (tmp & RV100_HALF_MODE)
di->ram.width = 32;
else
else
di->ram.width = 64;
} else {
if (tmp & RADEON_MEM_NUM_CHANNELS_MASK)
if (tmp & RADEON_MEM_NUM_CHANNELS_MASK)
di->ram.width = 128;
else
else
di->ram.width = 64;
}
@@ -992,8 +992,8 @@ static void Radeon_DetectRAM( device_info *di )
di->ram.CL = 2;
di->ram.loop_latency = 16;
di->ram.Rloop = 16;
di->ram.Tr2w = 0;
} else { // RADEON_MEM_CFG_DDR
di->ram.Tr2w = 0;
} else { // RADEON_MEM_CFG_DDR
// DDR SGRAM
strcpy(di->ram_type, "DDR SGRAM");
di->ram.ml = 4;
@@ -1007,13 +1007,13 @@ static void Radeon_DetectRAM( device_info *di )
di->ram.Rloop = 16;
}
}
SHOW_INFO( 1, "%ld MB %s found on %d wide bus",
SHOW_INFO( 1, "%ld MB %s found on %d wide bus",
di->local_mem_size / 1024 / 1024, di->ram_type, di->ram.width);
/* if( di->local_mem_size > 64 * 1024 * 1024 ) {
di->local_mem_size = 64 * 1024 * 1024;
SHOW_INFO0( 1, "restricted to 64 MB" );
}*/
}
@@ -1024,7 +1024,7 @@ static void Radeon_DetectRAM( device_info *di )
status_t Radeon_MapBIOS( pci_info *pcii, rom_info *ri )
{
char buffer[100];
sprintf(buffer, "%04X_%04X_%02X%02X%02X bios",
pcii->vendor_id, pcii->device_id,
pcii->bus, pcii->device, pcii->function);
@@ -1033,23 +1033,23 @@ status_t Radeon_MapBIOS( pci_info *pcii, rom_info *ri )
// using the PCI location would improve detection, especially
// if multiple graphics cards are installed
// BUT: BeOS uses the first graphics card it finds (sorted by
// device name), thus you couldn't choose in BIOS which card
// device name), thus you couldn't choose in BIOS which card
// to use; checking the legacy location ensures that the card is
// only detected if it's the primary card
ri->phys_address = 0xc0000;
ri->size = 0x40000;
ri->bios_area = map_physical_memory( buffer, (void *)ri->phys_address,
ri->bios_area = map_physical_memory( buffer, ri->phys_address,
ri->size, B_ANY_KERNEL_ADDRESS, B_READ_AREA, (void **)&ri->bios_ptr );
if( ri->bios_area < 0 )
return ri->bios_area;
ri->rom_ptr = Radeon_FindRom( ri );
// on success, adjust physical address to found ROM
if( ri->rom_ptr != NULL )
ri->phys_address += ri->rom_ptr - ri->bios_ptr;
return ri->rom_ptr != NULL ? B_OK : B_ERROR;
}
@@ -1058,7 +1058,7 @@ status_t Radeon_MapBIOS( pci_info *pcii, rom_info *ri )
void Radeon_UnmapBIOS( rom_info *ri )
{
delete_area( ri->bios_area );
ri->bios_ptr = ri->rom_ptr = NULL;
}
@@ -1068,17 +1068,17 @@ status_t Radeon_ReadBIOSData( device_info *di )
{
shared_info dummy_si;
status_t result = B_OK;
// give Radeon_MapDevice something to play with
di->si = &dummy_si;
// don't map frame buffer - we don't know its proper size yet!
result = Radeon_MapDevice( di, true );
if( result < 0 )
goto err1;
Radeon_GetPLLInfo( di );
// setup defaults
di->routing.port_info[0].mon_type = mt_unknown;
di->routing.port_info[0].ddc_type = ddc_none_detected;
@@ -1091,7 +1091,7 @@ status_t Radeon_ReadBIOSData( device_info *di )
di->routing.port_info[1].dac_type = dac_unknown;
di->routing.port_info[1].tmds_type = tmds_unknown;
di->routing.port_info[1].connector_type = connector_none;
if ( !Radeon_GetConnectorInfoFromBIOS( di ) )
{
di->routing.port_info[0].mon_type = mt_unknown;
@@ -1099,7 +1099,7 @@ status_t Radeon_ReadBIOSData( device_info *di )
di->routing.port_info[0].dac_type = dac_tvdac;
di->routing.port_info[0].tmds_type = tmds_unknown;
di->routing.port_info[0].connector_type = connector_proprietary;
di->routing.port_info[1].mon_type = mt_unknown;
di->routing.port_info[1].ddc_type = ddc_none_detected;
di->routing.port_info[1].dac_type = dac_primary;
@@ -1110,11 +1110,11 @@ status_t Radeon_ReadBIOSData( device_info *di )
Radeon_GetFPData( di );
Radeon_GetTMDSInfoFromBios( di );
Radeon_DetectRAM( di );
Radeon_UnmapDevice( di );
err1:
di->si = NULL;
return result;
}
src/add-ons/kernel/drivers/graphics/radeon/init.c
+72 -72
View File
@@ -33,9 +33,9 @@ extern radeon_settings current_settings;
// map frame buffer and registers
// mmio_only - true = map registers only (used during detection)
status_t Radeon_MapDevice( device_info *di, bool mmio_only )
status_t Radeon_MapDevice( device_info *di, bool mmio_only )
{
// framebuffer is stored in PCI range 0,
// framebuffer is stored in PCI range 0,
// register map in PCI range 2
int regs = 2;
int fb = 0;
@@ -44,24 +44,24 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
uint32 tmp;
pci_info *pcii = &(di->pcii);
status_t result;
SHOW_FLOW( 3, "device: %02X%02X%02X",
di->pcii.bus, di->pcii.device, di->pcii.function );
si->ROM_area = si->regs_area = si->memory[mt_local].area = 0;
// enable memory mapped IO and frame buffer
// also, enable bus mastering (some BIOSes seem to
// also, enable bus mastering (some BIOSes seem to
// disable that, like mine)
tmp = get_pci( PCI_command, 2 );
SHOW_FLOW( 3, "old PCI command state: 0x%08lx", tmp );
SHOW_FLOW( 3, "old PCI command state: 0x%08lx", tmp );
tmp |= PCI_command_io | PCI_command_memory | PCI_command_master;
set_pci( PCI_command, 2, tmp );
// registers cannot be accessed directly by user apps,
// they need to clone area for safety reasons
SHOW_INFO( 1, "physical address of memory-mapped I/O: 0x%8lx-0x%8lx",
di->pcii.u.h0.base_registers[regs],
SHOW_INFO( 1, "physical address of memory-mapped I/O: 0x%8lx-0x%8lx",
di->pcii.u.h0.base_registers[regs],
di->pcii.u.h0.base_registers[regs] + di->pcii.u.h0.base_register_sizes[regs] - 1 );
sprintf( buffer, "%04X_%04X_%02X%02X%02X regs",
@@ -70,7 +70,7 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
si->regs_area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[regs],
di->pcii.u.h0.base_registers[regs],
di->pcii.u.h0.base_register_sizes[regs],
B_ANY_KERNEL_ADDRESS,
/*// for "poke" debugging
@@ -81,12 +81,12 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
0,
#endif
(void **)&(di->regs));
if( si->regs_area < 0 )
if( si->regs_area < 0 )
return si->regs_area;
// that's all during detection as we have no clue about ROM or
// frame buffer at this point
if( mmio_only )
if( mmio_only )
return B_OK;
// ROM must be explicetely mapped by applications too
@@ -96,7 +96,7 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
si->ROM_area = map_physical_memory(
buffer,
(void *) di->rom.phys_address,
di->rom.phys_address,
di->rom.size,
B_ANY_KERNEL_ADDRESS,
0,
@@ -105,11 +105,11 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
result = si->ROM_area;
goto err2;
}
if( di->pcii.u.h0.base_register_sizes[fb] > di->local_mem_size ) {
// Radeons allocate more address range then really needed ->
// only map the area that contains physical memory
SHOW_INFO( 1, "restrict frame buffer from 0x%8lx to 0x%8lx bytes",
SHOW_INFO( 1, "restrict frame buffer from 0x%8lx to 0x%8lx bytes",
di->pcii.u.h0.base_register_sizes[fb],
di->local_mem_size
);
@@ -121,8 +121,8 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
// those areas owned by an application are mapped into
// its address space
// (this hack is needed by BeOS to write something onto screen in KDL)
SHOW_INFO( 1, "physical address of framebuffer: 0x%8lx-0x%8lx",
di->pcii.u.h0.base_registers[fb],
SHOW_INFO( 1, "physical address of framebuffer: 0x%8lx-0x%8lx",
di->pcii.u.h0.base_registers[fb],
di->pcii.u.h0.base_registers[fb] + di->pcii.u.h0.base_register_sizes[fb] - 1 );
sprintf(buffer, "%04X_%04X_%02X%02X%02X framebuffer",
@@ -131,7 +131,7 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
si->memory[mt_local].area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[fb],
di->pcii.u.h0.base_registers[fb],
di->pcii.u.h0.base_register_sizes[fb],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA + B_WRITE_AREA,
@@ -141,7 +141,7 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
SHOW_FLOW0( 3, "couldn't enable WC for frame buffer" );
si->memory[mt_local].area = map_physical_memory(
buffer,
(void *) di->pcii.u.h0.base_registers[fb],
di->pcii.u.h0.base_registers[fb],
di->pcii.u.h0.base_register_sizes[fb],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
@@ -154,11 +154,11 @@ status_t Radeon_MapDevice( device_info *di, bool mmio_only )
result = si->memory[mt_local].area;
goto err;
}
// save physical address though noone can probably make
// any use of it
si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[fb];
return B_OK;
err:
@@ -170,7 +170,7 @@ err2:
// unmap PCI ranges
void Radeon_UnmapDevice(device_info *di)
void Radeon_UnmapDevice(device_info *di)
{
shared_info *si = di->si;
pci_info *pcii = &(di->pcii);
@@ -186,13 +186,13 @@ void Radeon_UnmapDevice(device_info *di)
if( si->regs_area > 0 )
delete_area( si->regs_area );
if( si->ROM_area > 0 )
delete_area( si->ROM_area );
if( si->memory[mt_local].area > 0 )
delete_area( si->memory[mt_local].area );
si->regs_area = si->ROM_area = si->memory[mt_local].area = 0;
}
@@ -206,16 +206,16 @@ status_t Radeon_FirstOpen( device_info *di )
//uint32 /*dma_block, */dma_offset;
// create shared info; don't allow access by apps -
// they'll clone it
// they'll clone it
sprintf( buffer, "%04X_%04X_%02X%02X%02X shared",
di->pcii.vendor_id, di->pcii.device_id,
di->pcii.bus, di->pcii.device, di->pcii.function );
di->shared_area = create_area(
buffer,
(void **)&(di->si),
B_ANY_KERNEL_ADDRESS,
(sizeof(shared_info) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1),
buffer,
(void **)&(di->si),
B_ANY_KERNEL_ADDRESS,
(sizeof(shared_info) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1),
B_FULL_LOCK,
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_USER_CLONEABLE_AREA
@@ -227,20 +227,20 @@ status_t Radeon_FirstOpen( device_info *di )
result = di->shared_area;
goto err8;
}
memset( di->si, 0, sizeof( *di->si ));
si = di->si;
si->settings = di->settings = current_settings;
if (di->settings.force_acc_dma)
di->acc_dma = true;
if (di->settings.force_acc_mmio) // force mmio will override dma... a tristate fuzzylogic, grey bool would be nice...
di->acc_dma = false;
#ifdef ENABLE_LOGGING
#ifdef LOG_INCLUDE_STARTUP
#ifdef LOG_INCLUDE_STARTUP
si->log = log_init( 1000000 );
#endif
#endif
@@ -249,7 +249,7 @@ status_t Radeon_FirstOpen( device_info *di )
si->vendor_id = di->pcii.vendor_id;
si->device_id = di->pcii.device_id;
si->revision = di->pcii.revision;
si->asic = di->asic;
si->is_mobility = di->is_mobility;
si->tv_chip = di->tv_chip;
@@ -262,32 +262,32 @@ status_t Radeon_FirstOpen( device_info *di )
si->acc_dma = di->acc_dma;
memcpy(&si->routing, &di->routing, sizeof(disp_entity));
// detecting theatre channel in kernel would lead to code duplication,
// so we let the first accelerant take care of it
si->theatre_channel = -1;
si->crtc[0].crtc_idx = 0;
si->crtc[0].flatpanel_port = 0;
si->crtc[1].crtc_idx = 1;
si->crtc[1].flatpanel_port = 1;
si->num_crtc = di->num_crtc;
if (di->is_mobility)
si->flatpanels[0] = di->fp_info;
si->pll = di->pll;
// create virtual card info; don't allow access by apps -
// they'll clone it
// they'll clone it
sprintf( buffer, "%04X_%04X_%02X%02X%02X virtual card 0",
di->pcii.vendor_id, di->pcii.device_id,
di->pcii.bus, di->pcii.device, di->pcii.function );
di->pcii.bus, di->pcii.device, di->pcii.function );
di->virtual_card_area = create_area(
buffer,
(void **)&(di->vc),
B_ANY_KERNEL_ADDRESS,
(sizeof(virtual_card) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1),
buffer,
(void **)&(di->vc),
B_ANY_KERNEL_ADDRESS,
(sizeof(virtual_card) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1),
B_FULL_LOCK,
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_USER_CLONEABLE_AREA
@@ -303,25 +303,25 @@ status_t Radeon_FirstOpen( device_info *di )
// currently, we assign fixed ports to this virtual card
di->vc->assigned_crtc[0] = true;
di->vc->assigned_crtc[1] = si->num_crtc > 1;
di->vc->controlled_displays =
di->vc->controlled_displays =
dd_tv_crt | dd_crt | dd_lvds | dd_dvi | dd_dvi_ext | dd_ctv | dd_stv;
di->vc->fb_mem_handle = 0;
di->vc->cursor.mem_handle = 0;
// create unique id
di->vc->id = di->virtual_card_area;
result = Radeon_MapDevice( di, false );
if (result < 0)
if (result < 0)
goto err6;
// save dac2_cntl register
// on M6, we need to restore that during uninit, else you only get
// garbage on screen on reboot if both CRTCs are used
if( di->asic == rt_rv100 && di->is_mobility)
di->dac2_cntl = INREG( di->regs, RADEON_DAC_CNTL2 );
memcpy(&si->tmds_pll, &di->tmds_pll, sizeof(di->tmds_pll));
si->tmds_pll_cntl = INREG( di->regs, RADEON_TMDS_PLL_CNTL);
si->tmds_transmitter_cntl = INREG( di->regs, RADEON_TMDS_TRANSMITTER_CNTL);
@@ -337,13 +337,13 @@ status_t Radeon_FirstOpen( device_info *di )
SHOW_INFO( 2, "FP2 GEN = %8lx", INREG( di->regs, RADEON_FP2_GEN_CNTL ));
SHOW_INFO( 2, "TV DAC = %8lx", INREG( di->regs, RADEON_TV_DAC_CNTL )); //not setup right when ext dvi
// }
result = Radeon_InitPCIGART( di );
if( result < 0 )
goto err5;
si->memory[mt_local].size = di->local_mem_size;
si->memory[mt_PCI].area = di->pci_gart.buffer.area;
si->memory[mt_PCI].size = di->pci_gart.buffer.size;
@@ -351,7 +351,7 @@ status_t Radeon_FirstOpen( device_info *di )
si->nonlocal_type = mt_PCI;
Radeon_InitMemController( di );
// currently, we don't support VBI - something is broken there
// (it doesn't change a thing apart from crashing)
result = Radeon_SetupIRQ( di, buffer );
@@ -361,7 +361,7 @@ status_t Radeon_FirstOpen( device_info *di )
// resolution of 2D register is 1K, resolution of CRTC etc. is higher,
// so 1K is the minimum block size;
// (CP cannot use local mem)
di->memmgr[mt_local] = mem_init("radeon local memory", 0, di->local_mem_size, 1024,
di->memmgr[mt_local] = mem_init("radeon local memory", 0, di->local_mem_size, 1024,
di->local_mem_size / 1024);
if (di->memmgr[mt_local] == NULL) {
result = B_NO_MEMORY;
@@ -369,25 +369,25 @@ status_t Radeon_FirstOpen( device_info *di )
}
// CP requires 4K alignment, which is the most restrictive I found
di->memmgr[mt_PCI] = mem_init("radeon PCI GART memory", 0, di->pci_gart.buffer.size, 4096,
di->memmgr[mt_PCI] = mem_init("radeon PCI GART memory", 0, di->pci_gart.buffer.size, 4096,
di->pci_gart.buffer.size / 4096);
if (di->memmgr[mt_PCI] == NULL) {
result = B_NO_MEMORY;
goto err2;
}
// no AGP support
// no AGP support
di->memmgr[mt_AGP] = NULL;
// fix AGP settings for IGP chipset
Radeon_Set_AGP( di, !di->settings.force_pci ); // disable AGP
// time to init Command Processor
result = Radeon_InitCP( di );
if( result != B_OK )
goto err;
if ( di->acc_dma )
{
result = Radeon_InitDMA( di );
@@ -398,17 +398,17 @@ status_t Radeon_FirstOpen( device_info *di )
{
SHOW_INFO0( 0, "DMA is diabled using PIO mode");
}
// mem_alloc( di->local_memmgr, 0x100000, (void *)-1, &dma_block, &dma_offset );
/* dma_offset = 15 * 1024 * 1024;
si->nonlocal_mem = (uint32 *)((uint32)si->framebuffer + dma_offset);
si->nonlocal_vm_start = (uint32)si->framebuffer_pci + dma_offset;*/
// set dynamic clocks for Mobilty chips
if (di->is_mobility && di->settings.dynamic_clocks)
Radeon_SetDynamicClock( di, 1);
return B_OK;
err0:
@@ -416,7 +416,7 @@ err0:
err:
mem_destroy( di->memmgr[mt_PCI] );
err2:
mem_destroy( di->memmgr[mt_local] );
mem_destroy( di->memmgr[mt_local] );
err3:
Radeon_CleanupIRQ( di );
err4:
@@ -433,7 +433,7 @@ err8:
// clean up shared info on last close
// (we could for device destruction, but this makes
// testing easier as everythings gets cleaned up
// testing easier as everythings gets cleaned up
// during tests)
void Radeon_LastClose( device_info *di )
{
@@ -443,23 +443,23 @@ void Radeon_LastClose( device_info *di )
// M6 fix - unfortunately, the device is never closed by app_server,
// not even before reboot
if( di->asic == rt_rv100 && di->is_mobility)
OUTREG( di->regs, RADEON_DAC_CNTL2, di->dac2_cntl );
OUTREG( di->regs, RADEON_DAC_CNTL2, di->dac2_cntl );
mem_destroy( di->memmgr[mt_local] );
if( di->memmgr[mt_PCI] )
mem_destroy( di->memmgr[mt_PCI] );
if( di->memmgr[mt_AGP] )
mem_destroy( di->memmgr[mt_AGP] );
Radeon_CleanupIRQ( di );
Radeon_CleanupPCIGART( di );
Radeon_UnmapDevice(di);
#ifdef ENABLE_LOGGING
#ifdef LOG_INCLUDE_STARTUP
#ifdef LOG_INCLUDE_STARTUP
log_exit( di->si->log );
#endif
#endif
src/add-ons/kernel/drivers/graphics/s3/driver.cpp
+3 -3
View File
@@ -243,7 +243,7 @@ MapDevice(DeviceInfo& di)
pciInfo.vendor_id, pciInfo.device_id,
pciInfo.bus, pciInfo.device, pciInfo.function);
si.regsArea = map_physical_memory(areaName, (void*)regsBase, regAreaSize,
si.regsArea = map_physical_memory(areaName, regsBase, regAreaSize,
B_ANY_KERNEL_ADDRESS,
0, // neither read nor write, to hide it from user space apps
(void**)(&(di.regs)));
@@ -259,7 +259,7 @@ MapDevice(DeviceInfo& di)
si.videoMemArea = map_physical_memory(
areaName,
(void*)videoRamAddr,
videoRamAddr,
videoRamSize,
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA + B_WRITE_AREA,
@@ -269,7 +269,7 @@ MapDevice(DeviceInfo& di)
// Try to map this time without write combining.
si.videoMemArea = map_physical_memory(
areaName,
(void*)videoRamAddr,
videoRamAddr,
videoRamSize,
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
src/add-ons/kernel/drivers/graphics/skeleton/driver.c
+20 -20
View File
@@ -110,7 +110,7 @@ static struct {
{0x0000, NULL}
};
static settings current_settings = { // see comments in skel.settings
static settings current_settings = { // see comments in skel.settings
// for driver
DRIVER_PREFIX ".accelerant",
false, // dumprom
@@ -129,7 +129,7 @@ static void dumprom (void *rom, uint32 size)
{
int fd;
uint32 cnt;
fd = open ("/boot/home/" DRIVER_PREFIX ".rom", O_WRONLY | O_CREAT, 0666);
if (fd < 0) return;
@@ -182,7 +182,7 @@ init_hardware(void) {
long pci_index = 0;
pci_info pcii;
bool found_one = false;
/* choke if we can't find the PCI bus */
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK)
return B_ERROR;
@@ -197,7 +197,7 @@ init_hardware(void) {
/* while there are more pci devices */
while ((*pci_bus->get_nth_pci_info)(pci_index, &pcii) == B_NO_ERROR) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == pcii.vendor_id) {
@@ -206,7 +206,7 @@ init_hardware(void) {
while (*devices) {
/* if we match a supported device */
if (*devices == pcii.device_id ) {
found_one = true;
goto done;
}
@@ -236,7 +236,7 @@ init_driver(void) {
const char *item;
char *end;
uint32 value;
// for driver
item = get_driver_parameter (settings_handle, "accelerant", "", "");
if ((strlen (item) > 0) && (strlen (item) < sizeof (current_settings.accelerant) - 1)) {
@@ -364,7 +364,7 @@ static status_t map_device(device_info *di)
{
si->use_clone_bugfix = 0;
}
/* work out a name for the register mapping */
sprintf(buffer, DEVICE_FORMAT " regs",
di->pcii.vendor_id, di->pcii.device_id,
@@ -374,13 +374,13 @@ static status_t map_device(device_info *di)
si->regs_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map regs as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
(si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
(void **)&(di->regs));
si->clone_bugfix_regs = (uint32 *) di->regs;
/* if mapping registers to vmem failed then pass on error */
if (si->regs_area < 0) return si->regs_area;
@@ -407,7 +407,7 @@ static status_t map_device(device_info *di)
rom_area = map_physical_memory(
buffer,
(void *)di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_base_pci,
di->pcii.u.h0.rom_size,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -430,7 +430,7 @@ static status_t map_device(device_info *di)
/* ROM was not assigned an adress, fetch it from ISA legacy memory map! */
rom_area = map_physical_memory(
buffer,
(void *)0x000c0000,
0x000c0000,
65536,
B_ANY_KERNEL_ADDRESS,
B_READ_AREA,
@@ -466,7 +466,7 @@ static status_t map_device(device_info *di)
si->fb_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
B_READ_AREA + B_WRITE_AREA,
@@ -477,13 +477,13 @@ static status_t map_device(device_info *di)
si->fb_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map framebuffer as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_registers_pci[frame_buffer],
di->pcii.u.h0.base_register_sizes[frame_buffer],
B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA + B_WRITE_AREA,
&(si->framebuffer));
}
/* if there was an error, delete our other areas and pass on error*/
if (si->fb_area < 0)
{
@@ -496,7 +496,7 @@ static status_t map_device(device_info *di)
si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[frame_buffer];
// remember settings for use here and in accelerant
si->settings = current_settings;
si->settings = current_settings;
/* in any case, return the result */
return si->fb_area;
@@ -527,7 +527,7 @@ static void probe_devices(void) {
/* while there are more pci devices */
while ((count < MAX_DEVICES) && ((*pci_bus->get_nth_pci_info)(pci_index, &(di->pcii)) == B_NO_ERROR)) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == di->pcii.vendor_id) {
@@ -613,7 +613,7 @@ eng_interrupt(void *data)
atomic_and(flags, ~SKD_HANDLER_INSTALLED);
exit0:
return handled;
return handled;
}
static status_t open_hook (const char* name, uint32 flags, void** cookie) {
@@ -737,7 +737,7 @@ mark_as_open:
/* send the cookie to the opener */
*cookie = di;
goto done;
@@ -809,7 +809,7 @@ free_hook (void* dev) {
/* disable and clear any pending interrupts */
disable_vbi(regs);
/* remove interrupt handler */
remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, eng_interrupt, di);
@@ -850,7 +850,7 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
strcpy(sig, current_settings.accelerant);
result = B_OK;
} break;
/* PRIVATE ioctl from here on */
case ENG_GET_PRIVATE_DATA: {
eng_get_private_data *gpd = (eng_get_private_data *)buf;
src/add-ons/kernel/drivers/graphics/tdfx/driver.c
+55 -55
View File
@@ -4,7 +4,7 @@
- PPC Port: Andreas Drewke (andreas_dr@gmx.de)
- Voodoo3Driver 0.02 (c) by Carwyn Jones (2002)
*/
/* standard kernel driver stuff */
@@ -133,7 +133,7 @@ static device_hooks graphics_device_hooks =
static uint16 voodoo_device_list[] =
{
BANSHEE, // Voodoo Banshee
VOODOO3, // Voodoo
VOODOO3, // Voodoo
0
};
@@ -171,9 +171,9 @@ static struct
/* TODO */
#define voodoo3_disableirq()
#define voodoo3_enableirq()
#define voodoo3_clearirq()
#define voodoo3_disableirq()
#define voodoo3_enableirq()
#define voodoo3_clearirq()
#define voodoo3_irqpending() 0
@@ -189,7 +189,7 @@ init_hardware(void)
long pci_index = 0;
pci_info pcii;
bool found_one = FALSE;
/* choke if we can't find the PCI bus */
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK)
return B_ERROR;
@@ -198,7 +198,7 @@ init_hardware(void)
while ((*pci_bus->get_nth_pci_info)(pci_index, &pcii) == B_NO_ERROR)
{
int vendor = 0;
ddprintf(("TDFXV3: init_hardware(): checking pci index %ld, device 0x%04x/0x%04x\n", pci_index, pcii.vendor_id, pcii.device_id));
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor)
@@ -212,7 +212,7 @@ init_hardware(void)
/* if we match a supported device */
if (*devices == pcii.device_id )
{
ddprintf(("TDFXV3: we support this device\n"));
found_one = TRUE;
goto done;
@@ -322,30 +322,30 @@ static status_t map_device(device_info *di)
ddprintf(("TDFXV3: enter map_device\n"));
/* enable memory mapped IO, disable VGA I/O */
tmp = get_pci(PCI_command, 2);
tmp |= (PCI_command_memory | PCI_command_io);
tmp |= (PCI_command_memory | PCI_command_io);
set_pci(PCI_command, 2, tmp);
ddprintf (("TDFXV3: regs: 0x%lx, size:0x%lx\n",_regs, _regs_size));
ddprintf (("TDFXV3: io: 0x%lx, size:0x%lx\n",iobase, iobase_size));
ddprintf (("TDFXV3: fb: 0x%lx, size:0x%lx\n",fb, fb_size));
ddprintf (("TDFXV3: regs: 0x%lx, size:0x%lx\n",_regs, _regs_size));
ddprintf (("TDFXV3: io: 0x%lx, size:0x%lx\n",iobase, iobase_size));
ddprintf (("TDFXV3: fb: 0x%lx, size:0x%lx\n",fb, fb_size));
/* map the areas */
sprintf(buffer, "%04X_%04X_%02X%02X%02X regs",
di->pcii.vendor_id, di->pcii.device_id,
di->pcii.bus, di->pcii.device, di->pcii.function);
si->regs_area = map_physical_memory(
buffer,
(void *)_regs,
_regs,
_regs_size,
B_ANY_KERNEL_ADDRESS,
0, /* B_READ_AREA + B_WRITE_AREA, */ /* neither read nor write, to hide it from user space apps */
(void **)&(di->regs));
/* return the error if there was some problem */
if (si->regs_area < 0) return si->regs_area;
#if __INTEL__
iobase_size = (iobase_size+(B_PAGE_SIZE-1))&~(B_PAGE_SIZE-1);
sprintf(buffer, "%04X_%04X_%02X%02X%02X io",
di->pcii.vendor_id, di->pcii.device_id,
di->pcii.bus, di->pcii.device, di->pcii.function);
@@ -356,11 +356,11 @@ static status_t map_device(device_info *di)
B_ANY_KERNEL_ADDRESS,
B_USER_CLONEABLE_AREA | B_READ_AREA | B_WRITE_AREA,
(void **)&(si->io));
// return the error if there was some problem
// return the error if there was some problem
/* remember the io_base address for inb, outb */
si->iobase = iobase;
#else
// PPC comes here
@@ -382,13 +382,13 @@ static status_t map_device(device_info *di)
B_ANY_KERNEL_ADDRESS,
B_USER_CLONEABLE_AREA | B_READ_AREA | B_WRITE_AREA,
(void **)&si->io);
// return the error if there was some problem
// return the error if there was some problem
/* remember the io_base address for inb, outb */
si->iobase = si->io + offset;
ddprintf (("TDFXV3: ioppc_3_cor: 0x%x, size:%li\n",iobase+offset, iobase_size));
ddprintf (("TDFXV3: ioppc_4(vM): 0x%x, size:%li\n",si->iobase, iobase_size));
ddprintf (("TDFXV3: ioppc_3_cor: 0x%x, size:%li\n",iobase+offset, iobase_size));
ddprintf (("TDFXV3: ioppc_4(vM): 0x%x, size:%li\n",si->iobase, iobase_size));
#endif
if (si->io_area < 0)
@@ -438,7 +438,7 @@ static status_t map_device(device_info *di)
&(si->framebuffer));
}
#endif
/* if there was an error, delete our other areas */
if (si->fb_area < 0) {
delete_area(si->regs_area);
@@ -448,7 +448,7 @@ static status_t map_device(device_info *di)
}
/* remember the DMA address of the frame buffer for BDirectWindow purposes */
si->framebuffer_pci = (void *)fb;
/* in any case, return the result */
ddprintf(("TDFXV3: leave map_device\n"));
return si->fb_area;
@@ -462,7 +462,7 @@ static void unmap_device(device_info *di)
ddprintf(("TDFXV3: unmap_device(%08lx) begins...\n", (uint32)di));
ddprintf(("\tregs_area: %ld\n\tfb_area: %ld\n", si->regs_area, si->fb_area));
/* disable memory mapped IO */
tmp = get_pci(PCI_command, 4);
tmp &= 0xfffffffc;
@@ -489,7 +489,7 @@ static void probe_devices(void)
while ((count < MAX_DEVICES) && ((*pci_bus->get_nth_pci_info)(pci_index, &(di->pcii)) == B_NO_ERROR))
{
int vendor = 0;
ddprintf(("TDFXV3: checking pci index %ld, device 0x%04x/0x%04x\n", pci_index, di->pcii.vendor_id, di->pcii.device_id));
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor)
@@ -543,7 +543,7 @@ next_device:
static uint32 thread_interrupt_work(int32 *flags, vuint32 *regs, shared_info *si)
{
uint32 handled = B_HANDLED_INTERRUPT;
/* release the vblank semaphore */
if (si->vblank >= 0)
@@ -600,7 +600,7 @@ voodoo_interrupt(void *data)
atomic_and(flags, ~SKD_HANDLER_INSTALLED);
exit0:
return handled;
return handled;
}
#if defined(POST_R4_0)
@@ -626,7 +626,7 @@ static int32 timer_interrupt_func(timer *te, uint32 pc)
/* insert code to sync to interrupts here */
if (!vbl_status) {
when -= si->blank_period - 4;
}
}
/* do the things we do when we notice a vertical retrace */
result = thread_interrupt_work(flags, regs, si);
@@ -652,45 +652,45 @@ static int32 fake_interrupt_thread_func(void *_di)
shared_info *si = di->si;
int32 *flags = &(si->flags);
vuint32 *regs = di->regs;
bigtime_t last_sync;
bigtime_t this_sync;
bigtime_t diff_sync;
uint32 counter = 1;
/* a lie, but we have to start somewhen */
last_sync = system_time() - 8333;
ddprintf(("TDFXV3: fake_interrupt_thread_func begins\ndi: 0x%08lx\nsi: 0x%08lx\nflags: 0x%08lx\n", (uint32)di, (uint32)si, (uint32)flags));
/* loop until notified */
while(atomic_and(flags, -1) & SKD_HANDLER_INSTALLED) {
/* see if "interrupts" are enabled */
if((volatile int32)(di->can_interrupt)) {
/* poll the retrace flag until set */
/* YOUR CODE HERE */
/* get the system_time */
this_sync = system_time();
/* do our stuff */
thread_interrupt_work(flags, regs, si);
} else {
/* get the system_time */
this_sync = system_time();
}
/* find out how long it took */
diff_sync = this_sync - last_sync;
/* back off a little so we're sure to catch the retrace */
diff_sync -= diff_sync / 10;
/*
impose some limits so we can recover from refresh rate changes
Supported refresh rates are 48 Hz - 120 Hz, so these limits should
@@ -699,27 +699,27 @@ static int32 fake_interrupt_thread_func(void *_di)
if(diff_sync < 8000) {
diff_sync = 8000; /* not less than 1/125th of sec */
}
if(diff_sync > 16666) {
diff_sync = 20000; /* not more than 1/40th of sec */
}
if((counter++ & 0x01ff) == 0) {
diff_sync >>= 2; /* periodically quarter the wait to resync */
}
/* update for next go-around */
last_sync = this_sync;
/* snooze until our next retrace */
snooze_until(this_sync + diff_sync, B_SYSTEM_TIMEBASE);
}
ddprintf(("TDFXV3: fake_interrupt_thread_func ends with flags = 0x%08lx\n", *flags));
/* gotta return something */
return B_OK;
}
#endif
@@ -851,7 +851,7 @@ static status_t open_hook (const char* name, uint32 flags, void** cookie)
/* bail if we can't add the timer */
if (result != B_OK) goto delete_the_sem;
#else
/* fake some kind of interrupt with a thread */
/* fake some kind of interrupt with a thread */
result = di->tid = spawn_kernel_thread(fake_interrupt_thread_func, "SKD fake interrupt", B_REAL_TIME_DISPLAY_PRIORITY, di);
/* bail if we can't spawn the thread */
if(result < 0) goto delete_the_sem;
@@ -872,7 +872,7 @@ mark_as_open:
/* send the cookie to the opener */
*cookie = di;
goto done;
@@ -949,7 +949,7 @@ free_hook (void* dev) {
voodoo3_disableirq();
/* disable and clear any pending interrupts */
*regs = *regs; /* CHANGE ME */
/* if we were faking the interrupts */
if ((di->pcii.u.h0.interrupt_pin == 0x00) || (di->pcii.u.h0.interrupt_line == 0xff)){
/* stop our interrupt faking thread */
@@ -966,7 +966,7 @@ free_hook (void* dev) {
/* After R4.0 we can do it ourselves, but we'd rather use timers */
#endif
/* otherwise */
} else {
/* remove interrupt handler */
remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, voodoo_interrupt, di);
@@ -1013,7 +1013,7 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len)
result = B_OK;
}
break;
/* PRIVATE ioctl from here on */
case VOODOO_GET_PRIVATE_DATA:
{
src/add-ons/kernel/drivers/graphics/vesa/vesa.cpp
+1 -1
View File
@@ -257,7 +257,7 @@ remap_frame_buffer(vesa_info& info, addr_t physicalBase, uint32 width,
}
if (remap) {
area_id area = map_physical_memory("vesa frame buffer", (void*)base,
area_id area = map_physical_memory("vesa frame buffer", base,
size, B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA,
(void**)&frameBuffer);
if (area < 0)
src/add-ons/kernel/drivers/graphics/via/driver.c
+17 -17
View File
@@ -115,7 +115,7 @@ static struct {
{0x0000, NULL}
};
static settings current_settings = { // see comments in skel.settings
static settings current_settings = { // see comments in skel.settings
// for driver
DRIVER_PREFIX ".accelerant",
false, // dumprom
@@ -134,7 +134,7 @@ static void dumprom (void *rom, uint32 size)
{
int fd;
uint32 cnt;
fd = open ("/boot/home/" DRIVER_PREFIX ".rom", O_WRONLY | O_CREAT, 0666);
if (fd < 0) return;
@@ -187,7 +187,7 @@ init_hardware(void) {
long pci_index = 0;
pci_info pcii;
bool found_one = false;
/* choke if we can't find the PCI bus */
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK)
return B_ERROR;
@@ -202,7 +202,7 @@ init_hardware(void) {
/* while there are more pci devices */
while ((*pci_bus->get_nth_pci_info)(pci_index, &pcii) == B_NO_ERROR) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == pcii.vendor_id) {
@@ -211,7 +211,7 @@ init_hardware(void) {
while (*devices) {
/* if we match a supported device */
if (*devices == pcii.device_id ) {
found_one = true;
goto done;
}
@@ -241,7 +241,7 @@ init_driver(void) {
const char *item;
char *end;
uint32 value;
// for driver
item = get_driver_parameter (settings_handle, "accelerant", "", "");
if ((strlen (item) > 0) && (strlen (item) < sizeof (current_settings.accelerant) - 1)) {
@@ -328,7 +328,7 @@ void uninit_driver(void) {
put_module(B_ISA_MODULE_NAME);
/* put the agp module away if it's there */
if (agp_bus)
if (agp_bus)
put_module(B_AGP_GART_MODULE_NAME);
}
@@ -373,7 +373,7 @@ static status_t map_device(device_info *di)
{
si->use_clone_bugfix = 0;
}
/* work out a name for the register mapping */
sprintf(buffer, DEVICE_FORMAT " regs",
di->pcii.vendor_id, di->pcii.device_id,
@@ -383,13 +383,13 @@ static status_t map_device(device_info *di)
si->regs_area = map_physical_memory(
buffer,
/* WARNING: Nvidia needs to map regs as viewed from PCI space! */
(void *) di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_registers_pci[registers],
di->pcii.u.h0.base_register_sizes[registers],
B_ANY_KERNEL_ADDRESS,
(si->use_clone_bugfix ? B_READ_AREA|B_WRITE_AREA : 0),
(void **)&(di->regs));
si->clone_bugfix_regs = (uint32 *) di->regs;
/* if mapping registers to vmem failed then pass on error */
if (si->regs_area < 0) return si->regs_area;
@@ -492,7 +492,7 @@ static status_t map_device(device_info *di)
B_READ_AREA + B_WRITE_AREA,
&(si->framebuffer));
}
/* if there was an error, delete our other areas and pass on error*/
if (si->fb_area < 0)
{
@@ -505,7 +505,7 @@ static status_t map_device(device_info *di)
si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[frame_buffer];
// remember settings for use here and in accelerant
si->settings = current_settings;
si->settings = current_settings;
/* in any case, return the result */
return si->fb_area;
@@ -536,7 +536,7 @@ static void probe_devices(void) {
/* while there are more pci devices */
while ((count < MAX_DEVICES) && ((*pci_bus->get_nth_pci_info)(pci_index, &(di->pcii)) == B_NO_ERROR)) {
int vendor = 0;
/* if we match a supported vendor */
while (SupportedDevices[vendor].vendor) {
if (SupportedDevices[vendor].vendor == di->pcii.vendor_id) {
@@ -622,7 +622,7 @@ eng_interrupt(void *data)
atomic_and(flags, ~SKD_HANDLER_INSTALLED);
exit0:
return handled;
return handled;
}
static status_t open_hook (const char* name, uint32 flags, void** cookie) {
@@ -725,7 +725,7 @@ mark_as_open:
/* send the cookie to the opener */
*cookie = di;
goto done;
@@ -797,7 +797,7 @@ free_hook (void* dev) {
/* disable and clear any pending interrupts */
disable_vbi(regs);
/* remove interrupt handler */
remove_io_interrupt_handler(di->pcii.u.h0.interrupt_line, eng_interrupt, di);
@@ -838,7 +838,7 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
strcpy(sig, current_settings.accelerant);
result = B_OK;
} break;
/* PRIVATE ioctl from here on */
case ENG_GET_PRIVATE_DATA: {
eng_get_private_data *gpd = (eng_get_private_data *)buf;
src/add-ons/kernel/drivers/graphics/vmware/device.c
+8 -8
View File
@@ -95,13 +95,13 @@ MapDevice()
/* Map the frame buffer */
si->fbArea = map_physical_memory("VMware frame buffer",
si->fbDma, si->fbSize, B_ANY_KERNEL_BLOCK_ADDRESS|B_MTR_WC,
(addr_t)si->fbDma, si->fbSize, B_ANY_KERNEL_BLOCK_ADDRESS|B_MTR_WC,
B_READ_AREA|B_WRITE_AREA, (void **)&si->fb);
if (si->fbArea < 0) {
/* Try again without write combining */
writeCombined = 0;
si->fbArea = map_physical_memory("VMware frame buffer",
si->fbDma, si->fbSize, B_ANY_KERNEL_BLOCK_ADDRESS,
(addr_t)si->fbDma, si->fbSize, B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA|B_WRITE_AREA, (void **)&si->fb);
}
if (si->fbArea < 0) {
@@ -114,7 +114,7 @@ MapDevice()
/* Map the fifo */
si->fifoArea = map_physical_memory("VMware fifo",
si->fifoDma, si->fifoSize, B_ANY_KERNEL_BLOCK_ADDRESS,
(addr_t)si->fifoDma, si->fifoSize, B_ANY_KERNEL_BLOCK_ADDRESS,
B_READ_AREA|B_WRITE_AREA, (void **)&si->fifo);
if (si->fifoArea < 0) {
TRACE("failed to map fifo\n");
@@ -267,7 +267,7 @@ UpdateCursor(SharedInfo *si)
WriteReg(SVGA_REG_CURSOR_X, si->cursorX);
WriteReg(SVGA_REG_CURSOR_Y, si->cursorY);
WriteReg(SVGA_REG_CURSOR_ON, si->cursorShow ? SVGA_CURSOR_ON_SHOW :
SVGA_CURSOR_ON_HIDE);
SVGA_CURSOR_ON_HIDE);
}
@@ -329,8 +329,8 @@ ControlHook(void *dev, uint32 msg, void *buf, size_t len)
for (i = 0; i < 256; i++) {
WriteReg(SVGA_PALETTE_BASE + 3 * i, *color++);
WriteReg(SVGA_PALETTE_BASE + 3 * i + 1, *color++);
WriteReg(SVGA_PALETTE_BASE + 3 * i + 2, *color++);
}
WriteReg(SVGA_PALETTE_BASE + 3 * i + 2, *color++);
}
return B_OK;
}
@@ -349,7 +349,7 @@ ControlHook(void *dev, uint32 msg, void *buf, size_t len)
UpdateCursor(si);
return B_OK;
}
case VMWARE_GET_DEVICE_NAME:
dprintf("device: VMWARE_GET_DEVICE_NAME %s\n", gPd->names[0]);
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
@@ -360,7 +360,7 @@ ControlHook(void *dev, uint32 msg, void *buf, size_t len)
strlcpy((char *)buf, gPd->names[0], B_PATH_NAME_LENGTH);
#endif
return B_OK;
}
TRACE("ioctl: %ld, %p, %ld\n", msg, buf, len);
src/add-ons/kernel/drivers/misc/mem.c
+3 -3
View File
@@ -155,7 +155,7 @@ mem_map_target(off_t position, size_t length, uint32 protection,
void **virtualAddress)
{
area_id area;
void *physicalAddress;
phys_addr_t physicalAddress;
size_t offset;
size_t size;
@@ -164,10 +164,10 @@ mem_map_target(off_t position, size_t length, uint32 protection,
return EINVAL;
/* the first page address */
physicalAddress = (void *)(addr_t)(position & ~((off_t)B_PAGE_SIZE - 1));
physicalAddress = (phys_addr_t)position & ~((off_t)B_PAGE_SIZE - 1);
/* offset of target into it */
offset = position - (off_t)(addr_t)physicalAddress;
offset = position - (off_t)physicalAddress;
/* size of the whole mapping (page rounded) */
size = (offset + length + B_PAGE_SIZE - 1) & ~((size_t)B_PAGE_SIZE - 1);
src/add-ons/kernel/drivers/misc/poke.c
+4 -3
View File
@@ -208,7 +208,7 @@ poke_control(void* cookie, uint32 op, void* arg, size_t length)
pci_io_args* ioctl = (pci_io_args*)arg;
if (ioctl->signature != POKE_SIGNATURE)
return B_BAD_VALUE;
ioctl->value = pci->read_pci_config(ioctl->bus, ioctl->device,
ioctl->function, ioctl->offset, ioctl->size);
return B_OK;
@@ -245,7 +245,8 @@ poke_control(void* cookie, uint32 op, void* arg, size_t length)
return B_BAD_VALUE;
result = get_memory_map(ioctl->address, ioctl->size, &table, 1);
ioctl->physical_address = table.address;
ioctl->physical_address = (void*)(addr_t)table.address;
// TODO: mem_map_args::physical_address should be phys_addr_t!
ioctl->size = table.size;
return result;
}
@@ -257,7 +258,7 @@ poke_control(void* cookie, uint32 op, void* arg, size_t length)
return B_BAD_VALUE;
ioctl->area = map_physical_memory(ioctl->name,
ioctl->physical_address, ioctl->size, ioctl->flags,
(addr_t)ioctl->physical_address, ioctl->size, ioctl->flags,
ioctl->protection, (void**)&ioctl->address);
return ioctl->area;
}
src/add-ons/kernel/drivers/network/bcm440x/b44mm.h
+15 -15
View File
@@ -42,7 +42,7 @@ typedef vint32 MM_ATOMIC_T;
#define MM_MEMREADL(ptr) __raw_readl(ptr)
#ifdef __INTEL__
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#else
#ifdef __HAIKU__
#define mb() memory_write_barrier()
@@ -70,28 +70,28 @@ extern int b44_Packet_Desc_Size;
struct be_b44_dev {
LM_DEVICE_BLOCK lm_dev;
struct pci_info pci_data;
sem_id packet_release_sem;
//sem_id interrupt_sem;
//thread_id interrupt_handler;
LM_RX_PACKET_Q RxPacketReadQ;
void *mem_list[16];
int mem_list_num;
area_id lockmem_list[16];
int lockmem_list_num;
area_id mem_base;
vint32 opened;
int block;
spinlock lock;
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
sem_id linkChangeSem;
#endif
@@ -99,7 +99,7 @@ struct be_b44_dev {
struct B_UM_PACKET {
struct _LM_PACKET pkt;
void *data;
size_t size;
};
@@ -109,9 +109,9 @@ static inline void b44_MM_MapRxDma(PLM_DEVICE_BLOCK pDevice,
LM_UINT32 *paddr)
{
physical_entry entry;
get_memory_map(pPacket->u.Rx.pRxBufferVirt,pPacket->u.Rx.RxBufferSize,&entry,1);
*paddr = (LM_UINT32) entry.address;
*paddr = entry.address;
}
static inline void b44_MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
@@ -120,9 +120,9 @@ static inline void b44_MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
{
struct B_UM_PACKET *pkt = (struct B_UM_PACKET *)pPacket;
physical_entry entry;
get_memory_map(pkt->data,pkt->size,&entry,1);
*paddr = (LM_UINT32) entry.address;
*paddr = entry.address;
*len = pPacket->PacketSize;
}
@@ -143,5 +143,5 @@ static inline void b44_MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
if (!(expr)) { \
dprintf("ASSERT failed: %s\n", #expr); \
}
#endif
src/add-ons/kernel/drivers/network/bcm440x/b44um.c
+17 -14
View File
@@ -108,7 +108,7 @@ init_driver(void)
be_b44_dev_cards[sCardsFound].packet_release_sem = create_sem(0,
sDeviceNames[sCardsFound]);
be_b44_dev_cards[sCardsFound].mem_list_num = 0;
be_b44_dev_cards[sCardsFound].lockmem_list_num = 0;
be_b44_dev_cards[sCardsFound].lockmem_list_num = 0;
be_b44_dev_cards[sCardsFound].opened = 0;
be_b44_dev_cards[sCardsFound].block = 1;
be_b44_dev_cards[sCardsFound].lock = 0;
@@ -141,7 +141,7 @@ init_driver(void)
void
uninit_driver(void)
{
struct be_b44_dev *pUmDevice;
struct be_b44_dev *pUmDevice;
int i, j;
for (j = 0; j < sCardsFound; j++) {
@@ -150,13 +150,13 @@ uninit_driver(void)
free(pUmDevice->mem_list[i]);
for (i = 0; i < pUmDevice->lockmem_list_num; i++)
delete_area(pUmDevice->lockmem_list[i]);
delete_area(pUmDevice->mem_base);
delete_sem(be_b44_dev_cards[j].packet_release_sem);
free((void *)sDeviceNames[j]);
}
mempool_exit();
}
@@ -271,7 +271,7 @@ b44_ioctl(void *cookie,uint32 op, void *data, size_t len)
case ETHER_GET_LINK_STATE:
{
ether_link_state_t state;
if (pUmDevice->lm_dev.corerev < 7) {
b44_LM_PollLink(&pUmDevice->lm_dev);
}
@@ -295,7 +295,7 @@ b44_ioctl(void *cookie,uint32 op, void *data, size_t len)
return user_memcpy(data, &state, sizeof(ether_link_state_t));
}
case ETHER_SET_LINK_STATE_SEM:
{
if (user_memcpy(&pUmDevice->linkChangeSem, data, sizeof(sem_id)) < B_OK) {
@@ -484,7 +484,10 @@ b44_MM_MapMemBase(PLM_DEVICE_BLOCK pDevice)
get_module(B_PCI_MODULE_NAME,(module_info **)&pci);
size = ROUNDUP(size,B_PAGE_SIZE);
pUmDevice->mem_base = map_physical_memory("bcm440x_regs",(void *)(pUmDevice->pci_data.u.h0.base_registers[0]),size,B_ANY_KERNEL_BLOCK_ADDRESS,B_READ_AREA | B_WRITE_AREA,(void **)(&pDevice->pMappedMemBase));
pUmDevice->mem_base = map_physical_memory("bcm440x_regs",
pUmDevice->pci_data.u.h0.base_registers[0], size,
B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA,
(void **)(&pDevice->pMappedMemBase));
return LM_STATUS_SUCCESS;
}
@@ -508,7 +511,7 @@ b44_MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice)
{
struct be_b44_dev *dev = (struct be_b44_dev *)pDevice;
PLM_PACKET pPacket;
while (1) {
pPacket = (PLM_PACKET)
QQ_PopHead(&pDevice->RxPacketReceivedQ.Container);
@@ -541,7 +544,7 @@ tx_cleanup_thread(void *us)
struct B_UM_PACKET *pUmPacket;
cpu_status cpu;
while (1) {
while (1) {
cpu = disable_interrupts();
acquire_spinlock(&pUmDevice->lock);
@@ -565,7 +568,7 @@ tx_cleanup_thread(void *us)
}
return LM_STATUS_SUCCESS;
}
/*LM_STATUS b44_MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
LM_STATUS b44_MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);*/
@@ -582,7 +585,7 @@ b44_MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
*pMemoryBlockVirt = dev->mem_list[(dev->mem_list_num)++] = (void *)malloc(BlockSize);
return LM_STATUS_SUCCESS;
}
LM_STATUS
b44_MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
@@ -604,7 +607,7 @@ b44_MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
*pMemoryBlockVirt = (PLM_VOID) pvirt;
get_memory_map(pvirt,BlockSize,&entry,1);
*pMemoryBlockPhy = (LM_PHYSICAL_ADDRESS) entry.address;
*pMemoryBlockPhy = entry.address;
return LM_STATUS_SUCCESS;
}
@@ -629,7 +632,7 @@ b44_MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status)
{
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
struct be_b44_dev *pUmDevice = (struct be_b44_dev *)pDevice;
if (pUmDevice->linkChangeSem != -1)
release_sem_etc(pUmDevice->linkChangeSem, 1,
B_DO_NOT_RESCHEDULE);
src/add-ons/kernel/drivers/network/bcm570x/b57um.c
+3 -3
View File
@@ -780,7 +780,7 @@ MM_MapMemBase(PLM_DEVICE_BLOCK pDevice)
size = ROUND_UP_TO_PAGE(size);
pUmDevice->mem_base = map_physical_memory("broadcom_regs",
(void *)(pUmDevice->pci_data.u.h0.base_registers[0]), size,
pUmDevice->pci_data.u.h0.base_registers[0], size,
B_ANY_KERNEL_BLOCK_ADDRESS, 0,
(void **)(&pDevice->pMappedMemBase));
@@ -897,8 +897,8 @@ MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
*pMemoryBlockVirt = (PLM_VOID) pvirt;
get_memory_map(pvirt,BlockSize,&entry,1);
pMemoryBlockPhy->Low = (uint32)(entry.address);
pMemoryBlockPhy->High = 0;
pMemoryBlockPhy->Low = (uint32)entry.address;
pMemoryBlockPhy->High = (uint32)(entry.address >> 32);
/* We only support 32 bit */
return LM_STATUS_SUCCESS;
src/add-ons/kernel/drivers/network/bcm570x/mm.h
+19 -19
View File
@@ -42,13 +42,13 @@ typedef vint32 MM_ATOMIC_T;
#define MM_MEMREADL(ptr) __raw_readl(ptr)
#ifdef __INTEL__
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#else
#ifdef __HAIKU__
#define mb() memory_write_barrier()
#else
#warning no memory barrier function defined.
#define mb()
#define mb()
#endif
#endif
#define wmb() mb()
@@ -72,28 +72,28 @@ extern int b57_Packet_Desc_Size;
struct be_b57_dev {
struct _LM_DEVICE_BLOCK lm_dev;
struct pci_info pci_data;
sem_id packet_release_sem;
//sem_id interrupt_sem;
//thread_id interrupt_handler;
LM_RX_PACKET_Q RxPacketReadQ;
void *mem_list[16];
int mem_list_num;
area_id lockmem_list[16];
int lockmem_list_num;
area_id mem_base;
vint32 opened;
int block;
spinlock lock;
cpu_status cpu;
#ifdef HAIKU_TARGET_PLATFORM_HAIKU
sem_id linkChangeSem;
#endif
@@ -101,7 +101,7 @@ struct be_b57_dev {
struct B_UM_PACKET {
struct _LM_PACKET pkt;
void *data;
size_t size;
};
@@ -112,10 +112,10 @@ static inline void MM_MapRxDma(PLM_DEVICE_BLOCK pDevice,
{
physical_entry entry;
struct B_UM_PACKET *bpkt = (struct B_UM_PACKET *)(pPacket);
get_memory_map(bpkt->data,pPacket->u.Rx.RxBufferSize,&entry,1);
paddr->Low = (LM_UINT32) entry.address;
paddr->High = 0L;
paddr->Low = (LM_UINT32)entry.address;
paddr->High = (LM_UINT32)(entry.address >> 32);
}
static inline void MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
@@ -124,10 +124,10 @@ static inline void MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
{
struct B_UM_PACKET *pkt = (struct B_UM_PACKET *)pPacket;
physical_entry entry;
get_memory_map(pkt->data,pkt->size,&entry,1);
paddr->Low = (LM_UINT32) entry.address;
paddr->High = 0L;
paddr->Low = (LM_UINT32)entry.address;
paddr->High = (LM_UINT32)(entry.address >> 32);
*len = pPacket->PacketSize;
}
@@ -154,7 +154,7 @@ static inline void MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
#define MM_RELEASE_PHY_LOCK_IN_IRQ(_pDevice) /*\
release_spinlock(&(((struct be_b57_dev *)(_pDevice))->lock)); \
enable_interrupts(((struct be_b57_dev *)(_pDevice))->cpu);*/
#define MM_PTR(_ptr) ((unsigned long) (_ptr))
#define MM_UINT_PTR(_ptr) ((unsigned long) (_ptr))
#define printf(fmt, args...) dprintf(fmt, ##args)
@@ -165,5 +165,5 @@ static inline void MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
if (!(expr)) { \
dprintf("ASSERT failed: %s\n", #expr); \
}
#endif
src/add-ons/kernel/drivers/network/dp83815/driver.c
+6 -4
View File
@@ -162,7 +162,9 @@ static status_t close_hook( void * );
TRACE(( kDevName " _open_hook(): PCI base=%lx size=%lx offset=%lx\n", base, size, offset));
data->ioarea = map_physical_memory(kDevName " Regs", (void *)base, size, B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA, (void **)&data->reg_base);
data->ioarea = map_physical_memory(kDevName " Regs", base, size,
B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA,
(void **)&data->reg_base);
data->reg_base = data->reg_base + offset;
}
@@ -654,10 +656,10 @@ static status_t init_ring_buffers(dp83815_properties_t *data)
get_area_info(data->mem_area, &info);
get_memory_map(info.address, info.size, map, 4);
desc_base_phys_addr = (int)map[0].address + NUM_BUFFS*BUFFER_SIZE;
desc_base_virt_addr = (info.address + NUM_BUFFS*BUFFER_SIZE);
desc_base_phys_addr = map[0].address + NUM_BUFFS*BUFFER_SIZE;
desc_base_virt_addr = info.address + NUM_BUFFS*BUFFER_SIZE;
buff_base_phys_addr = (int)map[0].address;
buff_base_phys_addr = map[0].address;
buff_base_virt_addr = info.address;
RxDescRing = desc_base_virt_addr;
src/add-ons/kernel/drivers/network/dp83815/util.c
+4 -2
View File
@@ -63,6 +63,7 @@ round_to_pagesize(uint32 size)
area_id
alloc_mem(void **log, void **phy, size_t size, const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * logadr;
area_id areaid;
@@ -87,7 +88,7 @@ alloc_mem(void **log, void **phy, size_t size, const char *name)
if (log)
*log = logadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
dprintf("area = %ld, size = %ld, log = %p, phy = %p\n",areaid,size,logadr,pe.address);
return areaid;
}
@@ -111,7 +112,8 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (void *) ( (uint32)phy - offset );
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, B_READ_AREA | B_WRITE_AREA, &mapadr);
*log = (void *) ( (uint32)mapadr + offset );
dprintf("physical = %p, logical = %p, offset = %#lx, phyadr = %p, mapadr = %p, size = %#lx, area = %#lx\n",
src/add-ons/kernel/drivers/network/etherpci/etherpci.c
+76 -73
View File
@@ -20,7 +20,7 @@
#define kDevName "etherpci"
#define kDevDir "net/" kDevName "/"
#define DEVNAME_LENGTH 64
#define DEVNAME_LENGTH 64
#define MAX_CARDS 4 /* maximum number of driver instances */
int32 api_version = B_CUR_DRIVER_API_VERSION;
@@ -76,12 +76,12 @@ device_hooks *find_device(const char *name);
* register page and it may not be 100% reliable. The technique used is to
* make sure all ring headers are zeroed out before packets are received
* into them. Then, if you detect a non-zero ring header, you can be pretty
* sure that it is another packet.
*
* sure that it is another packet.
*
* We never read the "might-be-a-packet" immediately. Instead, we just
* release a semaphore so that the next read will occur later on enough
* so that the ring header information should be completely filled in.
*
*
*/
#define STAY_ON_PAGE_0 0
@@ -131,8 +131,8 @@ typedef struct etherpci_private {
/*
* Most recent values of the error statistics to detect any changes in them
*/
int rerrs_last;
int werrs_last;
int rerrs_last;
int werrs_last;
int interrs_last;
int frame_errs_last;
int crc_errs_last;
@@ -157,7 +157,7 @@ typedef struct etherpci_private {
int EC_RINGSIZE;
uint32 debug;
} etherpci_private_t;
@@ -181,13 +181,13 @@ typedef struct etherpci_private {
#if __INTEL__
uint8 ether_inb(etherpci_private_t *device, uint32 offset) {
uint8 result;
uint8 result;
result = ((*gPCIModInfo->read_io_8)(device->reg_base + (offset)));
ETHER_DEBUG(PCI_IO, device->debug, " inb(%x) %x \n", offset, result);
return result;
};
uint16 ether_inw(etherpci_private_t *device, uint32 offset) {
uint16 result;
uint16 result;
result = ((*gPCIModInfo->read_io_16)(device->reg_base + (offset)));
ETHER_DEBUG(PCI_IO, device->debug, " inw(%x) %x \n", offset, result);
return result;
@@ -205,14 +205,14 @@ void ether_outw(etherpci_private_t *device, uint32 offset, uint16 value) {
#else /* PPC */
uint8 ether_inb(etherpci_private_t *device, uint32 offset) {
uint8 result;
uint8 result;
result = (*((volatile uint8*) (device->reg_base + (offset)))); __eieio();
ETHER_DEBUG(PCI_IO, device->debug, " inb(%x) %x \n", offset, result);
return result;
};
uint16 ether_inw(etherpci_private_t *device, uint32 offset) {
uint16 result;
uint16 result;
result = (*((volatile uint16*) (device->reg_base + (offset)))); __eieio();
ETHER_DEBUG(PCI_IO, device->debug, " inw(%x) %x \n", offset, result);
return result;
@@ -243,7 +243,7 @@ static int etherpci(int argc, char **argv);
#endif
/*
* io_lock gets you exclusive access to the card, except that
* io_lock gets you exclusive access to the card, except that
* the interrupt handler can still run.
* There is probably no need to io_lock() a 3com card, so look into
* removing it for that case.
@@ -484,7 +484,7 @@ wait_for_dma_complete(etherpci_private_t *data, unsigned short addr,
if (bogus >= MAXBOGUS * 2) {
/*
* On some cards, the counters will never clear.
* On some cards, the counters will never clear.
* So only print this message when debugging.
*/
dprintf("Bogus alert: waiting for counters to zero\n");
@@ -558,9 +558,9 @@ etherpci_min(etherpci_private_t *data, unsigned char *dst,
len++;
ether_outb(data, EN0_RCNTLO, len & 0xff);
ether_outb(data, EN0_RCNTHI, len >> 8);
ether_outb(data, EN0_RADDRLO, src & 0xff);
ether_outb(data, EN0_RADDRHI, src >> 8);
ether_outb(data, EN0_RCNTHI, len >> 8);
ether_outb(data, EN0_RADDRLO, src & 0xff);
ether_outb(data, EN0_RADDRHI, src >> 8);
ether_outb(data, EN_CCMD, ENC_DMAREAD);
for (i = 0; i < len; i += 2) {
@@ -720,7 +720,7 @@ probe(etherpci_private_t *data)
reg = ether_inb(data, EN_CCMD);
if (reg != (ENC_NODMA|ENC_STOP|ENC_PAGE0)) {
dprintf("command register failed: %02x != %02x\n", reg, ENC_NODMA|ENC_STOP);
dprintf("command register failed: %02x != %02x\n", reg, ENC_NODMA|ENC_STOP);
return 0;
}
@@ -819,7 +819,7 @@ init(etherpci_private_t *data)
/* set multicast address */
for (i = 0; i < 8; i++) {
ether_outb(data, EN1_MULT+i, 0xff);
ether_outb(data, EN1_MULT+i, 0xff);
}
data->nmulti = 0;
@@ -872,7 +872,7 @@ setboundary(etherpci_private_t *data, unsigned char nextboundary)
/*! Start resetting the chip, because of ring overflow */
static int
static int
reset(etherpci_private_t *data)
{
unsigned char cmd;
@@ -920,8 +920,8 @@ etherpci_interrupt(void *_data)
data->ints++;
ETHER_DEBUG(INTERRUPT, data->debug, "ENTR isr=%x & %x?\n",getisr(data), INTS_WE_CARE_ABOUT);
for (INTR_LOCK(data, isr = getisr(data));
isr & INTS_WE_CARE_ABOUT;
for (INTR_LOCK(data, isr = getisr(data));
isr & INTS_WE_CARE_ABOUT;
INTR_LOCK(data, isr = getisr(data))) {
if (isr & ISR_RECEIVE) {
data->rints++;
@@ -1009,7 +1009,7 @@ check_errors(etherpci_private_t *data)
DOIT(data->frames_lost, "Frames lost now %d\n");
#undef DOIT
#if 0
/*
/*
* these are normal errors because collisions are normal
* so don't make a big deal about them.
*/
@@ -1103,7 +1103,7 @@ copy_packet(etherpci_private_t *data, unsigned char *ether_buf,
if (ring.next_packet < data->EC_RXBUF_START_PAGE
|| ring.next_packet >= data->EC_RXBUF_END_PAGE) {
dprintf("etherpci_read: bad next packet! (%02x,%u,%02x) (%d)\n",
dprintf("etherpci_read: bad next packet! (%02x,%u,%02x) (%d)\n",
ring.status, ring.next_packet, ring.count, data->boundary);
data->rerrs++;
@@ -1115,7 +1115,7 @@ copy_packet(etherpci_private_t *data, unsigned char *ether_buf,
len = swapshort(ring.count);
rlen = len - 4;
if (rlen < ETHER_MIN_SIZE || rlen > ETHER_MAX_SIZE) {
dprintf("etherpci_read: bad length! (%02x,%u,%02x) (%d)\n",
dprintf("etherpci_read: bad length! (%02x,%u,%02x) (%d)\n",
ring.status, ring.next_packet, ring.count, data->boundary);
data->rerrs++;
@@ -1187,26 +1187,29 @@ enable_addressing(etherpci_private_t *data)
uint32 base, size, offset;
base = data->pciInfo->u.h0.base_registers[0];
size = data->pciInfo->u.h0.base_register_sizes[0];
/* Round down to nearest page boundary */
base = base & ~(B_PAGE_SIZE-1);
/* Adjust the size */
offset = data->pciInfo->u.h0.base_registers[0] - base;
size += offset;
size = (size +(B_PAGE_SIZE-1)) & ~(B_PAGE_SIZE-1);
dprintf(kDevName ": PCI base=%x size=%x offset=%x\n", base, size, offset);
if ((data->ioarea = map_physical_memory(kDevName "_regs", (void *)base, size, B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA, (void **)&data->reg_base)) < 0)
if ((data->ioarea = map_physical_memory(kDevName "_regs", base, size,
B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA,
(void **)&data->reg_base)) < 0) {
return B_ERROR;
}
data->reg_base = data->reg_base + offset;
#endif
#endif
dprintf(kDevName ": reg_base=%lx\n", data->reg_base);
/* enable pci address access */
/* enable pci address access */
cmd = (gPCIModInfo->read_pci_config)(data->pciInfo->bus, data->pciInfo->device, data->pciInfo->function, PCI_command, 2);
(gPCIModInfo->write_pci_config)(data->pciInfo->bus, data->pciInfo->device, data->pciInfo->function, PCI_command, 2, cmd | PCI_command_io);
@@ -1256,8 +1259,8 @@ domulti(etherpci_private_t *data, char *addr)
static int
etherpci(int argc, char **argv) {
uint16 i,j;
const char * usage = "usage: etherpci { Function_calls | PCI_IO | Stats | Rx_trace | Tx_trace }\n";
const char * usage = "usage: etherpci { Function_calls | PCI_IO | Stats | Rx_trace | Tx_trace }\n";
if (argc < 2) {
kprintf("%s",usage); return 0;
@@ -1268,56 +1271,56 @@ etherpci(int argc, char **argv) {
case 'F':
case 'f':
gdev->debug ^= FUNCTION;
if (gdev->debug & FUNCTION)
if (gdev->debug & FUNCTION)
kprintf("Function() call trace Enabled\n");
else
else
kprintf("Function() call trace Disabled\n");
break;
break;
case 'N':
case 'n':
gdev->debug ^= SEQ;
if (gdev->debug & SEQ)
if (gdev->debug & SEQ)
kprintf("Sequence numbers packet trace Enabled\n");
else
else
kprintf("Sequence numbers packet trace Disabled\n");
break;
break;
case 'R':
case 'r':
gdev->debug ^= RX;
if (gdev->debug & RX)
if (gdev->debug & RX)
kprintf("Receive packet trace Enabled\n");
else
else
kprintf("Receive packet trace Disabled\n");
break;
case 'T':
case 't':
gdev->debug ^= TX;
if (gdev->debug & TX)
if (gdev->debug & TX)
kprintf("Transmit packet trace Enabled\n");
else
else
kprintf("Transmit packet trace Disabled\n");
break;
break;
case 'S':
case 's':
kprintf(kDevName " statistics\n");
kprintf(kDevName " statistics\n");
kprintf("rx_ints %d, tx_ints %d\n", gdev->rints, gdev->wints);
kprintf("resets %d \n", gdev->resets);
kprintf("crc_errs %d, frame_errs %d, frames_lost %d\n", gdev->crc_errs, gdev->frame_errs, gdev->frames_lost);
break;
break;
case 'P':
case 'p':
gdev->debug ^= PCI_IO;
if (gdev->debug & PCI_IO)
if (gdev->debug & PCI_IO)
kprintf("PCI IO trace Enabled\n");
else
else
kprintf("PCI IO trace Disabled\n");
break;
break;
default:
kprintf("%s",usage);
return 0;
}
}
return 0;
}
#endif /* DEBUGGER_COMMAND */
@@ -1355,13 +1358,13 @@ init_driver(void)
char devName[64];
int32 i;
dprintf(kDevName ": init_driver ");
dprintf(kDevName ": init_driver ");
if ((status = get_module( B_PCI_MODULE_NAME, (module_info **)&gPCIModInfo )) != B_OK) {
dprintf(kDevName " Get module failed! %s\n", strerror(status ));
return status;
}
/* Find Lan cards*/
if ((entries = get_pci_list(gDevList, MAX_CARDS )) == 0) {
dprintf("init_driver: " kDevName " not found\n");
@@ -1370,7 +1373,7 @@ init_driver(void)
return B_ERROR;
}
dprintf("\n");
/* Create device name list*/
for (i=0; i<entries; i++ )
{
@@ -1379,7 +1382,7 @@ init_driver(void)
strcpy(gDevNameList[i], devName);
}
gDevNameList[i] = NULL;
return B_OK;
}
@@ -1418,7 +1421,7 @@ find_device(const char *name)
const char**
publish_devices(void)
publish_devices(void)
{
dprintf(kDevName ": publish_devices()\n");
return (const char **)gDevNameList;
@@ -1429,7 +1432,7 @@ publish_devices(void)
/*! Implements the read() system call to the ethernet driver */
static status_t
static status_t
read_hook(void *_data, off_t pos, void *buf, size_t *len)
{
etherpci_private_t *data = (etherpci_private_t *) _data;
@@ -1491,7 +1494,7 @@ open_hook(const char *name, uint32 flags, void **cookie)
goto err0;
}
memset(data, 0, sizeof(etherpci_private_t));
/* Setup the cookie */
data->pciInfo = gDevList[devID];
data->devID = devID;
@@ -1501,12 +1504,12 @@ open_hook(const char *name, uint32 flags, void **cookie)
data->debug = DEFAULT_DEBUG_FLAGS;
ETHER_DEBUG(FUNCTION, data->debug, kDevName ": open %s dev=%p\n", name, data);
#if DEBUGGER_COMMAND
gdev = data;
add_debugger_command (kDevName, etherpci, "Ethernet driver Info");
#endif
/* enable access to the cards address space */
if ((status = enable_addressing(data)) != B_OK)
goto err1;
@@ -1521,7 +1524,7 @@ open_hook(const char *name, uint32 flags, void **cookie)
/* Setup interrupts */
install_io_interrupt_handler( data->pciInfo->u.h0.interrupt_line, etherpci_interrupt, *cookie, 0 );
dprintf("Interrupts installed at %x\n", data->pciInfo->u.h0.interrupt_line);
/* Init Device */
init(data);
@@ -1536,8 +1539,8 @@ err1:
#if DEBUGGER_COMMAND
remove_debugger_command (kDevName, etherpci);
#endif
free(data);
free(data);
err0:
atomic_and(&gOpenMask, ~mask);
dprintf(kDevName ": open failed!\n");
@@ -1581,21 +1584,21 @@ close_hook(void *_data)
/*
* Reset all the statistics
*/
data->ints = 0;
data->rints = 0;
data->rerrs = 0;
data->wints = 0;
data->werrs = 0;
data->reads = 0;
data->writes = 0;
data->ints = 0;
data->rints = 0;
data->rerrs = 0;
data->wints = 0;
data->werrs = 0;
data->reads = 0;
data->writes = 0;
data->interrs = 0;
data->resets = 0;
data->frame_errs = 0;
data->crc_errs = 0;
data->frames_lost = 0;
data->rerrs_last = 0;
data->werrs_last = 0;
data->rerrs_last = 0;
data->werrs_last = 0;
data->interrs_last = 0;
data->frame_errs_last = 0;
data->crc_errs_last = 0;
@@ -1648,7 +1651,7 @@ write_hook(void *_data, off_t pos, const void *buf, size_t *len)
return B_INTERRUPTED;
}
/*
* Wait for somebody else (if any) to finish transmitting
* Wait for somebody else (if any) to finish transmitting
*/
status = output_wait(data, ETHER_TRANSMIT_TIMEOUT);
if (status < B_NO_ERROR || data->interrupted) {
@@ -1675,7 +1678,7 @@ write_hook(void *_data, off_t pos, const void *buf, size_t *len)
data->writes++;
io_unlock(data);
atomic_add(&data->inrw, -1);
*len = buflen;
*len = buflen;
if (data->debug & TX)
dump_packet("TX:",(unsigned char *) buf, buflen);
src/add-ons/kernel/drivers/network/ipro1000/if_em_osdep.h
+1 -1
View File
@@ -125,7 +125,7 @@ static inline unsigned long vtophys(unsigned long virtual_addr)
err = get_memory_map((void *)virtual_addr, 2046, &pe, 1);
if (err < 0)
panic("ipro1000: get_memory_map failed for %p, error %08lx\n", (void *)virtual_addr, err);
return (unsigned long) pe.address;
return pe.address;
}
#define M_DEVBUF 1
src/add-ons/kernel/drivers/network/ipro1000/util.c
+6 -5
View File
@@ -1,7 +1,7 @@
/* Intel PRO/1000 Family Driver
* Copyright (C) 2004 Marcus Overhagen <marcus@overhagen.de>. All rights reserved.
*
* Permission to use, copy, modify and distribute this software and its
* Permission to use, copy, modify and distribute this software and its
* documentation for any purpose and without fee is hereby granted, provided
* that the above copyright notice appear in all copies, and that both the
* copyright notice and this permission notice appear in supporting documentation.
@@ -36,17 +36,18 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection, const char *name
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = ROUNDUP(size + offset, B_PAGE_SIZE);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
area = map_physical_memory(name, (addr_t)phyadr, size,
B_ANY_KERNEL_BLOCK_ADDRESS, protection, &mapadr);
if (area < B_OK) {
ERROROUT3("mapping '%s' failed, error 0x%lx (%s)\n", name, area, strerror(area));
return area;
}
*virt = (char *)mapadr + offset;
INIT_DEBUGOUT7("physical = %p, virtual = %p, offset = %ld, phyadr = %p, mapadr = %p, size = %ld, area = 0x%08lx\n",
phy, *virt, offset, phyadr, mapadr, size, area);
return area;
}
@@ -55,7 +56,7 @@ area_malloc(size_t size)
{
void *p;
size = ROUNDUP(size, B_PAGE_SIZE);
if (create_area("area_malloc", &p, B_ANY_KERNEL_ADDRESS, size, B_FULL_LOCK, 0) < 0)
return 0;
return p;
src/add-ons/kernel/drivers/network/rtl8169/util.c
+3 -2
View File
@@ -37,6 +37,7 @@ area_id
alloc_contiguous(void **virt, void **phy, size_t size, uint32 protection,
const char *name)
{
// TODO: phy should be phys_addr_t*!
physical_entry pe;
void * virtadr;
area_id areaid;
@@ -61,7 +62,7 @@ alloc_contiguous(void **virt, void **phy, size_t size, uint32 protection,
if (virt)
*virt = virtadr;
if (phy)
*phy = pe.address;
*phy = (void*)(addr_t)pe.address;
TRACE("area = %ld, size = %ld, virt = %p, phy = %p\n", areaid, size, virtadr, pe.address);
return areaid;
}
@@ -81,7 +82,7 @@ map_mem(void **virt, void *phy, size_t size, uint32 protection,
offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = (char *)phy - offset;
size = round_to_pagesize(size + offset);
area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_ADDRESS,
area = map_physical_memory(name, (addr_t)phyadr, size, B_ANY_KERNEL_ADDRESS,
protection, &mapadr);
if (area < B_OK) {
ERROR("mapping '%s' failed, error 0x%lx (%s)\n", name, area, strerror(area));
src/add-ons/kernel/drivers/network/sis900/sis900.c
+10 -10
View File
@@ -71,13 +71,13 @@ const static struct mii_chip_info {
/***************************** helper functions *****************************/
static uint32
static phys_addr_t
physicalAddress(volatile void *address, uint32 length)
{
physical_entry table;
get_memory_map((void *)address, length, &table, 1);
return (uint32)table.address;
return table.address;
}
@@ -379,7 +379,7 @@ sis900_initPHYs(struct sis_info *info)
dprintf("No MII PHY transceiver found!\n");
return B_ENTRY_NOT_FOUND;
}
sis900_selectPHY(info);
// if the internal PHY is selected, reset it
@@ -554,7 +554,7 @@ sis900_checkMode(struct sis_info *info)
} else if (info->currentPHY->types == MII_LAN) {
TRACE((DEVICE_NAME ": PHY type is LAN\n"));
// enable excessive deferral timer
// enable excessive deferral timer
write32(address, ~SiS900_MAC_CONFIG_EXCESSIVE_DEFERRAL & read32(address));
sis900_setAutoNegotiationCapabilities(info);
@@ -562,7 +562,7 @@ sis900_checkMode(struct sis_info *info)
} else {
TRACE((DEVICE_NAME ": PHY type is not LAN\n"));
// disable excessive deferral timer
// disable excessive deferral timer
write32(address, SiS900_MAC_CONFIG_EXCESSIVE_DEFERRAL | read32(address));
sis900_setMode(info, LINK_SPEED_HOME | LINK_HALF_DUPLEX);
@@ -602,7 +602,7 @@ sis900_getMACAddress(struct sis_info *info)
write32(eepromAccess, SiS96x_EEPROM_CMD_DONE);
return true;
} else {
spin(2);
spin(2);
tries++;
}
}
@@ -633,12 +633,12 @@ sis900_getMACAddress(struct sis_info *info)
}
return false;
} else {
/* SiS630 stores the MAC in an eeprom */
/* SiS630 stores the MAC in an eeprom */
uint16 signature;
int i;
/* check to see if we have sane EEPROM */
signature = eeprom_read(info,SiS900_EEPROM_SIGNATURE);
signature = eeprom_read(info,SiS900_EEPROM_SIGNATURE);
if (signature == 0xffff || signature == 0x0000) {
dprintf(DEVICE_NAME ": cannot read EEPROM signature\n");
return false;
@@ -727,7 +727,7 @@ status_t
sis900_createRings(struct sis_info *info)
{
uint16 i;
// create transmit buffer area
info->txArea = create_area("sis900 tx buffer", (void **)&info->txBuffer[0],
B_ANY_KERNEL_ADDRESS,
src/add-ons/kernel/drivers/network/vlance/vlance.c
+5 -5
View File
@@ -261,7 +261,7 @@ alloc_buffers(dev_info_t *device)
/* get physical address of Initialization Block */
size = RNDUP(sizeof(dev_info_t), B_PAGE_SIZE);
get_memory_map(&(device->init_blk), size, &entry, 1);
device->phys_init_blk = (uint32)entry.address;
device->phys_init_blk = entry.address;
TRACE((DEVICE_NAME " init block va=%p pa=%p, size %lx\n",
&(device->init_blk), (void *)device->phys_init_blk, size));
@@ -279,7 +279,7 @@ alloc_buffers(dev_info_t *device)
}
/* get physical address of tx descriptor */
get_memory_map(device->tx_desc[0], size, &entry, 1);
device->phys_tx_desc = (uint32)(entry.address);
device->phys_tx_desc = entry.address;
TRACE((DEVICE_NAME " create tx desc area va=%p pa=%p sz=%lx\n",
device->tx_desc[0], (void *)device->phys_tx_desc, size));
@@ -300,7 +300,7 @@ alloc_buffers(dev_info_t *device)
/* get physical address of tx buffer */
get_memory_map(device->tx_buf[0], size, &entry, 1);
device->phys_tx_buf = (uint32)(entry.address);
device->phys_tx_buf = entry.address;
TRACE((DEVICE_NAME " create tx buf area va=%p pa=%08lx sz=%lx\n",
device->tx_buf[0], device->tx_desc[0]->s.tbadr, size));
@@ -321,7 +321,7 @@ alloc_buffers(dev_info_t *device)
}
/* get physical address of rx descriptor */
get_memory_map(device->rx_desc[0], size, &entry, 1);
device->phys_rx_desc = (uint32)entry.address;
device->phys_rx_desc = entry.address;
TRACE((DEVICE_NAME " create rx desc area va=%p pa=%p sz=%lx\n",
device->rx_desc[0], (void *)device->phys_rx_desc, size));
@@ -342,7 +342,7 @@ alloc_buffers(dev_info_t *device)
}
/* get physical address of rx buffer */
get_memory_map(device->rx_buf[0], size, &entry, 1);
device->phys_rx_buf = (uint32)(entry.address);
device->phys_rx_buf = entry.address;
TRACE((DEVICE_NAME " create rx buf area va=%p pa=%08lx sz=%lx\n",
device->rx_buf[0], device->rx_desc[0]->s.rbadr, size));
src/add-ons/kernel/drivers/network/wb840/wb840.c
+91 -91
View File
@@ -44,23 +44,23 @@ mii_readstatus(wb_device *device)
{
int i = 0;
int status;
// status bit has to be retrieved 2 times
while (i++ < 2)
status = wb_miibus_readreg(device, device->phy, MII_STATUS);
return status;
}
static uint32
static phys_addr_t
physicalAddress(volatile void *addr, uint32 length)
{
physical_entry table;
get_memory_map((void*)addr, length, &table, 1);
return (uint32)table.address;
return table.address;
}
@@ -73,12 +73,12 @@ wb_put_rx_descriptor(volatile wb_desc *descriptor)
}
void
void
wb_enable_interrupts(struct wb_device *device)
{
write32(device->reg_base + WB_IMR, WB_INTRS);
write32(device->reg_base + WB_ISR, 0xFFFFFFFF);
}
}
void
@@ -93,7 +93,7 @@ static void
wb_selectPHY(wb_device *device)
{
uint16 status;
// ToDo: need to be changed, select PHY in relation to the link mode
device->currentPHY = device->firstPHY;
device->phy = device->currentPHY->address;
@@ -101,7 +101,7 @@ wb_selectPHY(wb_device *device)
status &= ~MII_CONTROL_ISOLATE;
wb_miibus_writereg(device, device->phy, MII_CONTROL, status);
wb_read_mode(device);
}
@@ -115,10 +115,10 @@ wb_initPHYs(wb_device *device)
struct mii_phy *mii;
uint16 status;
int i = 0;
status = wb_miibus_readreg(device, phy, MII_STATUS);
status = wb_miibus_readreg(device, phy, MII_STATUS);
if (status == 0xffff || status == 0x0000)
// this MII is not accessable
continue;
@@ -133,9 +133,9 @@ wb_initPHYs(wb_device *device)
mii->types = MII_HOME;
mii->next = device->firstPHY;
device->firstPHY = mii;
while (gMIIChips[i].name != NULL) {
if (gMIIChips[i].id0 == mii->id0 && gMIIChips[i].id1 == (mii->id1 & 0xfff0)) {
if (gMIIChips[i].id0 == mii->id0 && gMIIChips[i].id1 == (mii->id1 & 0xfff0)) {
dprintf("Found MII PHY: %s\n", gMIIChips[i].name);
mii->types = gMIIChips[i].types;
break;
@@ -150,7 +150,7 @@ wb_initPHYs(wb_device *device)
dprintf("No MII PHY transceiver found!\n");
return B_ENTRY_NOT_FOUND;
}
wb_selectPHY(device);
device->link = mii_readstatus(device) & MII_STATUS_LINK;
@@ -162,15 +162,15 @@ void
wb_init(wb_device *device)
{
LOG((DEVICE_NAME": init()\n"));
wb_reset(device);
device->wb_txthresh = WB_TXTHRESH_INIT;
switch(device->wb_cachesize) {
case 32:
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_CACHEALIGN_32LONG);
break;
break;
case 16:
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_CACHEALIGN_16LONG);
break;
@@ -182,16 +182,16 @@ wb_init(wb_device *device)
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_CACHEALIGN_NONE);
break;
}
write32(device->reg_base + WB_BUSCTL, WB_BUSCTL_MUSTBEONE|WB_BUSCTL_ARBITRATION);
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_BURSTLEN_16LONG);
write32(device->reg_base + WB_BUSCTL_SKIPLEN, WB_SKIPLEN_4LONG);
// Disable early TX/RX interrupt, as we can't take advantage
// from them, at least for now.
WB_CLRBIT(device->reg_base + WB_NETCFG, (WB_NETCFG_TX_EARLY_ON|WB_NETCFG_RX_EARLY_ON));
wb_set_rx_filter(device);
}
@@ -200,25 +200,25 @@ void
wb_reset(wb_device *device)
{
int i = 0;
LOG((DEVICE_NAME": reset()\n"));
write32(device->reg_base + WB_NETCFG, 0L);
write32(device->reg_base + WB_BUSCTL, 0L);
write32(device->reg_base + WB_TXADDR, 0L);
write32(device->reg_base + WB_RXADDR, 0L);
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_BUSCTL_RESET);
WB_SETBIT(device->reg_base + WB_BUSCTL, WB_BUSCTL_RESET);
for (i = 0; i < WB_TIMEOUT; i++) {
if (!(read32(device->reg_base + WB_BUSCTL) & WB_BUSCTL_RESET))
break;
}
if (i == WB_TIMEOUT)
LOG((DEVICE_NAME": reset hasn't completed!!!"));
/* Wait a bit while the chip reorders his toughts */
snooze(1000);
}
@@ -229,7 +229,7 @@ wb_stop(wb_device *device)
{
uint32 cfgAddress = (uint32)device->reg_base + WB_NETCFG;
int32 i = 0;
if (read32(cfgAddress) & (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON)) {
WB_CLRBIT(cfgAddress, (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON));
@@ -239,10 +239,10 @@ wb_stop(wb_device *device)
break;
}
}
if (i < WB_TIMEOUT)
return B_OK;
return B_ERROR;
}
@@ -254,7 +254,7 @@ wb_updateLink(struct wb_device *device)
int32 mode = wb_read_mode(device);
if (mode)
wb_set_mode(device, mode);
return;
}
@@ -267,10 +267,10 @@ wb_updateLink(struct wb_device *device)
} else {
uint16 status;
wb_selectPHY(device);
// Check if we have a new link
status = mii_readstatus(device);
if (status & MII_STATUS_LINK)
if (status & MII_STATUS_LINK)
device->link = true;
}
}
@@ -280,9 +280,9 @@ int32
wb_tick(timer *arg)
{
struct wb_device *device = (wb_device*)arg;
wb_updateLink(device);
return B_OK;
}
@@ -305,29 +305,29 @@ wb_rxok(struct wb_device *device)
{
uint32 releaseRxSem = 0;
int16 limit;
acquire_spinlock(&device->rxSpinlock);
for (limit = device->rxFree; limit > 0; limit--) {
if (device->rxDescriptor[device->rxInterruptIndex].wb_status & WB_RXSTAT_OWN) {
break;
}
releaseRxSem++;
device->rxInterruptIndex = (device->rxInterruptIndex + 1) & WB_RX_CNT_MASK;
device->rxFree--;
}
// Re-enable receive queue
write32(device->reg_base + WB_RXSTART, 0xFFFFFFFF);
release_spinlock(&device->rxSpinlock);
if (releaseRxSem > 0) {
release_sem_etc(device->rxSem, releaseRxSem, B_DO_NOT_RESCHEDULE);
return B_INVOKE_SCHEDULER;
}
return B_HANDLED_INTERRUPT;
}
@@ -338,12 +338,12 @@ wb_tx_nobuf(struct wb_device *info)
int16 releaseTxSem = 0;
int16 limit;
status_t status;
acquire_spinlock(&info->txSpinlock);
for (limit = info->txSent; limit > 0; limit--) {
status = info->txDescriptor[info->txInterruptIndex].wb_status;
LOG(("wb_tx_nobuf, status: %lx\n", status));
if (status & WB_TXSTAT_TXERR) {
LOG(("TX_STAT_ERR\n"));
@@ -356,7 +356,7 @@ wb_tx_nobuf(struct wb_device *info)
break;
} else
info->txDescriptor[info->txInterruptIndex].wb_status = 0;
releaseTxSem++; // this many buffers are free
info->txInterruptIndex = (info->txInterruptIndex + 1) & WB_TX_CNT_MASK;
info->txSent--;
@@ -364,7 +364,7 @@ wb_tx_nobuf(struct wb_device *info)
if (info->txSent < 0 || info->txSent > WB_TX_LIST_CNT)
dprintf("ERROR interrupt: txSent = %d\n", info->txSent);
}
release_spinlock(&info->txSpinlock);
if (releaseTxSem) {
@@ -382,88 +382,88 @@ wb_interrupt(void *arg)
struct wb_device *device = (wb_device*)arg;
int32 retval = B_UNHANDLED_INTERRUPT;
uint32 status;
// TODO: Handle other interrupts
acquire_spinlock(&device->intLock);
status = read32(device->reg_base + WB_ISR);
// Did this card request the interrupt ?
if (status & WB_INTRS) {
if (status & WB_INTRS) {
// Clean all the interrupts bits
if (status)
write32(device->reg_base + WB_ISR, status);
if (status & WB_ISR_ABNORMAL)
LOG((DEVICE_NAME": *** Abnormal Interrupt received ***\n"));
else
LOG((DEVICE_NAME": interrupt received: \n"));
if (status & WB_ISR_RX_EARLY) {
LOG(("WB_ISR_RX_EARLY\n"));
}
if (status & WB_ISR_RX_NOBUF) {
LOG(("WB_ISR_RX_NOBUF\n"));
LOG(("WB_ISR_RX_NOBUF\n"));
// Something is screwed
}
if (status & WB_ISR_RX_ERR) {
LOG(("WB_ISR_RX_ERR\n"));
// TODO: Do something useful
}
if (status & WB_ISR_RX_OK) {
LOG(("WB_ISR_RX_OK\n"));
retval = wb_rxok(device);
}
if (status & WB_ISR_RX_IDLE) {
LOG(("WB_ISR_RX_IDLE\n"));
// ???
}
if (status & WB_ISR_TX_EARLY) {
LOG(("WB_ISR_TX_EARLY\n"));
}
if (status & WB_ISR_TX_NOBUF) {
LOG(("WB_ISR_TX_NOBUF\n"));
retval = wb_tx_nobuf(device);
}
if (status & WB_ISR_TX_UNDERRUN) {
LOG(("WB_ISR_TX_UNDERRUN\n"));
// TODO: Jack up TX Threshold
}
if (status & WB_ISR_TX_IDLE) {
LOG(("WB_ISR_TX_IDLE\n"));
}
if (status & WB_ISR_TX_OK) {
LOG(("WB_ISR_TX_OK\n"));
// So what ?
}
if (status & WB_ISR_BUS_ERR) {
LOG(("WB_ISR_BUS_ERROR: %lx\n", (status & WB_ISR_BUSERRTYPE) >> 4));
//wb_reset(device);
}
if (status & WB_ISR_TIMER_EXPIRED) {
LOG(("WB_ISR_TIMER_EXPIRED\n"));
// ??
}
}
release_spinlock(&device->intLock);
return retval;
}
/*
* Print an ethernet address
@@ -484,26 +484,26 @@ print_address(ether_address_t *addr)
status_t
wb_create_semaphores(struct wb_device *device)
{
{
device->rxSem = create_sem(0, "wb840 receive");
if (device->rxSem < B_OK) {
LOG(("Couldn't create sem, sem_id %ld\n", device->rxSem));
return device->rxSem;
}
device->txSem = create_sem(WB_TX_LIST_CNT, "wb840 transmit");
if (device->txSem < B_OK) {
LOG(("Couldn't create sem, sem_id %ld\n", device->txSem));
delete_sem(device->rxSem);
return device->txSem;
}
set_sem_owner(device->rxSem, B_SYSTEM_TEAM);
set_sem_owner(device->txSem, B_SYSTEM_TEAM);
device->rxLock = 0;
device->txLock = 0;
return B_OK;
}
@@ -522,13 +522,13 @@ status_t
wb_create_rings(struct wb_device *device)
{
int i;
device->rxArea = create_area("wb840 rx buffer", (void **)&device->rxBuffer[0],
B_ANY_KERNEL_ADDRESS, ROUND_TO_PAGE_SIZE(WB_BUFBYTES * WB_RX_LIST_CNT),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
if (device->rxArea < B_OK)
return device->rxArea;
for (i = 1; i < WB_RX_LIST_CNT; i++)
device->rxBuffer[i] = (void *)(((uint32)device->rxBuffer[0]) + (i * WB_BUFBYTES));
@@ -540,9 +540,9 @@ wb_create_rings(struct wb_device *device)
device->rxDescriptor[i].wb_next = physicalAddress(&device->rxDescriptor[(i + 1) & WB_RX_CNT_MASK],
sizeof(struct wb_desc));
}
device->rxFree = WB_RX_LIST_CNT;
device->txArea = create_area("wb840 tx buffer", (void **)&device->txBuffer[0],
B_ANY_KERNEL_ADDRESS, ROUND_TO_PAGE_SIZE(WB_BUFBYTES * WB_TX_LIST_CNT),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
@@ -550,7 +550,7 @@ wb_create_rings(struct wb_device *device)
delete_area(device->rxArea);
return device->txArea;
}
for (i = 1; i < WB_TX_LIST_CNT; i++)
device->txBuffer[i] = (void *)(((uint32)device->txBuffer[0]) + (i * WB_BUFBYTES));
@@ -561,14 +561,14 @@ wb_create_rings(struct wb_device *device)
device->txDescriptor[i].wb_next = physicalAddress(&device->txDescriptor[(i + 1) & WB_TX_CNT_MASK],
sizeof(struct wb_desc));
}
if (wb_stop(device) == B_OK) {
write32(device->reg_base + WB_RXADDR,
physicalAddress(&device->rxDescriptor[0], sizeof(struct wb_desc)));
write32(device->reg_base + WB_TXADDR,
physicalAddress(&device->txDescriptor[0], sizeof(struct wb_desc)));
}
return B_OK;
}
@@ -600,7 +600,7 @@ wb_read_mode(wb_device *info)
speed = status & (MII_NWAY_TX | MII_NWAY_TX_FDX) ? LINK_SPEED_100_MBIT : LINK_SPEED_10_MBIT;
duplex = status & (MII_NWAY_TX_FDX | MII_NWAY_T_FDX) ? LINK_FULL_DUPLEX : LINK_HALF_DUPLEX;
info->autoNegotiationComplete = true;
LOG((DEVICE_NAME ": linked, 10%s MBit, %s duplex\n",
@@ -618,17 +618,17 @@ wb_set_mode(wb_device *info, int mode)
int32 speed = mode & LINK_SPEED_MASK;
uint32 configFlags = 0;
status_t status;
status = wb_stop(info);
if ((mode & LINK_DUPLEX_MASK) == LINK_FULL_DUPLEX)
configFlags |= WB_NETCFG_FULLDUPLEX;
configFlags |= WB_NETCFG_FULLDUPLEX;
if (speed == LINK_SPEED_100_MBIT)
configFlags |= WB_NETCFG_100MBPS;
write32(cfgAddress, configFlags);
if (status == B_OK)
WB_SETBIT(cfgAddress, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
WB_SETBIT(cfgAddress, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
}
src/add-ons/kernel/drivers/network/wlan/ipw2100/ipw2100.cpp
+3 -2
View File
@@ -897,7 +897,7 @@ IPW2100::MapPhysicalMemory(const char *name, uint32 physicalAddress,
size = (size + offset + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
void *virtualAddress;
area_id area = map_physical_memory(name, (void *)physicalAddress, size,
area_id area = map_physical_memory(name, physicalAddress, size,
B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA, &virtualAddress);
if (area < B_OK) {
TRACE_ALWAYS(("IPW2100: mapping physical address failed\n"));
@@ -918,6 +918,7 @@ area_id
IPW2100::AllocateContiguous(const char *name, void **logicalAddress,
uint32 *physicalAddress, size_t size)
{
// TODO: physicalAddress should be phys_addr_t*!
size = (size + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
void *virtualAddress = NULL;
area_id area = create_area(name, &virtualAddress, B_ANY_KERNEL_ADDRESS,
@@ -933,7 +934,7 @@ IPW2100::AllocateContiguous(const char *name, void **logicalAddress,
if (physicalAddress) {
physical_entry physicalEntry;
get_memory_map(virtualAddress, size, &physicalEntry, 1);
*physicalAddress = (uint32)physicalEntry.address;
*physicalAddress = physicalEntry.address;
}
return area;
src/add-ons/kernel/generic/ata_adapter/ata_adapter.c
+4 -3
View File
@@ -249,12 +249,13 @@ ata_adapter_prepare_dma(ata_adapter_channel_info *channel,
writeToDevice ? "write" : "read", sgListCount);
for (i = sgListCount - 1, prd = channel->prdt; i >= 0; --i, ++prd, ++sgList) {
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device, sgList->address));
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
(void*)(addr_t)sgList->address));
// 0 means 64K - this is done automatically be discarding upper 16 bits
prd->count = B_HOST_TO_LENDIAN_INT16((uint16)sgList->size);
prd->EOT = i == 0;
TRACE_DMA("ata_adapter: %p, %ld => 0x%08x, %d, %d\n",
TRACE_DMA("ata_adapter: %#" B_PRIxPHYSADDR ", %ld => 0x%08x, %d, %d\n",
sgList->address, sgList->size, prd->address, prd->count, prd->EOT);
SHOW_FLOW( 4, "%x, %x, %d", (int)prd->address, prd->count, prd->EOT);
}
@@ -413,7 +414,7 @@ ata_adapter_init_channel(device_node *node,
}
get_memory_map(channel->prdt, prdt_size, pe, 1);
channel->prdt_phys = (uint32)pe[0].address;
channel->prdt_phys = pe[0].address;
SHOW_FLOW(3, "virt=%p, phys=%x", channel->prdt, (int)channel->prdt_phys);
src/add-ons/kernel/generic/ide_adapter/ide_adapter.c
+2 -1
View File
@@ -227,7 +227,8 @@ ide_adapter_prepare_dma(ide_adapter_channel_info *channel,
int i;
for (i = sgListCount - 1, prd = channel->prdt; i >= 0; --i, ++prd, ++sgList) {
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device, sgList->address));
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
(void*)(addr_t)sgList->address));
// 0 means 64K - this is done automatically be discarding upper 16 bits
prd->count = B_HOST_TO_LENDIAN_INT16((uint16)sgList->size);
prd->EOT = i == 0;
src/add-ons/kernel/interrupt_controllers/openpic/openpic.cpp
+9 -9
View File
@@ -44,7 +44,7 @@
#define OPENPIC_MODULE_NAME "interrupt_controllers/openpic/device_v1"
enum {
OPENPIC_MIN_REGISTER_SPACE_SIZE = 0x21000,
OPENPIC_MAX_REGISTER_SPACE_SIZE = 0x40000,
@@ -326,7 +326,7 @@ openpic_register_device(device_node *parent)
// (driver_module_info**)&pci, (void**)&device); // wtf?
if (error != B_OK)
return error;
sDeviceManager->uninit_driver(parent);
#endif
device_node *newNode;
@@ -336,10 +336,10 @@ openpic_register_device(device_node *parent)
//XXX: that's inconsistent with the header!
//{ B_DEVICE_TYPE, B_STRING_TYPE,
// { string: B_INTERRUPT_CONTROLLER_DRIVER_TYPE }},
{}
};
// HACK: to get it compiled, I will break anything.
return sDeviceManager->register_node(parent, NULL, attrs, NULL, &newNode);
}
@@ -401,11 +401,11 @@ openpic_init_driver(device_node *node, void **cookie)
registerSpaceSize -= info->supported_device->register_offset;
if (registerSpaceSize > OPENPIC_MAX_REGISTER_SPACE_SIZE)
registerSpaceSize = OPENPIC_MAX_REGISTER_SPACE_SIZE;
// map register space
void *virtualRegisterBase = NULL;
area_id registerArea = map_physical_memory("openpic registers",
(void*)physicalRegisterBase, registerSpaceSize, B_ANY_KERNEL_ADDRESS,
physicalRegisterBase, registerSpaceSize, B_ANY_KERNEL_ADDRESS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, &virtualRegisterBase);
if (registerArea < 0)
return info->register_area;
@@ -471,7 +471,7 @@ openpic_get_controller_info(void *cookie, interrupt_controller_info *_info)
openpic_info *info = (openpic_info*)cookie;
*_info = *info;
return B_OK;
}
@@ -482,7 +482,7 @@ openpic_enable_io_interrupt(void *cookie, int irq, int type)
openpic_info *info = (openpic_info*)cookie;
openpic_enable_irq(info, irq, type);
return B_OK;
}
@@ -497,7 +497,7 @@ openpic_disable_io_interrupt(void *cookie, int irq)
return B_OK;
}
static int
openpic_acknowledge_io_interrupt(void *cookie)
{
src/system/kernel/arch/x86/arch_vm.cpp
+1 -1
View File
@@ -649,7 +649,7 @@ arch_vm_init_post_area(kernel_args *args)
vm_mark_page_range_inuse(0x0, 0xa0000 / B_PAGE_SIZE);
// map 0 - 0xa0000 directly
id = map_physical_memory("dma_region", (void *)0x0, 0xa0000,
id = map_physical_memory("dma_region", 0x0, 0xa0000,
B_ANY_KERNEL_ADDRESS | B_MTR_WB,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, &gDmaAddress);
if (id < 0) {
src/system/kernel/arch/x86/bios.cpp
+1 -1
View File
@@ -120,7 +120,7 @@ extern "C" status_t
bios_init(void)
{
// map BIOS area 0xe0000 - 0xfffff
area_id biosArea = map_physical_memory("pc bios", (void *)0xe0000, 0x20000,
area_id biosArea = map_physical_memory("pc bios", 0xe0000, 0x20000,
B_ANY_KERNEL_ADDRESS | B_MTR_WB,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void **)&gBiosBase);
if (biosArea < 0)
src/system/kernel/arch/x86/vm86.cpp
+1 -1
View File
@@ -556,7 +556,7 @@ vm86_prepare(struct vm86_state *state, unsigned int ramSize)
}
// copy int vectors and BIOS data area
vectors = map_physical_memory("int vectors", (void *)0, 0x502,
vectors = map_physical_memory("int vectors", 0, 0x502,
B_ANY_KERNEL_BLOCK_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA,
&address);
if (vectors < B_OK) {
src/system/kernel/debug/frame_buffer_console.cpp
+1 -1
View File
@@ -414,7 +414,7 @@ frame_buffer_console_init(kernel_args* args)
void* frameBuffer;
sConsole.area = map_physical_memory("vesa frame buffer",
(void*)args->frame_buffer.physical_buffer.start,
args->frame_buffer.physical_buffer.start,
args->frame_buffer.physical_buffer.size, B_ANY_KERNEL_ADDRESS,
B_READ_AREA | B_WRITE_AREA | B_USER_CLONEABLE_AREA, &frameBuffer);
if (sConsole.area < 0)
src/system/kernel/debug/tracing.cpp
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2008-2009, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008-2010, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008-2009, Axel Dörfler, axeld@pinc-software.de.
* Distributed under the terms of the MIT License.
*/
@@ -106,7 +106,7 @@ private:
uint32 fEntriesEver;
spinlock fLock;
char* fTraceOutputBuffer;
addr_t fPhysicalAddress;
phys_addr_t fPhysicalAddress;
uint32 fMagic3;
};
@@ -380,7 +380,7 @@ TracingMetaData::Create(TracingMetaData*& _metaData)
physical_entry physicalEntry;
if (get_memory_map(metaData->fTraceOutputBuffer, B_PAGE_SIZE,
&physicalEntry, 1) == B_OK) {
metaData->fPhysicalAddress = (addr_t)physicalEntry.address;
metaData->fPhysicalAddress = physicalEntry.address;
} else {
dprintf("TracingMetaData::Create(): failed to get physical address "
"of tracing buffer\n");
src/system/kernel/device_manager/IORequest.cpp
+3 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2008-2009, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008-2010, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008, Axel Dörfler, axeld@pinc-software.de.
* Distributed under the terms of the MIT License.
*/
@@ -1219,6 +1219,7 @@ IORequest::_CopySimple(void* bounceBuffer, void* external, size_t size,
IORequest::_CopyPhysical(void* bounceBuffer, void* external, size_t size,
team_id team, bool copyIn)
{
// TODO: The physical address must be phys_addr_t!
if (copyIn) {
return vm_memcpy_from_physical(bounceBuffer, (addr_t)external, size,
false);
@@ -1250,7 +1251,7 @@ IORequest::_CopyUser(void* _bounceBuffer, void* _external, size_t size,
for (uint32 i = 0; i < count; i++) {
const physical_entry& entry = entries[i];
error = _CopyPhysical(bounceBuffer, entry.address,
error = _CopyPhysical(bounceBuffer, (void*)entry.address,
entry.size, team, copyIn);
if (error != B_OK)
return error;
src/system/kernel/device_manager/dma_resources.cpp
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright 2008, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008-2010, Ingo Weinhold, ingo_weinhold@gmx.de.
* Copyright 2008, Axel Dörfler, axeld@pinc-software.de.
* Distributed under the terms of the MIT License.
*/
@@ -241,7 +241,7 @@ DMAResource::CreateBounceBuffer(DMABounceBuffer** _buffer)
return B_ERROR;
}
physicalBase = (addr_t)entry.address;
physicalBase = entry.address;
if (fRestrictions.high_address < physicalBase + size) {
delete_area(area);
@@ -440,7 +440,7 @@ DMAResource::TranslateNext(IORequest* request, IOOperation* operation,
get_memory_map_etc(request->Team(), (void*)base, size,
&entry, &count);
vecs[segmentCount].iov_base = entry.address;
vecs[segmentCount].iov_base = (void*)(addr_t)entry.address;
vecs[segmentCount].iov_len = entry.size;
transferLeft -= entry.size;
src/system/kernel/vm/vm.cpp
+8 -7
View File
@@ -5388,13 +5388,13 @@ get_memory_map_etc(team_id team, const void* address, size_t numBytes,
}
// need to switch to the next physical_entry?
if (index < 0 || (phys_addr_t)table[index].address
if (index < 0 || table[index].address
!= physicalAddress - table[index].size) {
if ((uint32)++index + 1 > numEntries) {
// table to small
break;
}
table[index].address = (void*)physicalAddress;
table[index].address = physicalAddress;
table[index].size = bytes;
} else {
// page does fit in current entry
@@ -5442,7 +5442,7 @@ get_memory_map(const void* address, ulong numBytes, physical_entry* table,
if (entriesRead + 1 > (uint32)numEntries)
return B_BUFFER_OVERFLOW;
table[entriesRead].address = NULL;
table[entriesRead].address = 0;
table[entriesRead].size = 0;
return B_OK;
@@ -5567,8 +5567,9 @@ transfer_area(area_id id, void** _address, uint32 addressSpec, team_id target,
area_id
map_physical_memory(const char* name, void* physicalAddress, size_t numBytes,
uint32 addressSpec, uint32 protection, void** _virtualAddress)
map_physical_memory(const char* name, phys_addr_t physicalAddress,
size_t numBytes, uint32 addressSpec, uint32 protection,
void** _virtualAddress)
{
if (!arch_vm_supports_protection(protection))
return B_NOT_SUPPORTED;
@@ -5576,8 +5577,8 @@ map_physical_memory(const char* name, void* physicalAddress, size_t numBytes,
fix_protection(&protection);
return vm_map_physical_memory(VMAddressSpace::KernelID(), name,
_virtualAddress, addressSpec, numBytes, protection,
(phys_addr_t)physicalAddress, false);
_virtualAddress, addressSpec, numBytes, protection, physicalAddress,
false);
}