Seperate the generic (local) APIC stuff into it's own file and use it from the
other places where previously the same functionality was duplicated. Also seperated the header which was originally arch_smp.h into apic.h and arch_smp.h again as some of it is MP and not actually APIC. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36182 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz
+13
-83
@@ -6,11 +6,11 @@
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* Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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* Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_ARCH_APIC_H
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#define _KERNEL_ARCH_x86_ARCH_APIC_H
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#ifndef _KERNEL_ARCH_x86_APIC_H
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#define _KERNEL_ARCH_x86_APIC_H
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#define MP_FLOATING_SIGNATURE '_PM_'
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#define MP_CONFIG_TABLE_SIGNATURE 'PCMP'
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#include <boot/kernel_args.h>
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#include <SupportDefs.h>
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#define APIC_ENABLE 0x100
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#define APIC_FOCUS (~(1 << 9))
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@@ -71,7 +71,7 @@
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// timer defines
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#define APIC_LVT_TIMER_MASK 0xfffcef00
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// LINT0/1 defines
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// LINT0/1 defines
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#define APIC_LVT_LINT_MASK 0xfffe0800
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#define APIC_LVT_LINT_INPUT_POLARITY (1 << 13)
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@@ -113,83 +113,13 @@
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#define IPI_STOP 0x44
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*/
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struct mp_config_table {
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uint32 signature; /* "PCMP" */
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uint16 base_table_length; /* length of the base table entries and this structure */
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uint8 spec_revision; /* spec supported, 1 for 1.1 or 4 for 1.4 */
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uint8 checksum; /* checksum, all bytes add up to zero */
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char oem[8]; /* oem identification, not null-terminated */
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char product[12]; /* product name, not null-terminated */
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void *oem_table; /* addr of oem-defined table, zero if none */
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uint16 oem_length; /* length of oem table */
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uint16 num_base_entries; /* number of entries in base table */
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uint32 apic; /* address of apic */
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uint16 ext_length; /* length of extended section */
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uint8 ext_checksum; /* checksum of extended table entries */
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uint8 reserved;
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};
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bool apic_available();
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uint32 apic_read(uint32 offset);
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void apic_write(uint32 offset, uint32 data);
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uint32 apic_local_id();
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void apic_end_of_interrupt();
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struct mp_floating_struct {
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uint32 signature; /* "_MP_" */
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struct mp_config_table *config_table; /* address of mp configuration table */
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uint8 config_length; /* length of the table in 16-byte units */
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uint8 spec_revision; /* spec supported, 1 for 1.1 or 4 for 1.4 */
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uint8 checksum; /* checksum, all bytes add up to zero */
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uint8 mp_feature_1; /* mp system configuration type if no mpc */
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uint8 mp_feature_2; /* imcrp */
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uint8 mp_feature_3, mp_feature_4, mp_feature_5; /* reserved */
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};
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status_t apic_init(kernel_args *args);
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status_t apic_per_cpu_init(kernel_args *args, int32 cpu);
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/* base config entry types */
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enum {
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MP_BASE_PROCESSOR = 0,
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MP_BASE_BUS,
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MP_BASE_IO_APIC,
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MP_BASE_IO_INTR,
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MP_BASE_LOCAL_INTR,
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};
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struct mp_base_processor {
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uint8 type;
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uint8 apic_id;
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uint8 apic_version;
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uint8 cpu_flags;
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uint32 signature; /* stepping, model, family, each four bits */
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uint32 feature_flags;
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uint32 res1, res2;
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};
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struct mp_base_ioapic {
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uint8 type;
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uint8 ioapic_id;
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uint8 ioapic_version;
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uint8 ioapic_flags;
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uint32 *addr;
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};
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struct mp_base_bus {
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uint8 type;
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uint8 bus_id;
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char name[6];
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};
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struct mp_base_interrupt {
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uint8 type;
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uint8 interrupt_type;
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uint16 polarity : 2;
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uint16 trigger_mode : 2;
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uint16 _reserved : 12;
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uint8 source_bus_id;
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uint8 source_bus_irq;
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uint8 dest_apic_id;
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uint8 dest_apic_int;
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};
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enum {
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MP_INTR_TYPE_INT = 0,
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MP_INTR_TYPE_NMI,
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MP_INTR_TYPE_SMI,
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MP_INTR_TYPE_ExtINT,
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};
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#endif /* _KERNEL_ARCH_x86_ARCH_APIC_H */
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#endif /* _KERNEL_ARCH_x86_APIC_H */
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@@ -0,0 +1,102 @@
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/*
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* Copyright 2008, Dustin Howett, [email protected]. All rights reserved.
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* Copyright 2005, Axel Dörfler, [email protected]. All rights reserved.
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* Distributed under the terms of the MIT License.
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*
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* Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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* Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_ARCH_SMP_H
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#define _KERNEL_ARCH_x86_ARCH_SMP_H
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#define MP_FLOATING_SIGNATURE '_PM_'
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#define MP_CONFIG_TABLE_SIGNATURE 'PCMP'
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/*
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#define IPI_CACHE_FLUSH 0x40
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#define IPI_INV_TLB 0x41
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#define IPI_INV_PTE 0x42
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#define IPI_INV_RESCHED 0x43
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#define IPI_STOP 0x44
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*/
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struct mp_config_table {
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uint32 signature; /* "PCMP" */
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uint16 base_table_length; /* length of the base table entries and this structure */
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uint8 spec_revision; /* spec supported, 1 for 1.1 or 4 for 1.4 */
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uint8 checksum; /* checksum, all bytes add up to zero */
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char oem[8]; /* oem identification, not null-terminated */
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char product[12]; /* product name, not null-terminated */
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void *oem_table; /* addr of oem-defined table, zero if none */
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uint16 oem_length; /* length of oem table */
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uint16 num_base_entries; /* number of entries in base table */
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uint32 apic; /* address of apic */
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uint16 ext_length; /* length of extended section */
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uint8 ext_checksum; /* checksum of extended table entries */
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uint8 reserved;
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};
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struct mp_floating_struct {
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uint32 signature; /* "_MP_" */
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struct mp_config_table *config_table; /* address of mp configuration table */
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uint8 config_length; /* length of the table in 16-byte units */
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uint8 spec_revision; /* spec supported, 1 for 1.1 or 4 for 1.4 */
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uint8 checksum; /* checksum, all bytes add up to zero */
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uint8 mp_feature_1; /* mp system configuration type if no mpc */
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uint8 mp_feature_2; /* imcrp */
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uint8 mp_feature_3, mp_feature_4, mp_feature_5; /* reserved */
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};
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/* base config entry types */
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enum {
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MP_BASE_PROCESSOR = 0,
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MP_BASE_BUS,
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MP_BASE_IO_APIC,
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MP_BASE_IO_INTR,
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MP_BASE_LOCAL_INTR,
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};
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struct mp_base_processor {
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uint8 type;
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uint8 apic_id;
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uint8 apic_version;
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uint8 cpu_flags;
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uint32 signature; /* stepping, model, family, each four bits */
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uint32 feature_flags;
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uint32 res1, res2;
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};
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struct mp_base_ioapic {
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uint8 type;
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uint8 ioapic_id;
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uint8 ioapic_version;
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uint8 ioapic_flags;
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uint32 *addr;
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};
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struct mp_base_bus {
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uint8 type;
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uint8 bus_id;
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char name[6];
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};
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struct mp_base_interrupt {
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uint8 type;
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uint8 interrupt_type;
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uint16 polarity : 2;
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uint16 trigger_mode : 2;
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uint16 _reserved : 12;
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uint8 source_bus_id;
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uint8 source_bus_irq;
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uint8 dest_apic_id;
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uint8 dest_apic_int;
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};
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enum {
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MP_INTR_TYPE_INT = 0,
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MP_INTR_TYPE_NMI,
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MP_INTR_TYPE_SMI,
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MP_INTR_TYPE_ExtINT,
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};
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#endif /* _KERNEL_ARCH_x86_ARCH_SMP_H */
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