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setting up AGP module use (not finished)

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8379 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-07-12 12:25:41 +00:00
parent 36ca3a48b2
commit 663294ccbb
6 changed files with 131 additions and 88 deletions
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headers/private/graphics/AGP.h
+1 -1
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@@ -6,7 +6,7 @@
/ For more information, see "AGP interface specification", Revision 2.0 and 3.0,
/ Intel Corporation, 1998-2002.
/
/ Rudolf Cornelissen 6/2004.
/ Rudolf Cornelissen 6/2004-7/2004.
/
*******************************************************************************/
headers/private/graphics/nvidia/DriverInterface.h
+19 -1
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@@ -16,6 +16,7 @@
#include <Drivers.h>
#include <PCI.h>
#include <OS.h>
#include "AGP.h"
#define DRIVER_PREFIX "nv" // apsed
@@ -64,7 +65,9 @@ enum {
NV_GET_PCI,
NV_SET_PCI,
NV_DEVICE_NAME,
NV_RUN_INTERRUPTS
NV_RUN_INTERRUPTS,
NV_GET_NTH_AGP_INFO,
NV_ENABLE_AGP
};
/* max. number of overlay buffers */
@@ -319,6 +322,21 @@ typedef struct {
char *name; /* The name of the device, less the /dev root */
} nv_device_name;
/* Retrieve an AGP device interface if there. Usefull to find the AGP speed scheme
used (pre 3.x or 3.x) */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
uint8 index; /* device index in list of devices found */
bool exist; /* we got AGP device info */
agp_info agpi; /* AGP interface info of a device */
} nv_nth_agp_info;
/* Execute an AGP command */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
uint32 cmd; /* actual command to execute */
} nv_cmd_agp;
enum {
_WAIT_FOR_VBLANK = (1 << 0)
src/add-ons/accelerants/nvidia/engine/nv_agp.c
+78 -81
View File
@@ -1,9 +1,5 @@
/* Author:
Rudolf Cornelissen 6/2004-7/2004
Note:
Most of this stuff will probably be relocated to the AGP busmanager module later on,
but for now we have something to test with...
*/
#define MODULE_BIT 0x00000100
@@ -11,18 +7,43 @@
#include <unistd.h>
#include "nv_std.h"
static void nv_agp_list_caps(agp_info ai);
static void nv_agp_list_info(agp_info ai);
static bool has_AGP_interface(agp_info *ai_card, uint8 *adress);
#define PCI_CFGR(A) (nv_pci_access.offset = A, ioctl(fd,NV_GET_PCI, &nv_pci_access, sizeof(nv_pci_access)), nv_pci_access.value)
#define PCI_CFGW(A,B) (nv_pci_access.offset = A, nv_pci_access.value = B, ioctl(fd,NV_SET_PCI,&nv_pci_access,sizeof(nv_pci_access)))
static bool zooi(void);
status_t nv_agp_setup(void)
{
char path[MAXPATHLEN];
int agp_fd;
agp_info ai_card, ai_bridge;
// uint8 rq_depth_card, rq_depth_bridge;
nv_nth_agp_info nai;
uint8 index;
/* set the magic number so the driver knows we're for real */
nai.magic = NV_PRIVATE_DATA_MAGIC;
/* contact driver and get a pointer to the registers and shared data */
for (index = 0; index < 8; index++)
{
/* get nth AGP device info */
ioctl(fd, NV_GET_NTH_AGP_INFO, &nai, sizeof(nai));
/* exit if we didn't get one */
if (!nai.exist)
{
if (index != 0)
LOG(4,("AGP: end of AGP capable devices list.\n"));
else
LOG(4,("AGP: no AGP capable devices found.\n"));
break;
}
LOG(4,("AGP: AGP capable device #%d:\n", (index + 1)));
/* log capabilities */
nv_agp_list_info(nai.agpi);
}
}
static bool zooi(void)
{
agp_info ai_card;
uint8 adress;
/* check for card's AGP capabilities - see PCI specification */
@@ -58,17 +79,17 @@ status_t nv_agp_setup(void)
LOG(4, ("AGP: STRAPINFO2 now contains $%08x\n", NV_REG32(NV32_NVSTRAPINFO2)));
}
nv_agp_list_caps(ai_card);
// nv_agp_list_caps(ai_card);
/* check for motherboard AGP host bridge */
/* open the BeOS AGP kernel driver, the permissions aren't important */
strcpy(path, "/dev/graphics/agp/1");
agp_fd = open(path, B_READ_WRITE);
if (agp_fd < 0)
// strcpy(path, "/dev/graphics/agp/1");
// agp_fd = open(path, B_READ_WRITE);
// if (agp_fd < 0)
{
LOG(4,("AGP: cannot open AGP host bridge driver, aborting!\n"));
/* program card for PCI access */
PCI_CFGW((adress + 8), 0x00000000);
// PCI_CFGW((adress + 8), 0x00000000);
return B_ERROR;
}
@@ -82,9 +103,9 @@ status_t nv_agp_setup(void)
{
LOG(4,("AGP: host bridge failed to respond correctly, aborting AGP setup!\n"));
/* close host bridge driver */
close(agp_fd);
// close(agp_fd);
/* program card for PCI access */
PCI_CFGW((adress + 8), 0x00000000);
// PCI_CFGW((adress + 8), 0x00000000);
return B_ERROR;
}
@@ -93,7 +114,7 @@ status_t nv_agp_setup(void)
// LOG(4,("AGP: host bridge supports specification %d.%d;\n",
// ((ai_bridge.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
// ((ai_bridge.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
nv_agp_list_caps(ai_bridge);
// nv_agp_list_caps(ai_bridge);
/* abort if specified by user in nv.settings */
if (si->settings.force_pci)
@@ -101,9 +122,9 @@ status_t nv_agp_setup(void)
/* user specified not to use AGP */
LOG(4,("AGP: forcing PCI mode (specified in nv.settings).\n"));
/* close host bridge driver */
close(agp_fd);
// close(agp_fd);
/* program card for PCI access */
PCI_CFGW((adress + 8), 0x00000000);
// PCI_CFGW((adress + 8), 0x00000000);
return B_ERROR;
}
@@ -116,9 +137,9 @@ status_t nv_agp_setup(void)
{
LOG(4,("AGP: no AGP modes possible, aborting AGP setup!\n"));
/* close host bridge driver */
close(agp_fd);
// close(agp_fd);
/* program card for PCI access */
PCI_CFGW((adress + 8), 0x00000000);
// PCI_CFGW((adress + 8), 0x00000000);
return B_ERROR;
}
@@ -129,9 +150,9 @@ status_t nv_agp_setup(void)
{
LOG(4,("AGP: compatibility problem detected, aborting AGP setup!\n"));
/* close host bridge driver */
close(agp_fd);
// close(agp_fd);
/* program card for PCI access */
PCI_CFGW((adress + 8), 0x00000000);
// PCI_CFGW((adress + 8), 0x00000000);
return B_ERROR;
}
@@ -239,90 +260,69 @@ status_t nv_agp_setup(void)
LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));
/* close host bridge driver */
close(agp_fd);
// close(agp_fd);
return B_OK;
}
static void nv_agp_list_caps(agp_info ai)
static void nv_agp_list_info(agp_info ai)
{
/*
list capabilities
*/
/* the mainboard and graphicscard determine AGP version used on power-up/reset */
// if (!(ai.config.agp_stat & AGP_rate_rev))
*/
/* the AGP devices determine AGP speed scheme version used on power-up/reset */
if (!(ai.interface.agp_stat & AGP_rate_rev))
{
/* AGP 2.0 scheme applies */
// if (ai.config.agp_stat & AGP_2_1x)
{
if (ai.interface.agp_stat & AGP_2_1x)
LOG(4,("AGP: AGP 2.0 1x mode is available\n"));
}
// if (ai.config.agp_stat & AGP_2_2x)
{
if (ai.interface.agp_stat & AGP_2_2x)
LOG(4,("AGP: AGP 2.0 2x mode is available\n"));
}
// if (ai.config.agp_stat & AGP_2_4x)
{
if (ai.interface.agp_stat & AGP_2_4x)
LOG(4,("AGP: AGP 2.0 4x mode is available\n"));
}
}
// else
else
{
/* AGP 3.0 scheme applies */
// if (ai.config.agp_stat & AGP_3_4x)
{
if (ai.interface.agp_stat & AGP_3_4x)
LOG(4,("AGP: AGP 3.0 4x mode is available\n"));
}
// if (ai.config.agp_stat & AGP_3_8x)
{
if (ai.interface.agp_stat & AGP_3_8x)
LOG(4,("AGP: AGP 3.0 8x mode is available\n"));
}
}
// if (ai.config.agp_stat & AGP_FW) LOG(4,("AGP: fastwrite transfers are supported\n"));
// if (ai.config.agp_stat & AGP_SBA) LOG(4,("AGP: sideband adressing is supported\n"));
// LOG(4,("AGP: %d queued AGP requests can be handled.\n",
// (((ai.config.agp_stat & AGP_RQ) >> AGP_RQ_shift) + 1)));
if (ai.interface.agp_stat & AGP_FW) LOG(4,("AGP: fastwrite transfers are supported\n"));
if (ai.interface.agp_stat & AGP_SBA) LOG(4,("AGP: sideband adressing is supported\n"));
LOG(4,("AGP: %d queued AGP requests can be handled.\n",
(((ai.interface.agp_stat & AGP_RQ) >> AGP_RQ_shift) + 1)));
/*
list current settings
*/
LOG(4,("AGP: listing current active settings:\n"));
/* the mainboard and graphicscard determine AGP version used on power-up/reset */
// if (!(ai.config.agp_stat & AGP_rate_rev))
if (!(ai.interface.agp_stat & AGP_rate_rev))
{
/* AGP 2.0 scheme applies */
// if (ai.config.agp_cmd & AGP_2_1x)
{
if (ai.interface.agp_cmd & AGP_2_1x)
LOG(4,("AGP: AGP 2.0 1x mode is set\n"));
}
// if (ai.config.agp_cmd & AGP_2_2x)
{
if (ai.interface.agp_cmd & AGP_2_2x)
LOG(4,("AGP: AGP 2.0 2x mode is set\n"));
}
// if (ai.config.agp_cmd & AGP_2_4x)
{
if (ai.interface.agp_cmd & AGP_2_4x)
LOG(4,("AGP: AGP 2.0 4x mode is set\n"));
}
}
// else
else
{
/* AGP 3.0 scheme applies */
// if (ai.config.agp_cmd & AGP_3_4x)
{
if (ai.interface.agp_cmd & AGP_3_4x)
LOG(4,("AGP: AGP 3.0 4x mode is set\n"));
}
// if (ai.config.agp_cmd & AGP_3_8x)
{
if (ai.interface.agp_cmd & AGP_3_8x)
LOG(4,("AGP: AGP 3.0 8x mode is set\n"));
}
}
// if (ai.config.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n"));
// if (ai.config.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n"));
// LOG(4,("AGP: max. AGP queued request depth is set to %d\n",
// (((ai.config.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1)));
// if (ai.config.agp_cmd & AGP_enable)
if (ai.interface.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n"));
if (ai.interface.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n"));
LOG(4,("AGP: max. AGP queued request depth is set to %d\n",
(((ai.interface.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1)));
if (ai.interface.agp_cmd & AGP_enable)
LOG(4,("AGP: this AGP interface is currently enabled.\n"));
// else
else
LOG(4,("AGP: this AGP interface is currently disabled.\n"));
}
@@ -333,18 +333,18 @@ static bool has_AGP_interface(agp_info *ai_card, uint8 *adress)
/* check if device implements a list of capabilities */
if (CFGR(DEVCTRL) & 0x00100000)
{
uint32 item;
uint32 item = 0;
uint8 item_adress;
/* get pointer to PCI capabilities list */
item_adress = CFGR(CFG_0) & 0x000000ff;
/* read first item from list */
item = PCI_CFGR(item_adress);
// item = PCI_CFGR(item_adress);
while ((item & AGP_next_ptr) && ((item & AGP_id_mask) != AGP_id))
{
/* read next item from list */
item_adress = ((item & AGP_next_ptr) >> AGP_next_ptr_shift);
item = PCI_CFGR(item_adress);
// item = PCI_CFGR(item_adress);
}
if ((item & AGP_id_mask) == AGP_id)
{
@@ -362,6 +362,3 @@ static bool has_AGP_interface(agp_info *ai_card, uint8 *adress)
}
return has_AGP;
}
#undef PCI_CFGR
#undef PCI_CFGW
src/add-ons/accelerants/nvidia/engine/nv_general.c
+1 -2
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@@ -1133,8 +1133,7 @@ static status_t nv_general_bios_to_powergraphics()
* Note:
* This may only be done when no transfers are in progress on the bus, so now
* is probably a good time.. */
//fixme: implement route through kerneldriver to access AGP busmanager: in progress...
// nv_agp_setup();
nv_agp_setup();
/* turn screen one on */
head1_dpms(true, true, true);
src/add-ons/accelerants/nvidia/engine/nv_std.h
-1
View File
@@ -7,4 +7,3 @@
//apsed #include "nv_extern.h"
#include "nv_proto.h"
#include "nv_macros.h"
#include "AGP.h"
src/add-ons/kernel/drivers/graphics/nvidia/driver.c
+32 -2
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@@ -14,6 +14,7 @@
#include <driver_settings.h>
#include <malloc.h>
#include <stdlib.h> // for strtoXX
#include "AGP.h"
/* this is for the standardized portion of the driver API */
/* currently only one operation is defined: B_GET_ACCELERANT_SIGNATURE */
@@ -77,7 +78,8 @@ static void probe_devices(void);
static int32 nv_interrupt(void *data);
static DeviceData *pd;
static pci_module_info *pci_bus;
static pci_module_info *pci_bus = NULL;
static agp_module_info *agp_bus = NULL;
static device_hooks graphics_device_hooks = {
open_hook,
close_hook,
@@ -403,6 +405,9 @@ init_driver(void) {
if (get_module(B_PCI_MODULE_NAME, (module_info **)&pci_bus) != B_OK)
return B_ERROR;
/* get a handle for the agp bus if it exists */
get_module(B_AGP_MODULE_NAME, (module_info **)&agp_bus);
/* driver private data */
pd = (DeviceData *)calloc(1, sizeof(DeviceData));
if (!pd) {
@@ -443,6 +448,9 @@ void uninit_driver(void) {
/* put the pci module away */
put_module(B_PCI_MODULE_NAME);
/* put the agp module away if it's there */
if (agp_bus) put_module(B_AGP_MODULE_NAME);
}
static status_t map_device(device_info *di)
@@ -978,7 +986,29 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
result = B_OK;
}
} break;
case NV_GET_NTH_AGP_INFO: {
nv_nth_agp_info *nai = (nv_nth_agp_info *)buf;
if (nai->magic == NV_PRIVATE_DATA_MAGIC) {
nai->exist = false;
if (agp_bus) {
if ((*agp_bus->get_nth_agp_info)(nai->index, &(nai->agpi)) == B_NO_ERROR) {
nai->exist = true;
}
}
result = B_OK;
}
} break;
case NV_ENABLE_AGP: {
nv_cmd_agp *nca = (nv_cmd_agp *)buf;
if (nca->magic == NV_PRIVATE_DATA_MAGIC) {
if (agp_bus) {
(*agp_bus->enable_agp)(&(nca->cmd));
} else {
nca->cmd = 0;
}
result = B_OK;
}
} break;
}
return result;
}