experimental
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7104 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
beveloper
@@ -0,0 +1,25 @@
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SubDir OBOS_TOP src add-ons kernel drivers audio ac97 ichaudio ;
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# UsePrivateHeaders media ;
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SubDirHdrs [ FDirName $(OBOS_TOP) src add-ons media media-add-ons lala ] ;
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KernelMergeObject ichaudio_driver.o :
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ichaudio.c
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:
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-fno-pic -Wno-unused -D_KERNEL_MODE
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;
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KernelLd ichaudio :
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ichaudio_driver.o
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lala.o
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:
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$(OBOS_TOP)/src/kernel/ldscripts/$(OBOS_ARCH)/add-on.ld
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:
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-Bdynamic -shared
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:
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:
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add-ons/kernel/drivers/bin
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;
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SubInclude OBOS_TOP src add-ons kernel drivers audio ac97 ichaudio lala ;
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@@ -0,0 +1,136 @@
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/*
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* BeOS Driver for Intel ICH AC'97 Link interface
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*
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* Copyright (c) 2002, Marcus Overhagen <[email protected]>
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*
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* All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _HARDWARE_H_
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#define _HARDWARE_H_
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/* Native Audio Bus Master Control Registers */
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enum ICH_GLOBAL_REGISTER
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{
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ICH_REG_GLOB_CNT = 0x2C,
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ICH_REG_GLOB_STA = 0x30,
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ICH_REG_ACC_SEMA = 0x34,
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ICH_REG_SDM = 0x80
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};
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enum ICH_X_REGISTER_BASE /* base addresses for the following offsets */
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{
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ICH_REG_PI_BASE = 0x00,
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ICH_REG_PO_BASE = 0x10,
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ICH_REG_MC_BASE = 0x20
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};
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enum ICH_X_REGISTER_OFFSETS /* add base address to get the PI, PO or MC reg */
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{
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ICH_REG_X_BDBAR = 0x00,
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ICH_REG_X_CIV = 0x04,
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ICH_REG_X_LVI = 0x05,
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_ICH_REG_X_SR = 0x06, /* use GET_REG_X_SR() macro from config.h */
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_ICH_REG_X_PICB = 0x08, /* use GET_REG_X_PICB() macro from config.h */
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ICH_REG_X_PIV = 0x0A,
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ICH_REG_X_CR = 0x0B
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};
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/* ICH_REG_X_SR (Status Register) Bits */
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enum REG_X_SR_BITS
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{
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SR_DCH = 0x0001,
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SR_CELV = 0x0002,
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SR_LVBCI = 0x0004,
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SR_BCIS = 0x0008,
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SR_FIFOE = 0x0010
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};
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/* ICH_REG_X_CR (Control Register) Bits */
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enum REG_X_CR_BITS
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{
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CR_RPBM = 0x01,
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CR_RR = 0x02,
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CR_LVBIE = 0x04,
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CR_FEIE = 0x08,
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CR_IOCE = 0x10
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};
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/* ICH_REG_GLOB_CNT (Global Control Register) Bits */
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enum REG_GLOB_CNT_BITS
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{
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CNT_GIE = 0x01,
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CNT_COLD = 0x02,
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CNT_WARM = 0x04,
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CNT_SHUT = 0x08,
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CNT_PRIE = 0x10,
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CNT_SRIE = 0x20
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};
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/* ICH_REG_GLOB_STA (Global Status Register) Bits */
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enum REG_GLOB_STA_BITS
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{
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STA_GSCI = 0x00000001, /* GPI Status Change Interrupt */
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STA_MIINT = 0x00000002, /* Modem In Interrupt */
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STA_MOINT = 0x00000004, /* Modem Out Interrupt */
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STA_PIINT = 0x00000020, /* PCM In Interrupt */
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STA_POINT = 0x00000040, /* PCM Out Interrupt */
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STA_MINT = 0x00000080, /* Mic In Interrupt */
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STA_S0CR = 0x00000100, /* AC_SDIN0 Codec Ready */
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STA_S1CR = 0x00000200, /* AC_SDIN1 Codec Ready */
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STA_S0RI = 0x00000400, /* AC_SDIN0 Resume Interrupt */
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STA_S1RI = 0x00000800, /* AC_SDIN1 Resume Interrupt */
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STA_RCS = 0x00008000, /* Read Completition Status */
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STA_AD3 = 0x00010000,
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STA_MD3 = 0x00020000,
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STA_M2INT = 0x01000000, /* Microphone 2 In Interrupt */
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STA_P2INT = 0x02000000, /* PCM In 2 Interrupt */
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STA_SPINT = 0x04000000, /* S/PDIF Interrupt */
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STA_BCS = 0x08000000, /* Bit Clock Stopped */
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STA_S2CR = 0x10000000, /* AC_SDIN2 Codec Ready */
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STA_S2RI = 0x20000000, /* AC_SDIN2 Resume Interrupt */
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STA_INTMASK = (STA_MIINT | STA_MOINT | STA_PIINT | STA_POINT | STA_MINT | STA_S0RI | STA_S1RI | STA_M2INT | STA_P2INT | STA_SPINT | STA_S2RI)
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};
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#define ICH_BD_COUNT 32
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/* The Hardware Buffer Descriptor */
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typedef struct {
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volatile uint32 buffer;
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volatile uint16 length;
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volatile uint16 flags;
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#define ICH_BDC_FLAG_IOC 0x8000
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} ich_bd;
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/* PCI Configuration Space */
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#define PCI_PCICMD 0x04
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#define PCI_PCICMD_IOS 0x01
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#define PCI_PCICMD_MSE 0x02
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#define PCI_PCICMD_BME 0x04
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#define PCI_CFG 0x41
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#define PCI_CFG_IOSE 0x01
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#define ICH4_MMBAR_SIZE 512
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#define ICH4_MBBAR_SIZE 256
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#endif
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@@ -0,0 +1,75 @@
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#include "lala/lala.h"
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#include "ichaudio.h"
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status_t ichaudio_attach(drv_t *dev, void **cookie, int id_table_index);
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status_t ichaudio_powerctl(void *cookie);
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status_t ichaudio_detach(void *cookie);
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id_table_t ichaudio_id_table[] = {
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{ 0x8086, 0x7195, -1, -1, -1, -1, -1, "Intel 82443MX AC97 audio" },
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{ 0x8086, 0x2415, -1, -1, -1, -1, -1, "Intel 82801AA (ICH) AC97 audio" },
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{ 0x8086, 0x2425, -1, -1, -1, -1, -1, "Intel 82801AB (ICH0) AC97 audio" },
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{ 0x8086, 0x2445, -1, -1, -1, -1, -1, "Intel 82801BA (ICH2) AC97 audio" },
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{ 0x8086, 0x2485, -1, -1, -1, -1, -1, "Intel 82801CA (ICH3) AC97 audio" },
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{ 0x8086, 0x24C5, -1, -1, -1, -1, -1, "Intel 82801DB (ICH4) AC97 audio", TYPE_ICH4 },
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{ 0x8086, 0x24D5, -1, -1, -1, -1, -1, "Intel 82801EB (ICH5) AC97 audio", TYPE_ICH4 },
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{ 0x1039, 0x7012, -1, -1, -1, -1, -1, "SiS SI7012 AC97 audio", TYPE_SIS7012 },
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{ 0x10DE, 0x01B1, -1, -1, -1, -1, -1, "NVIDIA nForce (MCP) AC97 audio" },
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{ 0x10DE, 0x006A, -1, -1, -1, -1, -1, "NVIDIA nForce 2 (MCP2) AC97 audio" },
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{ 0x10DE, 0x00DA, -1, -1, -1, -1, -1, "NVIDIA nForce 3 (MCP3) AC97 audio" },
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{ 0x1022, 0x764D, -1, -1, -1, -1, -1, "AMD AMD8111 AC97 audio" },
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{ 0x1022, 0x7445, -1, -1, -1, -1, -1, "AMD AMD768 AC97 audio" },
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{ 0x1003, 0x0004, -1, -1, -1, -1, -1, "Highpoint HPT372 RAID" },
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{ 0x1095, 0x3112, -1, -1, -1, -1, -1, "Silicon Image SATA Si3112" },
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{ 0x8086, 0x244b, -1, -1, -1, -1, -1, "Intel IDE Controller" },
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{ 0x8979, 0x6456, -1, -1, -1, -1, -1, "does not exist" },
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{ /* empty = end */}
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};
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driver_info_t driver_info = {
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ichaudio_id_table,
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"audio/lala/ichaudio",
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ichaudio_attach,
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ichaudio_detach,
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ichaudio_powerctl,
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};
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status_t
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ichaudio_attach(drv_t *dev, void **_cookie, int id_table_index)
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{
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ichaudio_cookie *cookie = (ichaudio_cookie *) malloc(sizeof(ichaudio_cookie));
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if (!cookie) return B_ERROR;
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*_cookie = cookie;
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if (get_module(B_PCI_MODULE_NAME,(module_info **)&cookie->pci) < 0) {
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return B_ERROR;
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}
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return B_OK;
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err:
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free(cookie);
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return B_OK;
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}
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status_t
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ichaudio_detach(void *_cookie)
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{
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ichaudio_cookie *cookie = (ichaudio_cookie *)_cookie;
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free(cookie);
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return B_OK;
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}
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status_t
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ichaudio_powerctl(void *_cookie)
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{
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ichaudio_cookie *cookie = (ichaudio_cookie *)_cookie;
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return B_OK;
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}
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@@ -0,0 +1,35 @@
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#include <SupportDefs.h>
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typedef struct
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{
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const char *name;
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uint32 nambar;
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uint32 nabmbar;
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uint32 irq;
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uint32 type;
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uint32 mmbar; // ich4
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uint32 mbbar; // ich4
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void * log_mmbar; // ich4
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void * log_mbbar; // ich4
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area_id area_mmbar; // ich4
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area_id area_mbbar; // ich4
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uint32 codecoffset;
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uint32 input_rate;
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uint32 output_rate;
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pci_module_info *pci;
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} ichaudio_cookie;
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#define TYPE_ICH4 0x01
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#define TYPE_SIS7012 0x02
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/* The SIS7012 chipset has SR and PICB registers swapped when compared to Intel */
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#define GET_REG_X_PICB(cfg) (((cfg)->type == TYPE_SIS7012) ? _ICH_REG_X_SR : _ICH_REG_X_PICB)
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#define GET_REG_X_SR(cfg) (((cfg)->type == TYPE_SIS7012) ? _ICH_REG_X_PICB : _ICH_REG_X_SR)
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/* Each 16 bit sample is counted as 1 in SIS7012 chipsets, 2 in all others */
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#define GET_HW_SAMPLE_SIZE(cfg) (((cfg)->type == TYPE_SIS7012) ? 1 : 2)
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@@ -0,0 +1,11 @@
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SubDir OBOS_TOP src add-ons kernel drivers audio ac97 ichaudio lala ;
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# R5KernelStaticLibrary lala :
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# driver.c
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# ;
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KernelMergeObject lala.o :
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driver.c
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:
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-fno-pic -D_KERNEL_MODE
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;
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@@ -0,0 +1,99 @@
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#include <KernelExport.h>
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#include <Drivers.h>
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#include <Errors.h>
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#include <OS.h>
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#include <malloc.h>
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int32 api_version = B_CUR_DRIVER_API_VERSION;
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#define MAX_DEVICES 8
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char * device_names[MAX_DEVICES];
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int device_count = 0;
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status_t
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init_hardware(void)
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{
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dprintf("init_hardware\n");
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return B_OK;
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}
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status_t
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init_driver(void)
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{
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dprintf("init_driver\n");
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return B_OK;
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}
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void
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uninit_driver(void)
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{
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dprintf("uninit_driver\n");
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}
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static status_t
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ich_open(const char *name, uint32 flags, void** cookie)
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{
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return B_OK;
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}
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static status_t
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ich_close(void* cookie)
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{
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return B_OK;
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}
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static status_t
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ich_free(void* cookie)
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{
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return B_OK;
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}
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static status_t
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ich_control(void* cookie, uint32 op, void* arg, size_t len)
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{
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return B_OK;
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}
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static status_t
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ich_read(void* cookie, off_t position, void *buf, size_t* num_bytes)
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{
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*num_bytes = 0;
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return B_IO_ERROR;
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}
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static status_t
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ich_write(void* cookie, off_t position, const void* buffer, size_t* num_bytes)
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{
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*num_bytes = 0;
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return B_IO_ERROR;
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}
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static const char *ich_name[] = {
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"audio/lala/ichaudio/1",
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NULL
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};
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device_hooks ich_hooks = {
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ich_open,
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ich_close,
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ich_free,
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ich_control,
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ich_read,
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ich_write
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};
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const char**
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publish_devices(void)
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{
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dprintf("publish_devices\n");
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return ich_name;
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}
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device_hooks*
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find_device(const char* name)
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{
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dprintf("find_device\n");
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return &ich_hooks;
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}
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@@ -0,0 +1,48 @@
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#include <KernelExport.h>
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#include <config_manager.h>
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#include <PCI.h>
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#include <OS.h>
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#include <malloc.h>
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typedef void drv_t;
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typedef void stream_id;
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typedef void control_id;
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typedef struct {
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int32 vendor;
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int32 device;
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int32 revision;
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int32 class;
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int32 subclass;
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int32 subsystem_vendor;
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int32 subsystem_device;
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const char *name;
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uint32 flags;
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} id_table_t;
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typedef status_t (*drv_attach) (drv_t *dev, void **cookie, int id_table_index);
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typedef status_t (*drv_powerctl) (void *cookie);
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typedef status_t (*drv_detach) (void *cookie);
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typedef struct
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{
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id_table_t * table;
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const char * basename;
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drv_attach attach;
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drv_detach detach;
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drv_powerctl powerctl;
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} driver_info_t;
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typedef struct
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{
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} stream_info_t;
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extern driver_info_t driver_info;
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stream_id create_stream(drv_t *dev, stream_info_t *info);
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status_t control_stream(drv_t *dev, stream_info_t *info);
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status_t delete_stream(stream_id stream);
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control_id create_control_group(control_id parent, dev_t *dev);
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control_id create_control(control_id parent, uint32 flags, void *get, void *set, const char *name);
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