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Fix sample rate calculation based on the AC-link clock rate.

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3248 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
beveloper
2003-05-15 19:20:14 +00:00
parent c77d826810
commit 6fc1b5bacd
2 changed files with 4 additions and 7 deletions
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src/add-ons/kernel/drivers/audio/ac97/ich/ac97.c
+4 -4
View File
@@ -332,7 +332,7 @@ ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
if (dev->set_rate)
return dev->set_rate(dev, reg, rate);
value = (uint32)((rate * (uint64)dev->clock) / 48000); /* use 64 bit calculation for rates 96000 or higher */
value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
LOG(("ac97_set_rate: clock = %d, rate = %d, value = %d\n", dev->clock, rate, value));
@@ -370,7 +370,7 @@ ac97_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate)
if (ac97_reg_cached_read(dev, AC97_EXTENDED_STAT_CTRL) & 0x0002)
value *= 2;
*rate = (value * 48000ULL) / dev->clock; /* use 64 bit calculation to avoid overflow*/
*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
return true;
}
@@ -640,7 +640,7 @@ ad1819_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
{
uint32 value;
value = (uint32)((rate * (uint64)dev->clock) / 48000); /* use 64 bit calculation for rates 96000 or higher */
value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
LOG(("ad1819_set_rate: clock = %d, rate = %d, value = %d\n", dev->clock, rate, value));
@@ -679,7 +679,7 @@ ad1819_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate)
return false;
}
*rate = (value * 48000) / dev->clock;
*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
return true;
}
src/add-ons/kernel/drivers/audio/ac97/ich/ich.c
-3
View File
@@ -434,9 +434,6 @@ ich_clock_calibrate()
} else if (rate > (48000 - 1000) && rate < (48000 + 1000)) {
LOG(("ich_clock_calibrate: setting clock 48000\n"));
ac97_set_clock(config->ac97, 48000);
} else if (rate > (41194 - 1000) && rate < (41194 + 1000)) {
LOG(("ich_clock_calibrate: setting clock 41194\n"));
ac97_set_clock(config->ac97, 41194);
} else if (rate > (55930 - 1000) && rate < (55930 + 1000)) {
LOG(("ich_clock_calibrate: setting clock 55930\n"));
ac97_set_clock(config->ac97, 55930);