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added retrace sync programming for NV12_IMAGE_BLIT command. Works OK it seems (testing in 3D add-on).

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16400 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2006-02-14 21:16:24 +00:00
parent 1157cf1e2f
commit 7fe04ec74b
1 changed files with 9 additions and 0 deletions
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src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
+9
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@@ -890,6 +890,15 @@ status_t nv_acc_init_dma()
ACCW(ABS_UCLP_XMAX, 0x00007fff); ACCW(ABS_UCLP_XMAX, 0x00007fff);
ACCW(ABS_UCLP_YMAX, 0x00007fff); ACCW(ABS_UCLP_YMAX, 0x00007fff);
/* setup sync parameters for NV12_IMAGE_BLIT command for the current mode:
* values given are CRTC vertical counter limit values. The NV12 command will wait
* for the specified's CRTC's vertical counter to be in between the given values */
if (si->ps.card_type >= NV11)
{
ACCW(NV11_CRTC_LO, si->dm.timing.v_display - 1);
ACCW(NV11_CRTC_HI, si->dm.timing.v_display + 1);
}
/*** PFIFO ***/ /*** PFIFO ***/
/* (setup caches) */ /* (setup caches) */
/* disable caches reassign */ /* disable caches reassign */