i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Mostly cleanup and style guide changes.

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12473 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2005-04-26 16:02:38 +00:00
parent 846f49314f
commit 81012f638c
8 changed files with 236 additions and 217 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/kernel/drivers/network/sis900/device.c
+13 -12
View File
@@ -1,7 +1,8 @@
/* device.c - device hooks for SiS900 networking
**
** Copyright © 2001-2004 pinc Software. All Rights Reserved.
*/
/* Device hooks for SiS 900 networking
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
*/
#include <OS.h>
#include <KernelExport.h>
@@ -251,7 +252,7 @@ device_open(const char *name, uint32 flags, void **cookie)
info->thisArea = area;
info->id = id;
info->pciInfo = pciInfo[id];
info->registers = (char *)pciInfo[id]->u.h0.base_registers[0];
info->registers = (addr_t)pciInfo[id]->u.h0.base_registers[0];
if (sis900_getMACAddress(info))
dprintf(DEVICE_NAME ": MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
@@ -279,7 +280,7 @@ device_open(const char *name, uint32 flags, void **cookie)
sis900_createRings(info);
// enable receiver's state machine
write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
// check link mode & add timer
sis900_checkMode(info);
@@ -313,7 +314,7 @@ device_close(void *data)
cancel_timer(&info->timer);
// disable the transmitter's and receiver's state machine
write32((uint32)info->registers + SiS900_MAC_COMMAND,
write32(info->registers + SiS900_MAC_COMMAND,
SiS900_MAC_CMD_Rx_DISABLE | SiS900_MAC_CMD_Tx_DISABLE);
// remove & disable interrupt
@@ -425,7 +426,7 @@ device_read(void *data, off_t pos, void *buffer, size_t *_length)
if (atomic_or(&info->rxLock, 1))
return B_ERROR;
//TRACE(("current rx descr: %08x (last = %ld)\n", rxp = read32((uint32)info->registers + SiS900_MAC_Rx_DESCR), (info->rxLast+1) % NUM_Rx_DESCR));
//TRACE(("current rx descr: %08x (last = %ld)\n", rxp = read32(info->registers + SiS900_MAC_Rx_DESCR), (info->rxLast+1) % NUM_Rx_DESCR));
// block until data is available (if blocking is allowed)
if ((status = acquire_sem_etc(info->rxSem, 1, B_CAN_INTERRUPT | blockFlag, 0)) != B_NO_ERROR) {
@@ -508,7 +509,7 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
// block until a free tx descriptor is available
if ((status = acquire_sem_etc(info->txSem, 1, B_TIMEOUT, ETHER_TRANSMIT_TIMEOUT)) < B_NO_ERROR) {
write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
TRACE(("write: acquiring sem failed: %lx, %s\n", status, strerror(status)));
atomic_add(&info->txLock, -1);
return status;
@@ -536,11 +537,11 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
#if 0
{
struct buffer_desc *b = (void *)read32((uint32)info->registers + SiS900_MAC_Tx_DESCR);
struct buffer_desc *b = (void *)read32(info->registers + SiS900_MAC_Tx_DESCR);
int16 that;
dprintf("\twrite: status %d = %lx, sent = %d\n", current, info->txDescriptor[current].status,info->txSent);
dprintf("write: %d: mem = %lx : hardware = %lx\n", current, physicalAddress(&info->txDescriptor[current],sizeof(struct buffer_desc)),read32((uint32)info->registers + SiS900_MAC_Tx_DESCR));
dprintf("write: %d: mem = %lx : hardware = %lx\n", current, physicalAddress(&info->txDescriptor[current],sizeof(struct buffer_desc)),read32(info->registers + SiS900_MAC_Tx_DESCR));
for (that = 0;that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],sizeof(struct buffer_desc)) != b;that++);
@@ -556,7 +557,7 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
}
// enable transmit state machine
write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
#ifdef EXCESSIVE_DEBUG
acquire_sem(gIOLock);
src/add-ons/kernel/drivers/network/sis900/device.h
+6 -1
View File
@@ -1,9 +1,14 @@
/* Device hooks for SiS 900 networking
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
*/
#ifndef DEVICE_H
#define DEVICE_H
#include <Drivers.h>
#define ETHER_TRANSMIT_TIMEOUT ((bigtime_t)5000000) /* five seconds */
#define ETHER_TRANSMIT_TIMEOUT ((bigtime_t)5000000)
/* five seconds */
/* The published PCI bus interface device hooks */
extern device_hooks gDeviceHooks;
src/add-ons/kernel/drivers/network/sis900/driver.c
+5 -4
View File
@@ -1,7 +1,8 @@
/* driver - kernel driver for SiS900 networking
**
** Copyright © 2001-2003 pinc Software. All Rights Reserved.
*/
/* Kernel driver for SiS 900 networking
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#include <OS.h>
src/add-ons/kernel/drivers/network/sis900/driver.h
+6 -5
View File
@@ -1,9 +1,10 @@
/* Kernel driver for SiS 900 networking
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#ifndef DRIVER_H
#define DRIVER_H
/* driver - kernel driver for SiS900 networking
**
** Copyright © 2001-2003 pinc Software. All Rights Reserved.
*/
// PCI Communications
@@ -21,7 +22,7 @@
#else /* MEMORY_MAPPED_PCI_ACCESS */
# define read8(address) (*((volatile uint8*)(address)))
# define read16(address) (*((volatile uint16*)(address)))
# define read32(address) (*((volatile uint32*)(address)))
# define read32(address) (*((volatile uint32*)(address)))
# define write8(address,data) (*((volatile uint8 *)(address)) = data)
# define write16(address,data) (*((volatile uint16 *)(address)) = (data))
# define write32(address,data) (*((volatile uint32 *)(address)) = (data))
src/add-ons/kernel/drivers/network/sis900/interface.c
+50 -48
View File
@@ -1,7 +1,9 @@
/* interface.c - MII, MDIO and EEPROM interface of SiS900
**
** Copyright 2001 pinc Software. All Rights Reserved.
*/
/* MII, MDIO and EEPROM interface of SiS 900
*
* Copyright 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#include <OS.h>
#include <KernelExport.h>
@@ -27,11 +29,12 @@
#define EEPROM_WRITE32(value) write32(eepromAccess,value)
uint16 eeprom_read(struct sis_info *info,int address)
uint16
eeprom_read(struct sis_info *info, int address)
{
long eepromAccess = (long)info->registers + SiS900_MAC_EEPROM_ACCESS;
uint32 readCmd = SiS900_EEPROM_CMD_READ | address;
uint16 retval = 0;
uint16 returnValue = 0;
int i;
EEPROM_WRITE32(0);
@@ -40,8 +43,7 @@ uint16 eeprom_read(struct sis_info *info,int address)
EEPROM_DELAY();
// Shift the read command (9) bits out.
for (i = 8;i >= 0;i--)
{
for (i = 8; i >= 0; i--) {
uint32 value = (readCmd & (1 << i)) ? SiS900_EEPROM_DATA_IN | SiS900_EEPROM_SELECT
: SiS900_EEPROM_SELECT;
@@ -50,17 +52,17 @@ uint16 eeprom_read(struct sis_info *info,int address)
EEPROM_WRITE32(value | SiS900_EEPROM_CLOCK);
EEPROM_DELAY();
}
EEPROM_WRITE8(SiS900_EEPROM_SELECT);
EEPROM_DELAY();
// read in the 16 bit data
for (i = 16;i > 0;i--)
{
for (i = 16; i > 0; i--) {
EEPROM_WRITE32(SiS900_EEPROM_SELECT);
EEPROM_DELAY();
EEPROM_WRITE32(SiS900_EEPROM_SELECT | SiS900_EEPROM_CLOCK);
EEPROM_DELAY();
retval = (retval << 1) | ((EEPROM_READ32() & SiS900_EEPROM_DATA_OUT) ? 1 : 0);
returnValue = (returnValue << 1) | ((EEPROM_READ32() & SiS900_EEPROM_DATA_OUT) ? 1 : 0);
EEPROM_DELAY();
}
@@ -68,7 +70,7 @@ uint16 eeprom_read(struct sis_info *info,int address)
EEPROM_DELAY();
EEPROM_WRITE32(SiS900_EEPROM_CLOCK);
return retval;
return returnValue;
}
@@ -76,15 +78,19 @@ uint16 eeprom_read(struct sis_info *info,int address)
// #pragma mark -
#define mdio_delay(address) read32(address)
static inline uint32
mdio_delay(addr_t address)
{
return read32(address);
}
static void
mdio_idle(uint32 address)
{
write32(address,SiS900_MII_MDIO | SiS900_MII_MDDIR);
write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR);
mdio_delay(address);
write32(address,SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
}
@@ -93,20 +99,19 @@ mdio_reset(uint32 address)
{
int32 i;
for (i = 32; i-- > 0;)
{
write32(address,SiS900_MII_MDIO | SiS900_MII_MDDIR);
for (i = 32; i-- > 0;) {
write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR);
mdio_delay(address);
write32(address,SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
mdio_delay(address);
}
}
void
mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
mdio_writeToPHY(struct sis_info *info, uint16 phy, uint16 reg, uint16 value)
{
uint32 address = (uint32)info->registers + SiS900_MAC_EEPROM_ACCESS;
uint32 address = info->registers + SiS900_MAC_EEPROM_ACCESS;
int32 cmd = MII_CMD_WRITE | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
int i;
@@ -114,45 +119,43 @@ mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
mdio_idle(address);
// issue the command
for (i = 16;i-- > 0;)
{
for (i = 16; i-- > 0;) {
int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
write8(address,data);
write8(address, data);
mdio_delay(address);
write8(address,data | SiS900_MII_MDC);
write8(address, data | SiS900_MII_MDC);
mdio_delay(address);
}
mdio_delay(address);
// write the value
for (i = 16;i-- > 0;)
{
for (i = 16; i-- > 0;) {
int32 data = SiS900_MII_MDDIR | (value & (1 << i) ? SiS900_MII_MDIO : 0);
write32(address,data);
write32(address, data);
mdio_delay(address);
write32(address,data | SiS900_MII_MDC);
write32(address, data | SiS900_MII_MDC);
mdio_delay(address);
}
mdio_delay(address);
// clear extra bits
for (i = 2;i-- > 0;)
{
write8(address,0);
for (i = 2; i-- > 0;) {
write8(address, 0);
mdio_delay(address);
write8(address,SiS900_MII_MDC);
write8(address, SiS900_MII_MDC);
mdio_delay(address);
}
write32(address,0);
write32(address, 0);
}
uint16
mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg)
mdio_readFromPHY(struct sis_info *info, uint16 phy, uint16 reg)
{
uint32 address = (uint32)info->registers + SiS900_MAC_EEPROM_ACCESS;
uint32 address = info->registers + SiS900_MAC_EEPROM_ACCESS;
int32 cmd = MII_CMD_READ | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
uint16 value = 0;
int i;
@@ -160,26 +163,24 @@ mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg)
mdio_reset(address);
mdio_idle(address);
for (i = 16; i-- > 0;)
{
for (i = 16; i-- > 0;) {
int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
write32(address,data);
write32(address, data);
mdio_delay(address);
write32(address,data | SiS900_MII_MDC);
write32(address, data | SiS900_MII_MDC);
mdio_delay(address);
}
// read the value
for (i = 16;i-- > 0;)
{
write32(address,0);
for (i = 16; i-- > 0;) {
write32(address, 0);
mdio_delay(address);
value = (value << 1) | (read32(address) & SiS900_MII_MDIO ? 1 : 0);
write32(address,SiS900_MII_MDC);
write32(address, SiS900_MII_MDC);
mdio_delay(address);
}
write32(address,0);
write32(address, 0);
return value;
}
@@ -188,7 +189,7 @@ mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg)
uint16
mdio_read(struct sis_info *info, uint16 reg)
{
return mdio_readFromPHY(info,info->phy,reg);
return mdio_readFromPHY(info, info->phy, reg);
}
@@ -208,7 +209,8 @@ mdio_statusFromPHY(struct sis_info *info, uint16 phy)
// the status must be retrieved two times, because the first
// one may not work on some PHYs (notably ICS 1893)
while (i++ < 2)
status = mdio_readFromPHY(info,phy,MII_STATUS);
status = mdio_readFromPHY(info, phy, MII_STATUS);
return status;
}
@@ -216,6 +218,6 @@ mdio_statusFromPHY(struct sis_info *info, uint16 phy)
uint16
mdio_status(struct sis_info *info)
{
return mdio_statusFromPHY(info,info->phy);
return mdio_statusFromPHY(info, info->phy);
}
src/add-ons/kernel/drivers/network/sis900/interface.h
+12 -6
View File
@@ -1,17 +1,23 @@
/* MII, MDIO and EEPROM interface of SiS 900
*
* Copyright 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#ifndef INTERFACE_H
#define INTERFACE_H
#include "sis900.h"
extern uint16 eeprom_read(struct sis_info *info,int address);
extern uint16 mdio_read(struct sis_info *info,uint16 reg);
extern uint16 mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg);
extern void mdio_write(struct sis_info *info,uint16 reg,uint16 value);
extern void mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value);
extern uint16 eeprom_read(struct sis_info *info, int address);
extern uint16 mdio_read(struct sis_info *info, uint16 reg);
extern uint16 mdio_readFromPHY(struct sis_info *info, uint16 phy, uint16 reg);
extern void mdio_write(struct sis_info *info, uint16 reg, uint16 value);
extern void mdio_writeToPHY(struct sis_info *info, uint16 phy, uint16 reg, uint16 value);
extern uint16 mdio_statusFromPHY(struct sis_info *info, uint16 phy);
extern uint16 mdio_status(struct sis_info *info);
#endif /* INTERFACE_H */
src/add-ons/kernel/drivers/network/sis900/sis900.c
+104 -103
View File
@@ -1,7 +1,8 @@
/* sis900.c - SiS900 chip specific functions
**
** Copyright © 2001-2004 pinc Software. All Rights Reserved.
*/
/* SiS 900 chip specific functions
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#include <OS.h>
@@ -39,32 +40,38 @@ int32 sis900_readMode(struct sis_info *info);
#define MII_HOME 0x0001
#define MII_LAN 0x0002
const static struct mii_chip_info
{
const char *name;
uint16 id0,id1;
uint8 types;
}
gMIIChips[] = {
{"SiS 900 Internal MII PHY", PHY_ID0_SiS900_INTERNAL,PHY_ID1_SiS900_INTERNAL,MII_LAN},
{"SiS 7014 Physical Layer Solution",0x0016, 0xf830, MII_LAN},
{"AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, MII_LAN},
{"AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, MII_HOME},
{"ICS 1893 LAN PHY", PHY_ID0_ICS_1893,PHY_ID1_ICS_1893,MII_LAN},
{"NS 83851 PHY", 0x2000, 0x5C20, MII_LAN | MII_HOME},
{"Realtek RTL8201 PHY", PHY_ID0_REALTEK_8201,PHY_ID1_REALTEK_8201,MII_LAN},
{NULL,0,0,0}
const static struct mii_chip_info {
const char *name;
uint16 id0, id1;
uint8 types;
} gMIIChips[] = {
{"SiS 900 Internal MII PHY",
PHY_ID0_SiS900_INTERNAL, PHY_ID1_SiS900_INTERNAL, MII_LAN},
{"SiS 7014 Physical Layer Solution",
0x0016, 0xf830, MII_LAN},
{"AMD 79C901 10BASE-T PHY",
0x0000, 0x6B70, MII_LAN},
{"AMD 79C901 HomePNA PHY",
0x0000, 0x6B90, MII_HOME},
{"ICS 1893 LAN PHY",
PHY_ID0_ICS_1893, PHY_ID1_ICS_1893, MII_LAN},
{"NS 83851 PHY",
0x2000, 0x5C20, MII_LAN | MII_HOME},
{"Realtek RTL8201 PHY",
PHY_ID0_REALTEK_8201, PHY_ID1_REALTEK_8201, MII_LAN},
{NULL, 0, 0, 0}
};
/***************************** helper functions *****************************/
static uint32
physicalAddress(volatile void *address,uint32 length)
physicalAddress(volatile void *address, uint32 length)
{
physical_entry table;
get_memory_map((void *)address,length,&table,1);
get_memory_map((void *)address, length, &table, 1);
return (uint32)table.address;
}
@@ -87,10 +94,8 @@ sis900_rxInterrupt(struct sis_info *info)
HACK(spin(10000));
// check for packet ownership
for (limit = info->rxFree; limit > 0; limit--)
{
if (!(info->rxDescriptor[info->rxInterruptIndex].status & SiS900_DESCR_OWN))
{
for (limit = info->rxFree; limit > 0; limit--) {
if (!(info->rxDescriptor[info->rxInterruptIndex].status & SiS900_DESCR_OWN)) {
// if (limit == info->rxFree)
// {
//dprintf("here!\n");
@@ -100,6 +105,7 @@ sis900_rxInterrupt(struct sis_info *info)
break;
}
//dprintf("received frame %d!\n",info->rxInterruptIndex);
releaseRxSem++;
info->rxInterruptIndex = (info->rxInterruptIndex + 1) & NUM_Rx_MASK;
info->rxFree--;
@@ -107,11 +113,10 @@ sis900_rxInterrupt(struct sis_info *info)
release_spinlock(&info->rxSpinlock);
// reenable rx queue
write32((uint32)info->registers + SiS900_MAC_COMMAND,SiS900_MAC_CMD_Rx_ENABLE);
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
if (releaseRxSem)
{
release_sem_etc(info->rxSem,releaseRxSem,B_DO_NOT_RESCHEDULE);
if (releaseRxSem) {
release_sem_etc(info->rxSem, releaseRxSem, B_DO_NOT_RESCHEDULE);
return B_INVOKE_SCHEDULER;
}
@@ -130,26 +135,24 @@ sis900_txInterrupt(struct sis_info *info)
HACK(spin(10000));
//dprintf("here we are: sent = %d\n",info->txSent);
for (limit = info->txSent; limit > 0; limit--)
{
for (limit = info->txSent; limit > 0; limit--) {
status = info->txDescriptor[info->txInterruptIndex].status;
//dprintf("txIntr: %d: mem = %lx : hardware = %lx\n",info->txInterruptIndex,
// physicalAddress(&info->txDescriptor[info->txInterruptIndex],sizeof(struct buffer_desc)),
// read32((uint32)info->registers + SiS900_MAC_Tx_DESCR));
// read32(info->registers + SiS900_MAC_Tx_DESCR));
/* Does the device generate extra interrupts? */
if (status & SiS900_DESCR_OWN)
{
struct buffer_desc *b = (void *)read32((uint32)info->registers + SiS900_MAC_Tx_DESCR);
if (status & SiS900_DESCR_OWN) {
struct buffer_desc *descriptor = (void *)read32(info->registers + SiS900_MAC_Tx_DESCR);
int16 that;
for (that = 0;that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],sizeof(struct buffer_desc)) != b;that++);
if (that == NUM_Tx_DESCR)
{
//dprintf("not in ring!\n");
that = 0;
for (that = 0;
that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],
sizeof(struct buffer_desc)) != descriptor; that++) {
}
if (that == NUM_Tx_DESCR)
that = 0;
//dprintf("tx busy %d: %lx (hardware status %d = %lx)!\n",info->txInterruptIndex,status,that,info->txDescriptor[that].status);
// if (limit == info->txSent)
// {
@@ -160,11 +163,10 @@ sis900_txInterrupt(struct sis_info *info)
break;
}
//dprintf("tx %d!\n",info->txInterruptIndex);
if (status & (SiS900_DESCR_Tx_ABORT | SiS900_DESCR_Tx_UNDERRUN |
SiS900_DESCR_Tx_OOW_COLLISION))
if (status & (SiS900_DESCR_Tx_ABORT | SiS900_DESCR_Tx_UNDERRUN
| SiS900_DESCR_Tx_OOW_COLLISION)) {
dprintf("tx error: %lx\n", status);
else
} else
info->txDescriptor[info->txInterruptIndex].status = 0;
releaseTxSem++; /* this many buffers are free */
@@ -176,12 +178,8 @@ sis900_txInterrupt(struct sis_info *info)
}
release_spinlock(&info->txSpinlock);
if (releaseTxSem)
{
// sem_info semInfo;
// get_sem_info(info->txSem,&semInfo);
release_sem_etc(info->txSem,releaseTxSem,B_DO_NOT_RESCHEDULE);
if (releaseTxSem) {
release_sem_etc(info->txSem, releaseTxSem, B_DO_NOT_RESCHEDULE);
return B_INVOKE_SCHEDULER;
}
@@ -203,7 +201,7 @@ sis900_interrupt(void *data)
while (worklimit-- > 0) {
// reading the interrupt status register clears all interrupts
intr = read32((uint32)info->registers + SiS900_MAC_INTR_STATUS);
intr = read32(info->registers + SiS900_MAC_INTR_STATUS);
if (!intr)
break;
@@ -212,12 +210,12 @@ sis900_interrupt(void *data)
lastIntr[intrCounter] = intr;
// wake-up event interrupt
if (intr & SiS900_INTR_WAKEUP_EVENT)
{
TRACE(("wake-up event received: %ld\n", read32((uint32)info->registers + SiS900_MAC_WAKEUP_EVENT)));
if (intr & SiS900_INTR_WAKEUP_EVENT) {
TRACE(("wake-up event received: %ld\n",
read32(info->registers + SiS900_MAC_WAKEUP_EVENT)));
// clear PM event register
write32((uint32)info->registers + SiS900_MAC_WAKEUP_EVENT,
write32(info->registers + SiS900_MAC_WAKEUP_EVENT,
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
handled = B_HANDLED_INTERRUPT;
}
@@ -243,28 +241,28 @@ sis900_interrupt(void *data)
void
sis900_disableInterrupts(struct sis_info *info)
{
write32((uint32)info->registers + SiS900_MAC_INTR_MASK,0);
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,0);
write32(info->registers + SiS900_MAC_INTR_MASK, 0);
write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
}
void
sis900_enableInterrupts(struct sis_info *info)
{
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,0);
write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
// enable link detection
write32((uint32)info->registers + SiS900_MAC_WAKEUP_CONTROL,
write32(info->registers + SiS900_MAC_WAKEUP_CONTROL,
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
// set interrupt mask
write32((uint32)info->registers + SiS900_MAC_INTR_MASK,
write32(info->registers + SiS900_MAC_INTR_MASK,
//SiS900_INTR_WAKEUP_EVENT |
SiS900_INTR_Tx_UNDERRUN | SiS900_INTR_Tx_ERROR | SiS900_INTR_Tx_IDLE | SiS900_INTR_Tx_OK |
SiS900_INTR_Rx_STATUS_OVERRUN | SiS900_INTR_Rx_OVERRUN |
SiS900_INTR_Rx_ERROR | SiS900_INTR_Rx_OK);
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,1);
write32(info->registers + SiS900_MAC_INTR_ENABLE,1);
}
@@ -340,9 +338,9 @@ sis900_initPHYs(struct sis_info *info)
for (phy = 0; phy < 32; phy++) {
struct mii_phy *mii;
uint16 status;
int i;
int32 i;
status = mdio_statusFromPHY(info,phy);
status = mdio_statusFromPHY(info, phy);
if (status == 0xffff || status == 0x0000)
// this MII is not accessable
continue;
@@ -352,14 +350,15 @@ sis900_initPHYs(struct sis_info *info)
return B_NO_MEMORY;
mii->address = phy;
mii->id0 = mdio_readFromPHY(info,phy,MII_PHY_ID0);
mii->id1 = mdio_readFromPHY(info,phy,MII_PHY_ID1);
mii->id0 = mdio_readFromPHY(info, phy, MII_PHY_ID0);
mii->id1 = mdio_readFromPHY(info, phy, MII_PHY_ID1);
mii->types = MII_HOME;
mii->next = info->firstPHY;
info->firstPHY = mii;
for (i = 0; gMIIChips[i].name; i++) {
if (gMIIChips[i].id0 != mii->id0 || gMIIChips[i].id1 != (mii->id1 & 0xfff0))
if (gMIIChips[i].id0 != mii->id0
|| gMIIChips[i].id1 != (mii->id1 & 0xfff0))
continue;
dprintf("Found MII PHY: %s\n", gMIIChips[i].name);
@@ -368,7 +367,7 @@ sis900_initPHYs(struct sis_info *info)
break;
}
if (gMIIChips[i].name == NULL)
dprintf("Unknown MII PHY transceiver: id = (%x, %x).\n",mii->id0,mii->id1);
dprintf("Unknown MII PHY transceiver: id = (%x, %x).\n", mii->id0, mii->id1);
}
if (info->firstPHY == NULL) {
@@ -384,7 +383,7 @@ sis900_initPHYs(struct sis_info *info)
if (sis900_resetPHY(info) & MII_STATUS_LINK) {
uint16 poll = MII_STATUS_LINK;
while (poll) {
poll ^= mdio_read(info,MII_STATUS) & poll;
poll ^= mdio_read(info, MII_STATUS) & poll;
}
}
}
@@ -401,7 +400,7 @@ sis900_initPHYs(struct sis_info *info)
mdio_write(info, MII_CONFIG2, 0xff00);
mdio_write(info, MII_MASK, 0xffc0);
}
info->link = mdio_status(info) & MII_STATUS_LINK;
return B_OK;
@@ -427,7 +426,7 @@ sis900_selectPHY(struct sis_info *info)
void
sis900_setMode(struct sis_info *info, int32 mode)
{
uint32 address = (uint32)info->registers + SiS900_MAC_CONFIG;
uint32 address = info->registers + SiS900_MAC_CONFIG;
uint32 txFlags = SiS900_Tx_AUTO_PADDING | SiS900_Tx_FILL_THRES;
uint32 rxFlags = 0;
int32 speed = mode & LINK_SPEED_MASK;
@@ -455,8 +454,8 @@ sis900_setMode(struct sis_info *info, int32 mode)
rxFlags |= SiS900_Rx_ACCEPT_Tx_PACKETS;
}
write32((uint32)info->registers + SiS900_MAC_Tx_CONFIG, txFlags);
write32((uint32)info->registers + SiS900_MAC_Rx_CONFIG, rxFlags);
write32(info->registers + SiS900_MAC_Tx_CONFIG, txFlags);
write32(info->registers + SiS900_MAC_Rx_CONFIG, rxFlags);
}
@@ -536,7 +535,7 @@ sis900_autoNegotiate(struct sis_info *info)
void
sis900_checkMode(struct sis_info *info)
{
uint32 address = (uint32)info->registers + SiS900_MAC_CONFIG;
uint32 address = info->registers + SiS900_MAC_CONFIG;
if (info->fixedMode != 0) {
TRACE((DEVICE_NAME ": link mode set via settings\n"));
@@ -575,7 +574,7 @@ sis900_getMACAddress(struct sis_info *info)
if (info->pciInfo->revision >= SiS900_REVISION_SiS96x) {
// SiS 962 & 963 are using a different method to access the EEPROM
// than the standard SiS 630
long eepromAccess = (long)info->registers + SiS900_MAC_EEPROM_ACCESS;
addr_t eepromAccess = info->registers + SiS900_MAC_EEPROM_ACCESS;
uint32 tries = 0;
write32(eepromAccess, SiS96x_EEPROM_CMD_REQ);
@@ -608,10 +607,10 @@ sis900_getMACAddress(struct sis_info *info)
int32 index;
for (index = 0; pci->get_nth_pci_info(index, &isa) == B_OK; index++) {
if (isa.vendor_id == VENDOR_ID_SiS && isa.device_id == DEVICE_ID_SiS_ISA_BRIDGE)
{
if (isa.vendor_id == VENDOR_ID_SiS
&& isa.device_id == DEVICE_ID_SiS_ISA_BRIDGE) {
uint8 reg,i;
uint32 registers = isa.u.h0.base_registers[0];
addr_t registers = isa.u.h0.base_registers[0];
reg = pci->read_pci_config(isa.bus,isa.device,isa.function,0x48,1);
pci->write_pci_config(isa.bus,isa.device,isa.function,0x48,1,reg | 0x40);
@@ -656,24 +655,21 @@ sis900_getMACAddress(struct sis_info *info)
status_t
sis900_reset(struct sis_info *info)
{
uint32 address = (uint32)info->registers + SiS900_MAC_COMMAND;
addr_t address = info->registers + SiS900_MAC_COMMAND;
int16 tries = 1000;
TRACE(("sis900 reset\n"));
//write32((uint32)info->registers + SiS900_MAC_INTR_MASK, 0);
//write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE, 0);
write32(address, SiS900_MAC_CMD_RESET);
write32((uint32)info->registers + SiS900_MAC_Rx_FILTER_CONTROL, SiS900_RxF_ENABLE |
write32(info->registers + SiS900_MAC_Rx_FILTER_CONTROL, SiS900_RxF_ENABLE |
SiS900_RxF_ACCEPT_ALL_BROADCAST | SiS900_RxF_ACCEPT_ALL_MULTICAST);
// wait until the chip leaves reset state
while ((read32(address) & SiS900_MAC_CMD_RESET) && tries-- > 0)
snooze(2);
write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
return B_OK;
}
@@ -682,7 +678,7 @@ sis900_reset(struct sis_info *info)
void
sis900_setPromiscuous(struct sis_info *info, bool on)
{
long filterControl = (long)info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
int32 filter = read32(filterControl);
// accept all incoming packets (or not)
@@ -697,17 +693,18 @@ sis900_setPromiscuous(struct sis_info *info, bool on)
void
sis900_setRxFilter(struct sis_info *info)
{
long filterControl = (long)info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
long filterData = (long)info->registers + SiS900_MAC_Rx_FILTER_DATA;
int i;
addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
addr_t filterData = info->registers + SiS900_MAC_Rx_FILTER_DATA;
int32 i;
// set MAC address as receive filter
for (i = 0; i < 3; i++) {
write32(filterControl, i << SiS900_Rx_FILTER_ADDRESS_SHIFT);
write32(filterData, info->address.ebyte[i*2] | (info->address.ebyte[i*2 + 1] << 8));
}
write32(filterControl, SiS900_RxF_ENABLE |
SiS900_RxF_ACCEPT_ALL_BROADCAST | SiS900_RxF_ACCEPT_ALL_MULTICAST /*| SiS900_RxF_ACCEPT_ALL_ADDRESSES*/);
write32(filterControl, SiS900_RxF_ENABLE
| SiS900_RxF_ACCEPT_ALL_BROADCAST
| SiS900_RxF_ACCEPT_ALL_MULTICAST /*| SiS900_RxF_ACCEPT_ALL_ADDRESSES*/);
}
@@ -725,10 +722,11 @@ sis900_createRings(struct sis_info *info)
uint16 i;
// create transmit buffer area
if ((info->txArea = create_area("sis900 tx buffer", (void **)&info->txBuffer[0],
B_ANY_KERNEL_ADDRESS,
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Tx_DESCR),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA)) < B_OK)
info->txArea = create_area("sis900 tx buffer", (void **)&info->txBuffer[0],
B_ANY_KERNEL_ADDRESS,
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Tx_DESCR),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
if (info->txArea < B_OK)
return info->txArea;
// initialize transmit buffer descriptors
@@ -747,11 +745,11 @@ sis900_createRings(struct sis_info *info)
}
// create receive buffer area
if ((info->rxArea = create_area("sis900 rx buffer", (void **)&info->rxBuffer[0],
B_ANY_KERNEL_ADDRESS,
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Rx_DESCR),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA)) < B_OK)
{
info->rxArea = create_area("sis900 rx buffer", (void **)&info->rxBuffer[0],
B_ANY_KERNEL_ADDRESS,
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Rx_DESCR),
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
if (info->rxArea < B_OK) {
delete_area(info->txArea);
return info->rxArea;
}
@@ -762,14 +760,17 @@ sis900_createRings(struct sis_info *info)
for (i = 0; i < NUM_Rx_DESCR; i++) {
info->rxDescriptor[i].status = MAX_FRAME_SIZE;
info->rxDescriptor[i].buffer = physicalAddress(info->rxBuffer[i],BUFFER_SIZE);
info->rxDescriptor[i].link = physicalAddress(&info->rxDescriptor[(i + 1) & NUM_Rx_MASK],sizeof(struct buffer_desc));
info->rxDescriptor[i].buffer = physicalAddress(info->rxBuffer[i], BUFFER_SIZE);
info->rxDescriptor[i].link = physicalAddress(&info->rxDescriptor[(i + 1) & NUM_Rx_MASK],
sizeof(struct buffer_desc));
}
info->rxFree = NUM_Rx_DESCR;
// set descriptor pointer registers
write32((uint32)info->registers + SiS900_MAC_Tx_DESCR,physicalAddress(&info->txDescriptor[0],sizeof(struct buffer_desc)));
write32((uint32)info->registers + SiS900_MAC_Rx_DESCR,physicalAddress(&info->rxDescriptor[0],sizeof(struct buffer_desc)));
write32(info->registers + SiS900_MAC_Tx_DESCR,
physicalAddress(&info->txDescriptor[0], sizeof(struct buffer_desc)));
write32(info->registers + SiS900_MAC_Rx_DESCR,
physicalAddress(&info->rxDescriptor[0], sizeof(struct buffer_desc)));
return B_OK;
}
src/add-ons/kernel/drivers/network/sis900/sis900.h
+40 -38
View File
@@ -1,13 +1,15 @@
/* SiS 900 driver/chip specific definitions
*
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
* Distributed under the terms of the MIT license.
*/
#ifndef SIS900_H
#define SIS900_H
/* sis900.h - SiS 900 driver/chip specific definitions
**
** Copyright © 2001-2003 pinc Software. All Rights Reserved.
*/
#include "ether_driver.h"
#define VENDOR_ID_SiS 0x1039
#define DEVICE_ID_SiS900 0x900
@@ -31,9 +33,9 @@ enum SiS_revisions {
/***************************** Buffer & Buffer Descriptors *****************************/
struct buffer_desc {
uint32 link;
uint32 status;
uint32 buffer;
uint32 link;
uint32 status;
uint32 buffer;
};
enum SiS900_buffer_desc_bits {
@@ -81,44 +83,44 @@ enum SiS900_buffer_desc_bits {
/***************************** Private Device Data *****************************/
struct sis_info {
timer timer;
uint32 cookieMagic;
area_id thisArea;
uint32 id;
spinlock lock;
pci_info *pciInfo;
volatile unsigned char *registers;
ether_address_t address;
volatile int32 blockFlag;
timer timer;
uint32 cookieMagic;
area_id thisArea;
uint32 id;
spinlock lock;
pci_info *pciInfo;
volatile addr_t registers;
ether_address_t address;
volatile int32 blockFlag;
struct mii_phy *firstPHY;
struct mii_phy *currentPHY;
uint16 phy;
bool autoNegotiationComplete;
bool link;
uint16 fixedMode;
struct mii_phy *firstPHY;
struct mii_phy *currentPHY;
uint16 phy;
bool autoNegotiationComplete;
bool link;
uint16 fixedMode;
// receive data
volatile struct buffer_desc rxDescriptor[NUM_Rx_DESCR];
volatile char *rxBuffer[NUM_Rx_DESCR];
area_id rxArea;
sem_id rxSem;
spinlock rxSpinlock;
int32 rxLock;
int16 rxCurrent;
int16 rxInterruptIndex;
int16 rxFree;
volatile char *rxBuffer[NUM_Rx_DESCR];
area_id rxArea;
sem_id rxSem;
spinlock rxSpinlock;
int32 rxLock;
int16 rxCurrent;
int16 rxInterruptIndex;
int16 rxFree;
// transmit data
volatile struct buffer_desc txDescriptor[NUM_Tx_DESCR];
volatile char *txBuffer[NUM_Tx_DESCR];
area_id txArea;
sem_id txSem;
spinlock txSpinlock;
int32 txLock;
int16 txCurrent;
int16 txInterruptIndex;
int16 txSent;
volatile char *txBuffer[NUM_Tx_DESCR];
area_id txArea;
sem_id txSem;
spinlock txSpinlock;
int32 txLock;
int16 txCurrent;
int16 txInterruptIndex;
int16 txSent;
};
#define SiS_COOKIE_MAGIC 's900'