Mostly cleanup and style guide changes.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12473 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -1,8 +1,9 @@
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/* device.c - device hooks for SiS900 networking
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/* Device hooks for SiS 900 networking
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**
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*
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** Copyright © 2001-2004 pinc Software. All Rights Reserved.
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* Copyright © 2001-2005 pinc Software. All Rights Reserved.
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*/
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*/
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#include <OS.h>
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#include <OS.h>
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#include <KernelExport.h>
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#include <KernelExport.h>
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#include <Drivers.h>
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#include <Drivers.h>
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@@ -251,7 +252,7 @@ device_open(const char *name, uint32 flags, void **cookie)
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info->thisArea = area;
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info->thisArea = area;
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info->id = id;
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info->id = id;
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info->pciInfo = pciInfo[id];
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info->pciInfo = pciInfo[id];
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info->registers = (char *)pciInfo[id]->u.h0.base_registers[0];
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info->registers = (addr_t)pciInfo[id]->u.h0.base_registers[0];
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if (sis900_getMACAddress(info))
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if (sis900_getMACAddress(info))
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dprintf(DEVICE_NAME ": MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
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dprintf(DEVICE_NAME ": MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
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@@ -279,7 +280,7 @@ device_open(const char *name, uint32 flags, void **cookie)
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sis900_createRings(info);
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sis900_createRings(info);
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// enable receiver's state machine
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// enable receiver's state machine
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write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
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write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
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// check link mode & add timer
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// check link mode & add timer
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sis900_checkMode(info);
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sis900_checkMode(info);
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@@ -313,7 +314,7 @@ device_close(void *data)
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cancel_timer(&info->timer);
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cancel_timer(&info->timer);
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// disable the transmitter's and receiver's state machine
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// disable the transmitter's and receiver's state machine
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write32((uint32)info->registers + SiS900_MAC_COMMAND,
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write32(info->registers + SiS900_MAC_COMMAND,
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SiS900_MAC_CMD_Rx_DISABLE | SiS900_MAC_CMD_Tx_DISABLE);
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SiS900_MAC_CMD_Rx_DISABLE | SiS900_MAC_CMD_Tx_DISABLE);
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// remove & disable interrupt
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// remove & disable interrupt
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@@ -425,7 +426,7 @@ device_read(void *data, off_t pos, void *buffer, size_t *_length)
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if (atomic_or(&info->rxLock, 1))
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if (atomic_or(&info->rxLock, 1))
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return B_ERROR;
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return B_ERROR;
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//TRACE(("current rx descr: %08x (last = %ld)\n", rxp = read32((uint32)info->registers + SiS900_MAC_Rx_DESCR), (info->rxLast+1) % NUM_Rx_DESCR));
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//TRACE(("current rx descr: %08x (last = %ld)\n", rxp = read32(info->registers + SiS900_MAC_Rx_DESCR), (info->rxLast+1) % NUM_Rx_DESCR));
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// block until data is available (if blocking is allowed)
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// block until data is available (if blocking is allowed)
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if ((status = acquire_sem_etc(info->rxSem, 1, B_CAN_INTERRUPT | blockFlag, 0)) != B_NO_ERROR) {
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if ((status = acquire_sem_etc(info->rxSem, 1, B_CAN_INTERRUPT | blockFlag, 0)) != B_NO_ERROR) {
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@@ -508,7 +509,7 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
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// block until a free tx descriptor is available
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// block until a free tx descriptor is available
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if ((status = acquire_sem_etc(info->txSem, 1, B_TIMEOUT, ETHER_TRANSMIT_TIMEOUT)) < B_NO_ERROR) {
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if ((status = acquire_sem_etc(info->txSem, 1, B_TIMEOUT, ETHER_TRANSMIT_TIMEOUT)) < B_NO_ERROR) {
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write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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TRACE(("write: acquiring sem failed: %lx, %s\n", status, strerror(status)));
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TRACE(("write: acquiring sem failed: %lx, %s\n", status, strerror(status)));
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atomic_add(&info->txLock, -1);
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atomic_add(&info->txLock, -1);
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return status;
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return status;
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@@ -536,11 +537,11 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
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#if 0
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#if 0
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{
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{
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struct buffer_desc *b = (void *)read32((uint32)info->registers + SiS900_MAC_Tx_DESCR);
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struct buffer_desc *b = (void *)read32(info->registers + SiS900_MAC_Tx_DESCR);
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int16 that;
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int16 that;
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dprintf("\twrite: status %d = %lx, sent = %d\n", current, info->txDescriptor[current].status,info->txSent);
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dprintf("\twrite: status %d = %lx, sent = %d\n", current, info->txDescriptor[current].status,info->txSent);
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dprintf("write: %d: mem = %lx : hardware = %lx\n", current, physicalAddress(&info->txDescriptor[current],sizeof(struct buffer_desc)),read32((uint32)info->registers + SiS900_MAC_Tx_DESCR));
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dprintf("write: %d: mem = %lx : hardware = %lx\n", current, physicalAddress(&info->txDescriptor[current],sizeof(struct buffer_desc)),read32(info->registers + SiS900_MAC_Tx_DESCR));
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for (that = 0;that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],sizeof(struct buffer_desc)) != b;that++);
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for (that = 0;that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],sizeof(struct buffer_desc)) != b;that++);
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@@ -556,7 +557,7 @@ device_write(void *data, off_t pos, const void *buffer, size_t *_length)
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}
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}
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// enable transmit state machine
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// enable transmit state machine
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write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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#ifdef EXCESSIVE_DEBUG
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#ifdef EXCESSIVE_DEBUG
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acquire_sem(gIOLock);
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acquire_sem(gIOLock);
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@@ -1,9 +1,14 @@
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/* Device hooks for SiS 900 networking
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*
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* Copyright © 2001-2005 pinc Software. All Rights Reserved.
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*/
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#ifndef DEVICE_H
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#ifndef DEVICE_H
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#define DEVICE_H
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#define DEVICE_H
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#include <Drivers.h>
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#include <Drivers.h>
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#define ETHER_TRANSMIT_TIMEOUT ((bigtime_t)5000000) /* five seconds */
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#define ETHER_TRANSMIT_TIMEOUT ((bigtime_t)5000000)
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/* five seconds */
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/* The published PCI bus interface device hooks */
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/* The published PCI bus interface device hooks */
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extern device_hooks gDeviceHooks;
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extern device_hooks gDeviceHooks;
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@@ -1,6 +1,7 @@
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/* driver - kernel driver for SiS900 networking
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/* Kernel driver for SiS 900 networking
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**
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*
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** Copyright © 2001-2003 pinc Software. All Rights Reserved.
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* Copyright © 2001-2005 pinc Software. All Rights Reserved.
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* Distributed under the terms of the MIT license.
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*/
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*/
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@@ -1,9 +1,10 @@
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/* Kernel driver for SiS 900 networking
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*
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* Copyright © 2001-2005 pinc Software. All Rights Reserved.
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* Distributed under the terms of the MIT license.
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*/
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#ifndef DRIVER_H
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#ifndef DRIVER_H
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#define DRIVER_H
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#define DRIVER_H
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/* driver - kernel driver for SiS900 networking
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**
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** Copyright © 2001-2003 pinc Software. All Rights Reserved.
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*/
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// PCI Communications
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// PCI Communications
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@@ -1,8 +1,10 @@
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/* interface.c - MII, MDIO and EEPROM interface of SiS900
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/* MII, MDIO and EEPROM interface of SiS 900
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**
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*
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** Copyright 2001 pinc Software. All Rights Reserved.
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* Copyright 2001-2005 pinc Software. All Rights Reserved.
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* Distributed under the terms of the MIT license.
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*/
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*/
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#include <OS.h>
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#include <OS.h>
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#include <KernelExport.h>
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#include <KernelExport.h>
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#include <SupportDefs.h>
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#include <SupportDefs.h>
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@@ -27,11 +29,12 @@
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#define EEPROM_WRITE32(value) write32(eepromAccess,value)
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#define EEPROM_WRITE32(value) write32(eepromAccess,value)
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uint16 eeprom_read(struct sis_info *info,int address)
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uint16
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eeprom_read(struct sis_info *info, int address)
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{
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{
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long eepromAccess = (long)info->registers + SiS900_MAC_EEPROM_ACCESS;
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long eepromAccess = (long)info->registers + SiS900_MAC_EEPROM_ACCESS;
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uint32 readCmd = SiS900_EEPROM_CMD_READ | address;
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uint32 readCmd = SiS900_EEPROM_CMD_READ | address;
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uint16 retval = 0;
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uint16 returnValue = 0;
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int i;
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int i;
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EEPROM_WRITE32(0);
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EEPROM_WRITE32(0);
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@@ -40,8 +43,7 @@ uint16 eeprom_read(struct sis_info *info,int address)
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EEPROM_DELAY();
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EEPROM_DELAY();
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// Shift the read command (9) bits out.
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// Shift the read command (9) bits out.
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for (i = 8;i >= 0;i--)
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for (i = 8; i >= 0; i--) {
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{
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uint32 value = (readCmd & (1 << i)) ? SiS900_EEPROM_DATA_IN | SiS900_EEPROM_SELECT
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uint32 value = (readCmd & (1 << i)) ? SiS900_EEPROM_DATA_IN | SiS900_EEPROM_SELECT
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: SiS900_EEPROM_SELECT;
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: SiS900_EEPROM_SELECT;
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@@ -50,17 +52,17 @@ uint16 eeprom_read(struct sis_info *info,int address)
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EEPROM_WRITE32(value | SiS900_EEPROM_CLOCK);
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EEPROM_WRITE32(value | SiS900_EEPROM_CLOCK);
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EEPROM_DELAY();
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EEPROM_DELAY();
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}
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}
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EEPROM_WRITE8(SiS900_EEPROM_SELECT);
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EEPROM_WRITE8(SiS900_EEPROM_SELECT);
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EEPROM_DELAY();
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EEPROM_DELAY();
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// read in the 16 bit data
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// read in the 16 bit data
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for (i = 16;i > 0;i--)
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for (i = 16; i > 0; i--) {
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{
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EEPROM_WRITE32(SiS900_EEPROM_SELECT);
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EEPROM_WRITE32(SiS900_EEPROM_SELECT);
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EEPROM_DELAY();
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EEPROM_DELAY();
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EEPROM_WRITE32(SiS900_EEPROM_SELECT | SiS900_EEPROM_CLOCK);
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EEPROM_WRITE32(SiS900_EEPROM_SELECT | SiS900_EEPROM_CLOCK);
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EEPROM_DELAY();
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EEPROM_DELAY();
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retval = (retval << 1) | ((EEPROM_READ32() & SiS900_EEPROM_DATA_OUT) ? 1 : 0);
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returnValue = (returnValue << 1) | ((EEPROM_READ32() & SiS900_EEPROM_DATA_OUT) ? 1 : 0);
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EEPROM_DELAY();
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EEPROM_DELAY();
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}
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}
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@@ -68,7 +70,7 @@ uint16 eeprom_read(struct sis_info *info,int address)
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EEPROM_DELAY();
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EEPROM_DELAY();
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EEPROM_WRITE32(SiS900_EEPROM_CLOCK);
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EEPROM_WRITE32(SiS900_EEPROM_CLOCK);
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return retval;
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return returnValue;
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}
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}
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@@ -76,7 +78,11 @@ uint16 eeprom_read(struct sis_info *info,int address)
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// #pragma mark -
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// #pragma mark -
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#define mdio_delay(address) read32(address)
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static inline uint32
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mdio_delay(addr_t address)
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{
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return read32(address);
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}
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static void
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static void
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@@ -93,8 +99,7 @@ mdio_reset(uint32 address)
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{
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{
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int32 i;
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int32 i;
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for (i = 32; i-- > 0;)
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for (i = 32; i-- > 0;) {
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{
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write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR);
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write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR);
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mdio_delay(address);
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mdio_delay(address);
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write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
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write32(address, SiS900_MII_MDIO | SiS900_MII_MDDIR | SiS900_MII_MDC);
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@@ -106,7 +111,7 @@ mdio_reset(uint32 address)
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void
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void
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mdio_writeToPHY(struct sis_info *info, uint16 phy, uint16 reg, uint16 value)
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mdio_writeToPHY(struct sis_info *info, uint16 phy, uint16 reg, uint16 value)
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{
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{
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uint32 address = (uint32)info->registers + SiS900_MAC_EEPROM_ACCESS;
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uint32 address = info->registers + SiS900_MAC_EEPROM_ACCESS;
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int32 cmd = MII_CMD_WRITE | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
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int32 cmd = MII_CMD_WRITE | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
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int i;
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int i;
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@@ -114,8 +119,7 @@ mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
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mdio_idle(address);
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mdio_idle(address);
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// issue the command
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// issue the command
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for (i = 16;i-- > 0;)
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for (i = 16; i-- > 0;) {
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{
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int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
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int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
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write8(address, data);
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write8(address, data);
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@@ -126,8 +130,7 @@ mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
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mdio_delay(address);
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mdio_delay(address);
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// write the value
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// write the value
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for (i = 16;i-- > 0;)
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for (i = 16; i-- > 0;) {
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{
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int32 data = SiS900_MII_MDDIR | (value & (1 << i) ? SiS900_MII_MDIO : 0);
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int32 data = SiS900_MII_MDDIR | (value & (1 << i) ? SiS900_MII_MDIO : 0);
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write32(address, data);
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write32(address, data);
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@@ -138,13 +141,13 @@ mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
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mdio_delay(address);
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mdio_delay(address);
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// clear extra bits
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// clear extra bits
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for (i = 2;i-- > 0;)
|
for (i = 2; i-- > 0;) {
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{
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write8(address, 0);
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write8(address, 0);
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mdio_delay(address);
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mdio_delay(address);
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write8(address, SiS900_MII_MDC);
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write8(address, SiS900_MII_MDC);
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mdio_delay(address);
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mdio_delay(address);
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}
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}
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write32(address, 0);
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write32(address, 0);
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}
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}
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@@ -152,7 +155,7 @@ mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 value)
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uint16
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uint16
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mdio_readFromPHY(struct sis_info *info, uint16 phy, uint16 reg)
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mdio_readFromPHY(struct sis_info *info, uint16 phy, uint16 reg)
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{
|
{
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uint32 address = (uint32)info->registers + SiS900_MAC_EEPROM_ACCESS;
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uint32 address = info->registers + SiS900_MAC_EEPROM_ACCESS;
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int32 cmd = MII_CMD_READ | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
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int32 cmd = MII_CMD_READ | (phy << MII_PHY_SHIFT) | (reg << MII_REG_SHIFT);
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uint16 value = 0;
|
uint16 value = 0;
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int i;
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int i;
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@@ -160,8 +163,7 @@ mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg)
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mdio_reset(address);
|
mdio_reset(address);
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mdio_idle(address);
|
mdio_idle(address);
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for (i = 16; i-- > 0;)
|
for (i = 16; i-- > 0;) {
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{
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int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
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int32 data = SiS900_MII_MDDIR | (cmd & (1 << i) ? SiS900_MII_MDIO : 0);
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write32(address, data);
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write32(address, data);
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@@ -171,8 +173,7 @@ mdio_readFromPHY(struct sis_info *info,uint16 phy,uint16 reg)
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}
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}
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// read the value
|
// read the value
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for (i = 16;i-- > 0;)
|
for (i = 16; i-- > 0;) {
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{
|
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write32(address, 0);
|
write32(address, 0);
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mdio_delay(address);
|
mdio_delay(address);
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value = (value << 1) | (read32(address) & SiS900_MII_MDIO ? 1 : 0);
|
value = (value << 1) | (read32(address) & SiS900_MII_MDIO ? 1 : 0);
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@@ -209,6 +210,7 @@ mdio_statusFromPHY(struct sis_info *info, uint16 phy)
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// one may not work on some PHYs (notably ICS 1893)
|
// one may not work on some PHYs (notably ICS 1893)
|
||||||
while (i++ < 2)
|
while (i++ < 2)
|
||||||
status = mdio_readFromPHY(info, phy, MII_STATUS);
|
status = mdio_readFromPHY(info, phy, MII_STATUS);
|
||||||
|
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,8 +1,15 @@
|
|||||||
|
/* MII, MDIO and EEPROM interface of SiS 900
|
||||||
|
*
|
||||||
|
* Copyright 2001-2005 pinc Software. All Rights Reserved.
|
||||||
|
* Distributed under the terms of the MIT license.
|
||||||
|
*/
|
||||||
#ifndef INTERFACE_H
|
#ifndef INTERFACE_H
|
||||||
#define INTERFACE_H
|
#define INTERFACE_H
|
||||||
|
|
||||||
|
|
||||||
#include "sis900.h"
|
#include "sis900.h"
|
||||||
|
|
||||||
|
|
||||||
extern uint16 eeprom_read(struct sis_info *info, int address);
|
extern uint16 eeprom_read(struct sis_info *info, int address);
|
||||||
|
|
||||||
extern uint16 mdio_read(struct sis_info *info, uint16 reg);
|
extern uint16 mdio_read(struct sis_info *info, uint16 reg);
|
||||||
@@ -13,5 +20,4 @@ extern void mdio_writeToPHY(struct sis_info *info,uint16 phy,uint16 reg,uint16 v
|
|||||||
extern uint16 mdio_statusFromPHY(struct sis_info *info, uint16 phy);
|
extern uint16 mdio_statusFromPHY(struct sis_info *info, uint16 phy);
|
||||||
extern uint16 mdio_status(struct sis_info *info);
|
extern uint16 mdio_status(struct sis_info *info);
|
||||||
|
|
||||||
|
|
||||||
#endif /* INTERFACE_H */
|
#endif /* INTERFACE_H */
|
||||||
|
|||||||
@@ -1,6 +1,7 @@
|
|||||||
/* sis900.c - SiS900 chip specific functions
|
/* SiS 900 chip specific functions
|
||||||
**
|
*
|
||||||
** Copyright © 2001-2004 pinc Software. All Rights Reserved.
|
* Copyright © 2001-2005 pinc Software. All Rights Reserved.
|
||||||
|
* Distributed under the terms of the MIT license.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
@@ -39,26 +40,32 @@ int32 sis900_readMode(struct sis_info *info);
|
|||||||
#define MII_HOME 0x0001
|
#define MII_HOME 0x0001
|
||||||
#define MII_LAN 0x0002
|
#define MII_LAN 0x0002
|
||||||
|
|
||||||
const static struct mii_chip_info
|
const static struct mii_chip_info {
|
||||||
{
|
|
||||||
const char *name;
|
const char *name;
|
||||||
uint16 id0, id1;
|
uint16 id0, id1;
|
||||||
uint8 types;
|
uint8 types;
|
||||||
}
|
} gMIIChips[] = {
|
||||||
gMIIChips[] = {
|
{"SiS 900 Internal MII PHY",
|
||||||
{"SiS 900 Internal MII PHY", PHY_ID0_SiS900_INTERNAL,PHY_ID1_SiS900_INTERNAL,MII_LAN},
|
PHY_ID0_SiS900_INTERNAL, PHY_ID1_SiS900_INTERNAL, MII_LAN},
|
||||||
{"SiS 7014 Physical Layer Solution",0x0016, 0xf830, MII_LAN},
|
{"SiS 7014 Physical Layer Solution",
|
||||||
{"AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, MII_LAN},
|
0x0016, 0xf830, MII_LAN},
|
||||||
{"AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, MII_HOME},
|
{"AMD 79C901 10BASE-T PHY",
|
||||||
{"ICS 1893 LAN PHY", PHY_ID0_ICS_1893,PHY_ID1_ICS_1893,MII_LAN},
|
0x0000, 0x6B70, MII_LAN},
|
||||||
{"NS 83851 PHY", 0x2000, 0x5C20, MII_LAN | MII_HOME},
|
{"AMD 79C901 HomePNA PHY",
|
||||||
{"Realtek RTL8201 PHY", PHY_ID0_REALTEK_8201,PHY_ID1_REALTEK_8201,MII_LAN},
|
0x0000, 0x6B90, MII_HOME},
|
||||||
|
{"ICS 1893 LAN PHY",
|
||||||
|
PHY_ID0_ICS_1893, PHY_ID1_ICS_1893, MII_LAN},
|
||||||
|
{"NS 83851 PHY",
|
||||||
|
0x2000, 0x5C20, MII_LAN | MII_HOME},
|
||||||
|
{"Realtek RTL8201 PHY",
|
||||||
|
PHY_ID0_REALTEK_8201, PHY_ID1_REALTEK_8201, MII_LAN},
|
||||||
{NULL, 0, 0, 0}
|
{NULL, 0, 0, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/***************************** helper functions *****************************/
|
/***************************** helper functions *****************************/
|
||||||
|
|
||||||
|
|
||||||
static uint32
|
static uint32
|
||||||
physicalAddress(volatile void *address, uint32 length)
|
physicalAddress(volatile void *address, uint32 length)
|
||||||
{
|
{
|
||||||
@@ -87,10 +94,8 @@ sis900_rxInterrupt(struct sis_info *info)
|
|||||||
HACK(spin(10000));
|
HACK(spin(10000));
|
||||||
|
|
||||||
// check for packet ownership
|
// check for packet ownership
|
||||||
for (limit = info->rxFree; limit > 0; limit--)
|
for (limit = info->rxFree; limit > 0; limit--) {
|
||||||
{
|
if (!(info->rxDescriptor[info->rxInterruptIndex].status & SiS900_DESCR_OWN)) {
|
||||||
if (!(info->rxDescriptor[info->rxInterruptIndex].status & SiS900_DESCR_OWN))
|
|
||||||
{
|
|
||||||
// if (limit == info->rxFree)
|
// if (limit == info->rxFree)
|
||||||
// {
|
// {
|
||||||
//dprintf("here!\n");
|
//dprintf("here!\n");
|
||||||
@@ -100,6 +105,7 @@ sis900_rxInterrupt(struct sis_info *info)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
//dprintf("received frame %d!\n",info->rxInterruptIndex);
|
//dprintf("received frame %d!\n",info->rxInterruptIndex);
|
||||||
|
|
||||||
releaseRxSem++;
|
releaseRxSem++;
|
||||||
info->rxInterruptIndex = (info->rxInterruptIndex + 1) & NUM_Rx_MASK;
|
info->rxInterruptIndex = (info->rxInterruptIndex + 1) & NUM_Rx_MASK;
|
||||||
info->rxFree--;
|
info->rxFree--;
|
||||||
@@ -107,10 +113,9 @@ sis900_rxInterrupt(struct sis_info *info)
|
|||||||
release_spinlock(&info->rxSpinlock);
|
release_spinlock(&info->rxSpinlock);
|
||||||
|
|
||||||
// reenable rx queue
|
// reenable rx queue
|
||||||
write32((uint32)info->registers + SiS900_MAC_COMMAND,SiS900_MAC_CMD_Rx_ENABLE);
|
write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
|
||||||
|
|
||||||
if (releaseRxSem)
|
if (releaseRxSem) {
|
||||||
{
|
|
||||||
release_sem_etc(info->rxSem, releaseRxSem, B_DO_NOT_RESCHEDULE);
|
release_sem_etc(info->rxSem, releaseRxSem, B_DO_NOT_RESCHEDULE);
|
||||||
return B_INVOKE_SCHEDULER;
|
return B_INVOKE_SCHEDULER;
|
||||||
}
|
}
|
||||||
@@ -130,26 +135,24 @@ sis900_txInterrupt(struct sis_info *info)
|
|||||||
|
|
||||||
HACK(spin(10000));
|
HACK(spin(10000));
|
||||||
|
|
||||||
//dprintf("here we are: sent = %d\n",info->txSent);
|
for (limit = info->txSent; limit > 0; limit--) {
|
||||||
for (limit = info->txSent; limit > 0; limit--)
|
|
||||||
{
|
|
||||||
status = info->txDescriptor[info->txInterruptIndex].status;
|
status = info->txDescriptor[info->txInterruptIndex].status;
|
||||||
|
|
||||||
//dprintf("txIntr: %d: mem = %lx : hardware = %lx\n",info->txInterruptIndex,
|
//dprintf("txIntr: %d: mem = %lx : hardware = %lx\n",info->txInterruptIndex,
|
||||||
// physicalAddress(&info->txDescriptor[info->txInterruptIndex],sizeof(struct buffer_desc)),
|
// physicalAddress(&info->txDescriptor[info->txInterruptIndex],sizeof(struct buffer_desc)),
|
||||||
// read32((uint32)info->registers + SiS900_MAC_Tx_DESCR));
|
// read32(info->registers + SiS900_MAC_Tx_DESCR));
|
||||||
|
|
||||||
/* Does the device generate extra interrupts? */
|
/* Does the device generate extra interrupts? */
|
||||||
if (status & SiS900_DESCR_OWN)
|
if (status & SiS900_DESCR_OWN) {
|
||||||
{
|
struct buffer_desc *descriptor = (void *)read32(info->registers + SiS900_MAC_Tx_DESCR);
|
||||||
struct buffer_desc *b = (void *)read32((uint32)info->registers + SiS900_MAC_Tx_DESCR);
|
|
||||||
int16 that;
|
int16 that;
|
||||||
for (that = 0;that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],sizeof(struct buffer_desc)) != b;that++);
|
for (that = 0;
|
||||||
if (that == NUM_Tx_DESCR)
|
that < NUM_Tx_DESCR && (void *)physicalAddress(&info->txDescriptor[that],
|
||||||
{
|
sizeof(struct buffer_desc)) != descriptor; that++) {
|
||||||
//dprintf("not in ring!\n");
|
|
||||||
that = 0;
|
|
||||||
}
|
}
|
||||||
|
if (that == NUM_Tx_DESCR)
|
||||||
|
that = 0;
|
||||||
|
|
||||||
//dprintf("tx busy %d: %lx (hardware status %d = %lx)!\n",info->txInterruptIndex,status,that,info->txDescriptor[that].status);
|
//dprintf("tx busy %d: %lx (hardware status %d = %lx)!\n",info->txInterruptIndex,status,that,info->txDescriptor[that].status);
|
||||||
// if (limit == info->txSent)
|
// if (limit == info->txSent)
|
||||||
// {
|
// {
|
||||||
@@ -160,11 +163,10 @@ sis900_txInterrupt(struct sis_info *info)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
//dprintf("tx %d!\n",info->txInterruptIndex);
|
if (status & (SiS900_DESCR_Tx_ABORT | SiS900_DESCR_Tx_UNDERRUN
|
||||||
if (status & (SiS900_DESCR_Tx_ABORT | SiS900_DESCR_Tx_UNDERRUN |
|
| SiS900_DESCR_Tx_OOW_COLLISION)) {
|
||||||
SiS900_DESCR_Tx_OOW_COLLISION))
|
|
||||||
dprintf("tx error: %lx\n", status);
|
dprintf("tx error: %lx\n", status);
|
||||||
else
|
} else
|
||||||
info->txDescriptor[info->txInterruptIndex].status = 0;
|
info->txDescriptor[info->txInterruptIndex].status = 0;
|
||||||
|
|
||||||
releaseTxSem++; /* this many buffers are free */
|
releaseTxSem++; /* this many buffers are free */
|
||||||
@@ -176,11 +178,7 @@ sis900_txInterrupt(struct sis_info *info)
|
|||||||
}
|
}
|
||||||
release_spinlock(&info->txSpinlock);
|
release_spinlock(&info->txSpinlock);
|
||||||
|
|
||||||
if (releaseTxSem)
|
if (releaseTxSem) {
|
||||||
{
|
|
||||||
// sem_info semInfo;
|
|
||||||
|
|
||||||
// get_sem_info(info->txSem,&semInfo);
|
|
||||||
release_sem_etc(info->txSem, releaseTxSem, B_DO_NOT_RESCHEDULE);
|
release_sem_etc(info->txSem, releaseTxSem, B_DO_NOT_RESCHEDULE);
|
||||||
return B_INVOKE_SCHEDULER;
|
return B_INVOKE_SCHEDULER;
|
||||||
}
|
}
|
||||||
@@ -203,7 +201,7 @@ sis900_interrupt(void *data)
|
|||||||
|
|
||||||
while (worklimit-- > 0) {
|
while (worklimit-- > 0) {
|
||||||
// reading the interrupt status register clears all interrupts
|
// reading the interrupt status register clears all interrupts
|
||||||
intr = read32((uint32)info->registers + SiS900_MAC_INTR_STATUS);
|
intr = read32(info->registers + SiS900_MAC_INTR_STATUS);
|
||||||
if (!intr)
|
if (!intr)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -212,12 +210,12 @@ sis900_interrupt(void *data)
|
|||||||
lastIntr[intrCounter] = intr;
|
lastIntr[intrCounter] = intr;
|
||||||
|
|
||||||
// wake-up event interrupt
|
// wake-up event interrupt
|
||||||
if (intr & SiS900_INTR_WAKEUP_EVENT)
|
if (intr & SiS900_INTR_WAKEUP_EVENT) {
|
||||||
{
|
TRACE(("wake-up event received: %ld\n",
|
||||||
TRACE(("wake-up event received: %ld\n", read32((uint32)info->registers + SiS900_MAC_WAKEUP_EVENT)));
|
read32(info->registers + SiS900_MAC_WAKEUP_EVENT)));
|
||||||
|
|
||||||
// clear PM event register
|
// clear PM event register
|
||||||
write32((uint32)info->registers + SiS900_MAC_WAKEUP_EVENT,
|
write32(info->registers + SiS900_MAC_WAKEUP_EVENT,
|
||||||
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
|
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
|
||||||
handled = B_HANDLED_INTERRUPT;
|
handled = B_HANDLED_INTERRUPT;
|
||||||
}
|
}
|
||||||
@@ -243,28 +241,28 @@ sis900_interrupt(void *data)
|
|||||||
void
|
void
|
||||||
sis900_disableInterrupts(struct sis_info *info)
|
sis900_disableInterrupts(struct sis_info *info)
|
||||||
{
|
{
|
||||||
write32((uint32)info->registers + SiS900_MAC_INTR_MASK,0);
|
write32(info->registers + SiS900_MAC_INTR_MASK, 0);
|
||||||
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,0);
|
write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void
|
void
|
||||||
sis900_enableInterrupts(struct sis_info *info)
|
sis900_enableInterrupts(struct sis_info *info)
|
||||||
{
|
{
|
||||||
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,0);
|
write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
|
||||||
|
|
||||||
// enable link detection
|
// enable link detection
|
||||||
write32((uint32)info->registers + SiS900_MAC_WAKEUP_CONTROL,
|
write32(info->registers + SiS900_MAC_WAKEUP_CONTROL,
|
||||||
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
|
SiS900_WAKEUP_LINK_ON | SiS900_WAKEUP_LINK_LOSS);
|
||||||
|
|
||||||
// set interrupt mask
|
// set interrupt mask
|
||||||
write32((uint32)info->registers + SiS900_MAC_INTR_MASK,
|
write32(info->registers + SiS900_MAC_INTR_MASK,
|
||||||
//SiS900_INTR_WAKEUP_EVENT |
|
//SiS900_INTR_WAKEUP_EVENT |
|
||||||
SiS900_INTR_Tx_UNDERRUN | SiS900_INTR_Tx_ERROR | SiS900_INTR_Tx_IDLE | SiS900_INTR_Tx_OK |
|
SiS900_INTR_Tx_UNDERRUN | SiS900_INTR_Tx_ERROR | SiS900_INTR_Tx_IDLE | SiS900_INTR_Tx_OK |
|
||||||
SiS900_INTR_Rx_STATUS_OVERRUN | SiS900_INTR_Rx_OVERRUN |
|
SiS900_INTR_Rx_STATUS_OVERRUN | SiS900_INTR_Rx_OVERRUN |
|
||||||
SiS900_INTR_Rx_ERROR | SiS900_INTR_Rx_OK);
|
SiS900_INTR_Rx_ERROR | SiS900_INTR_Rx_OK);
|
||||||
|
|
||||||
write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE,1);
|
write32(info->registers + SiS900_MAC_INTR_ENABLE,1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -340,7 +338,7 @@ sis900_initPHYs(struct sis_info *info)
|
|||||||
for (phy = 0; phy < 32; phy++) {
|
for (phy = 0; phy < 32; phy++) {
|
||||||
struct mii_phy *mii;
|
struct mii_phy *mii;
|
||||||
uint16 status;
|
uint16 status;
|
||||||
int i;
|
int32 i;
|
||||||
|
|
||||||
status = mdio_statusFromPHY(info, phy);
|
status = mdio_statusFromPHY(info, phy);
|
||||||
if (status == 0xffff || status == 0x0000)
|
if (status == 0xffff || status == 0x0000)
|
||||||
@@ -359,7 +357,8 @@ sis900_initPHYs(struct sis_info *info)
|
|||||||
info->firstPHY = mii;
|
info->firstPHY = mii;
|
||||||
|
|
||||||
for (i = 0; gMIIChips[i].name; i++) {
|
for (i = 0; gMIIChips[i].name; i++) {
|
||||||
if (gMIIChips[i].id0 != mii->id0 || gMIIChips[i].id1 != (mii->id1 & 0xfff0))
|
if (gMIIChips[i].id0 != mii->id0
|
||||||
|
|| gMIIChips[i].id1 != (mii->id1 & 0xfff0))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
dprintf("Found MII PHY: %s\n", gMIIChips[i].name);
|
dprintf("Found MII PHY: %s\n", gMIIChips[i].name);
|
||||||
@@ -427,7 +426,7 @@ sis900_selectPHY(struct sis_info *info)
|
|||||||
void
|
void
|
||||||
sis900_setMode(struct sis_info *info, int32 mode)
|
sis900_setMode(struct sis_info *info, int32 mode)
|
||||||
{
|
{
|
||||||
uint32 address = (uint32)info->registers + SiS900_MAC_CONFIG;
|
uint32 address = info->registers + SiS900_MAC_CONFIG;
|
||||||
uint32 txFlags = SiS900_Tx_AUTO_PADDING | SiS900_Tx_FILL_THRES;
|
uint32 txFlags = SiS900_Tx_AUTO_PADDING | SiS900_Tx_FILL_THRES;
|
||||||
uint32 rxFlags = 0;
|
uint32 rxFlags = 0;
|
||||||
int32 speed = mode & LINK_SPEED_MASK;
|
int32 speed = mode & LINK_SPEED_MASK;
|
||||||
@@ -455,8 +454,8 @@ sis900_setMode(struct sis_info *info, int32 mode)
|
|||||||
rxFlags |= SiS900_Rx_ACCEPT_Tx_PACKETS;
|
rxFlags |= SiS900_Rx_ACCEPT_Tx_PACKETS;
|
||||||
}
|
}
|
||||||
|
|
||||||
write32((uint32)info->registers + SiS900_MAC_Tx_CONFIG, txFlags);
|
write32(info->registers + SiS900_MAC_Tx_CONFIG, txFlags);
|
||||||
write32((uint32)info->registers + SiS900_MAC_Rx_CONFIG, rxFlags);
|
write32(info->registers + SiS900_MAC_Rx_CONFIG, rxFlags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -536,7 +535,7 @@ sis900_autoNegotiate(struct sis_info *info)
|
|||||||
void
|
void
|
||||||
sis900_checkMode(struct sis_info *info)
|
sis900_checkMode(struct sis_info *info)
|
||||||
{
|
{
|
||||||
uint32 address = (uint32)info->registers + SiS900_MAC_CONFIG;
|
uint32 address = info->registers + SiS900_MAC_CONFIG;
|
||||||
|
|
||||||
if (info->fixedMode != 0) {
|
if (info->fixedMode != 0) {
|
||||||
TRACE((DEVICE_NAME ": link mode set via settings\n"));
|
TRACE((DEVICE_NAME ": link mode set via settings\n"));
|
||||||
@@ -575,7 +574,7 @@ sis900_getMACAddress(struct sis_info *info)
|
|||||||
if (info->pciInfo->revision >= SiS900_REVISION_SiS96x) {
|
if (info->pciInfo->revision >= SiS900_REVISION_SiS96x) {
|
||||||
// SiS 962 & 963 are using a different method to access the EEPROM
|
// SiS 962 & 963 are using a different method to access the EEPROM
|
||||||
// than the standard SiS 630
|
// than the standard SiS 630
|
||||||
long eepromAccess = (long)info->registers + SiS900_MAC_EEPROM_ACCESS;
|
addr_t eepromAccess = info->registers + SiS900_MAC_EEPROM_ACCESS;
|
||||||
uint32 tries = 0;
|
uint32 tries = 0;
|
||||||
|
|
||||||
write32(eepromAccess, SiS96x_EEPROM_CMD_REQ);
|
write32(eepromAccess, SiS96x_EEPROM_CMD_REQ);
|
||||||
@@ -608,10 +607,10 @@ sis900_getMACAddress(struct sis_info *info)
|
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int32 index;
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int32 index;
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for (index = 0; pci->get_nth_pci_info(index, &isa) == B_OK; index++) {
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for (index = 0; pci->get_nth_pci_info(index, &isa) == B_OK; index++) {
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if (isa.vendor_id == VENDOR_ID_SiS && isa.device_id == DEVICE_ID_SiS_ISA_BRIDGE)
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if (isa.vendor_id == VENDOR_ID_SiS
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{
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&& isa.device_id == DEVICE_ID_SiS_ISA_BRIDGE) {
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uint8 reg,i;
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uint8 reg,i;
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uint32 registers = isa.u.h0.base_registers[0];
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addr_t registers = isa.u.h0.base_registers[0];
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reg = pci->read_pci_config(isa.bus,isa.device,isa.function,0x48,1);
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reg = pci->read_pci_config(isa.bus,isa.device,isa.function,0x48,1);
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pci->write_pci_config(isa.bus,isa.device,isa.function,0x48,1,reg | 0x40);
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pci->write_pci_config(isa.bus,isa.device,isa.function,0x48,1,reg | 0x40);
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@@ -656,24 +655,21 @@ sis900_getMACAddress(struct sis_info *info)
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status_t
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status_t
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sis900_reset(struct sis_info *info)
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sis900_reset(struct sis_info *info)
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{
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{
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uint32 address = (uint32)info->registers + SiS900_MAC_COMMAND;
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addr_t address = info->registers + SiS900_MAC_COMMAND;
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int16 tries = 1000;
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int16 tries = 1000;
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TRACE(("sis900 reset\n"));
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TRACE(("sis900 reset\n"));
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//write32((uint32)info->registers + SiS900_MAC_INTR_MASK, 0);
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//write32((uint32)info->registers + SiS900_MAC_INTR_ENABLE, 0);
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write32(address, SiS900_MAC_CMD_RESET);
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write32(address, SiS900_MAC_CMD_RESET);
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write32((uint32)info->registers + SiS900_MAC_Rx_FILTER_CONTROL, SiS900_RxF_ENABLE |
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write32(info->registers + SiS900_MAC_Rx_FILTER_CONTROL, SiS900_RxF_ENABLE |
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SiS900_RxF_ACCEPT_ALL_BROADCAST | SiS900_RxF_ACCEPT_ALL_MULTICAST);
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SiS900_RxF_ACCEPT_ALL_BROADCAST | SiS900_RxF_ACCEPT_ALL_MULTICAST);
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// wait until the chip leaves reset state
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// wait until the chip leaves reset state
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while ((read32(address) & SiS900_MAC_CMD_RESET) && tries-- > 0)
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while ((read32(address) & SiS900_MAC_CMD_RESET) && tries-- > 0)
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snooze(2);
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snooze(2);
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write32((uint32)info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
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return B_OK;
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return B_OK;
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}
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}
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@@ -682,7 +678,7 @@ sis900_reset(struct sis_info *info)
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void
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void
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sis900_setPromiscuous(struct sis_info *info, bool on)
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sis900_setPromiscuous(struct sis_info *info, bool on)
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{
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{
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long filterControl = (long)info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
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addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
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int32 filter = read32(filterControl);
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int32 filter = read32(filterControl);
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// accept all incoming packets (or not)
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// accept all incoming packets (or not)
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@@ -697,17 +693,18 @@ sis900_setPromiscuous(struct sis_info *info, bool on)
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void
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void
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sis900_setRxFilter(struct sis_info *info)
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sis900_setRxFilter(struct sis_info *info)
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{
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{
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||||||
long filterControl = (long)info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
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addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
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long filterData = (long)info->registers + SiS900_MAC_Rx_FILTER_DATA;
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addr_t filterData = info->registers + SiS900_MAC_Rx_FILTER_DATA;
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int i;
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int32 i;
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// set MAC address as receive filter
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// set MAC address as receive filter
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for (i = 0; i < 3; i++) {
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for (i = 0; i < 3; i++) {
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||||||
write32(filterControl, i << SiS900_Rx_FILTER_ADDRESS_SHIFT);
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write32(filterControl, i << SiS900_Rx_FILTER_ADDRESS_SHIFT);
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write32(filterData, info->address.ebyte[i*2] | (info->address.ebyte[i*2 + 1] << 8));
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write32(filterData, info->address.ebyte[i*2] | (info->address.ebyte[i*2 + 1] << 8));
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||||||
}
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}
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||||||
write32(filterControl, SiS900_RxF_ENABLE |
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write32(filterControl, SiS900_RxF_ENABLE
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||||||
SiS900_RxF_ACCEPT_ALL_BROADCAST | SiS900_RxF_ACCEPT_ALL_MULTICAST /*| SiS900_RxF_ACCEPT_ALL_ADDRESSES*/);
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| SiS900_RxF_ACCEPT_ALL_BROADCAST
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||||||
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| SiS900_RxF_ACCEPT_ALL_MULTICAST /*| SiS900_RxF_ACCEPT_ALL_ADDRESSES*/);
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}
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}
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@@ -725,10 +722,11 @@ sis900_createRings(struct sis_info *info)
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uint16 i;
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uint16 i;
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||||||
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||||||
// create transmit buffer area
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// create transmit buffer area
|
||||||
if ((info->txArea = create_area("sis900 tx buffer", (void **)&info->txBuffer[0],
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info->txArea = create_area("sis900 tx buffer", (void **)&info->txBuffer[0],
|
||||||
B_ANY_KERNEL_ADDRESS,
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B_ANY_KERNEL_ADDRESS,
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||||||
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Tx_DESCR),
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ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Tx_DESCR),
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||||||
B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA)) < B_OK)
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B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
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||||||
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if (info->txArea < B_OK)
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||||||
return info->txArea;
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return info->txArea;
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||||||
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||||||
// initialize transmit buffer descriptors
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// initialize transmit buffer descriptors
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||||||
@@ -747,11 +745,11 @@ sis900_createRings(struct sis_info *info)
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|||||||
}
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}
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||||||
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||||||
// create receive buffer area
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// create receive buffer area
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||||||
if ((info->rxArea = create_area("sis900 rx buffer", (void **)&info->rxBuffer[0],
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info->rxArea = create_area("sis900 rx buffer", (void **)&info->rxBuffer[0],
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||||||
B_ANY_KERNEL_ADDRESS,
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B_ANY_KERNEL_ADDRESS,
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||||||
ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Rx_DESCR),
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ROUND_TO_PAGE_SIZE(BUFFER_SIZE * NUM_Rx_DESCR),
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B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA)) < B_OK)
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B_FULL_LOCK, B_READ_AREA | B_WRITE_AREA);
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||||||
{
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if (info->rxArea < B_OK) {
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||||||
delete_area(info->txArea);
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delete_area(info->txArea);
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||||||
return info->rxArea;
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return info->rxArea;
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||||||
}
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}
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||||||
@@ -763,13 +761,16 @@ sis900_createRings(struct sis_info *info)
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|||||||
for (i = 0; i < NUM_Rx_DESCR; i++) {
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for (i = 0; i < NUM_Rx_DESCR; i++) {
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||||||
info->rxDescriptor[i].status = MAX_FRAME_SIZE;
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info->rxDescriptor[i].status = MAX_FRAME_SIZE;
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||||||
info->rxDescriptor[i].buffer = physicalAddress(info->rxBuffer[i], BUFFER_SIZE);
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info->rxDescriptor[i].buffer = physicalAddress(info->rxBuffer[i], BUFFER_SIZE);
|
||||||
info->rxDescriptor[i].link = physicalAddress(&info->rxDescriptor[(i + 1) & NUM_Rx_MASK],sizeof(struct buffer_desc));
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info->rxDescriptor[i].link = physicalAddress(&info->rxDescriptor[(i + 1) & NUM_Rx_MASK],
|
||||||
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sizeof(struct buffer_desc));
|
||||||
}
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}
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||||||
info->rxFree = NUM_Rx_DESCR;
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info->rxFree = NUM_Rx_DESCR;
|
||||||
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||||||
// set descriptor pointer registers
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// set descriptor pointer registers
|
||||||
write32((uint32)info->registers + SiS900_MAC_Tx_DESCR,physicalAddress(&info->txDescriptor[0],sizeof(struct buffer_desc)));
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write32(info->registers + SiS900_MAC_Tx_DESCR,
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||||||
write32((uint32)info->registers + SiS900_MAC_Rx_DESCR,physicalAddress(&info->rxDescriptor[0],sizeof(struct buffer_desc)));
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physicalAddress(&info->txDescriptor[0], sizeof(struct buffer_desc)));
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||||||
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write32(info->registers + SiS900_MAC_Rx_DESCR,
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||||||
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physicalAddress(&info->rxDescriptor[0], sizeof(struct buffer_desc)));
|
||||||
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||||||
return B_OK;
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return B_OK;
|
||||||
}
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}
|
||||||
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|||||||
@@ -1,13 +1,15 @@
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|||||||
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/* SiS 900 driver/chip specific definitions
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||||||
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*
|
||||||
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* Copyright © 2001-2005 pinc Software. All Rights Reserved.
|
||||||
|
* Distributed under the terms of the MIT license.
|
||||||
|
*/
|
||||||
#ifndef SIS900_H
|
#ifndef SIS900_H
|
||||||
#define SIS900_H
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#define SIS900_H
|
||||||
/* sis900.h - SiS 900 driver/chip specific definitions
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|
||||||
**
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|
||||||
** Copyright © 2001-2003 pinc Software. All Rights Reserved.
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|
||||||
*/
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|
||||||
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|
||||||
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|
||||||
#include "ether_driver.h"
|
#include "ether_driver.h"
|
||||||
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|
||||||
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|
||||||
#define VENDOR_ID_SiS 0x1039
|
#define VENDOR_ID_SiS 0x1039
|
||||||
#define DEVICE_ID_SiS900 0x900
|
#define DEVICE_ID_SiS900 0x900
|
||||||
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|
||||||
@@ -87,7 +89,7 @@ struct sis_info {
|
|||||||
uint32 id;
|
uint32 id;
|
||||||
spinlock lock;
|
spinlock lock;
|
||||||
pci_info *pciInfo;
|
pci_info *pciInfo;
|
||||||
volatile unsigned char *registers;
|
volatile addr_t registers;
|
||||||
ether_address_t address;
|
ether_address_t address;
|
||||||
volatile int32 blockFlag;
|
volatile int32 blockFlag;
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user