Upgrade to version 4.1 of radeon driver.
Includes some common routines which may be used by other drivers. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8405 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -31,37 +31,64 @@ enum {
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RADEON_DEVICE_NAME,
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RADEON_GET_LOG_SIZE,
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RADEON_GET_LOG_DATA,
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RADEON_ALLOC_LOCAL_MEM,
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RADEON_FREE_LOCAL_MEM,
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RADEON_ALLOC_MEM,
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RADEON_FREE_MEM,
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RADEON_SET_I2C_SIGNALS,
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RADEON_GET_I2C_SIGNALS
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RADEON_WAITFORIDLE,
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RADEON_RESETENGINE,
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RADEON_VIPREAD,
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RADEON_VIPWRITE,
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RADEON_FINDVIPDEVICE,
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RADEON_WAIT_FOR_CAP_IRQ,
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RADEON_DMACOPY,
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};
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// number of indirect buffers
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// see CP.c for this magic number
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#define NUM_INDIRECT_BUFFERS 253
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// size of an indirect buffer in dwords;
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// as hardware wants buffers to be 4k aligned and as we store all
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// buffers in one chunk, the size per buffer in bytes must be a multiple of 4k
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#define INDIRECT_BUFFER_SIZE (4096/4)
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// type of memory
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typedef enum {
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mt_local, // local graphics memory
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mt_PCI, // PCI memory (read: fully cachable)
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mt_AGP, // AGP memory (read: not cachable; currently not supported)
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mt_nonlocal, // non-local graphics memory (alias to one of the
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// previously defined types, see si->nonlocal_type)
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mt_last = mt_nonlocal
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} memory_type_e;
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// list of multi-monitor modes
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typedef enum {
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mm_none, // use one display only
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mm_combine, // combine displays to larger workspace
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mm_clone, // clone workspace, all displays show the
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// same but have independant timing
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mm_mirror // mirror ports (as used by Laptop) - not implemented yet
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mm_mirror // mirror heads (as used by Laptop) - not implemented yet
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} multi_mode_e;
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// type of monitor connected
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// displays devices;
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// this must be a bit field as multiple devices may be connected to one CRTC
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typedef enum {
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dt_none,
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dt_crt_1, // CRT on primary port (i.e. via DVI2CRT adapter)
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dt_crt_2, // CRT on secondary port (i.e. standard CRT connector)
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dt_lvds, // laptop flap panel
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dt_dvi_1, // DVI on primary port (i.e. standard DVI connector)
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dd_none = 0,
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dd_tv_crt = 1, // CRT on TV-DAC, i.e. on DVI port
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dd_crt = 2, // CRT on CRT-DAC, i.e. VGA port
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dd_lvds = 4, // laptop flap panel
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dd_dvi = 8, // DVI on primary port (i.e. standard DVI connector)
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dd_ctv = 16, // composite TV on TV-DAC
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dd_stv = 32, // S-Video out on TV-DAC
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// the following connectors/devices are not supported
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dt_dvi_2, // DVI on secondary port (only provided by few models)
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dt_ctv, // composite TV
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dt_stv // S-Video out
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} display_type_e;
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dd_dvi_ext = 64 // external DVI (only provided by few models)
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} display_device_e;
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// type of ASIC
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@@ -69,12 +96,17 @@ typedef enum {
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rt_r100, // original Radeon
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rt_ve, // original VE version
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rt_m6, // original mobile Radeon
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rt_rs100, // IGP 320M
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rt_rv200, // Radeon 7500
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rt_m7, // mobile Radeon 7500
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rt_rs200, // IGP 330M/340M/350M
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rt_r200, // Radeon 8500/9100
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rt_rv250, // Radeon 9000
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rt_rv280, // Radeon 9200
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rt_m9, // mobile Radeon 9000
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// from here on, r300 and up must be located as ATI modified the PLL
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// with r300 and the code only tests for >= rt_r300
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rt_r300, // Radeon 9700
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rt_r300_4p, // Radeon 9500
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rt_rv350, // Radeon 9600
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@@ -84,6 +116,26 @@ typedef enum {
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} radeon_type;
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// TV standard
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typedef enum {
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ts_ntsc,
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ts_pal,
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ts_palm,
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ts_palcn,
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ts_scart_pal,
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ts_pal60
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} tv_standard;
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// type of TV-Chip
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typedef enum {
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tc_none,
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tc_external_rt1, // external Rage Theatre
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tc_internal_rt1, // internal version 1
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tc_internal_rt2, // internal version 2
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} tv_chip_type;
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// info about cursor
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typedef struct {
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uint8* data; // pointer to framebuffer containing cursor image
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@@ -99,6 +151,131 @@ typedef struct {
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} cursor_info;
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// head as seen by accelerant
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typedef struct {
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int physical_head; // idx of physical head
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uint32 rel_x, rel_y; // relative position in multi-monitor mode
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} virtual_head;
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// info about flat panel connected to LVDS or DVI port
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typedef struct {
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uint panel_pwr_delay;
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uint panel_xres, panel_yres;
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uint h_blank, h_over_plus, h_sync_width;
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uint v_blank, v_over_plus, v_sync_width;
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uint dot_clock; // in kHz (this is BeOS like, ATI uses 10 kHz steps!)
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bool is_fp2; // true, if second flat panel
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// display_type_e disp_type;
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uint64 h_ratio; // current stretch ratio, needed for overlays
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uint64 v_ratio; // (mode_res/native_res; 32.32)
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} fp_info;
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// physical head
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typedef struct {
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bool is_crtc2; // true, if connected to crtc2
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display_device_e active_displays; // currently driven displays
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display_device_e chosen_displays; // displays to be driven by next mode switch
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sem_id vblank; // vertical blank interrupt semaphore
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bool cursor_on_screen; // cursor is visible on this head
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display_mode mode; // display mode of this head
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int8 flatpanel_port; // linked flat panel port (-1 if none)
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} physical_head;
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// info about PLLs on graphics card as retrieved from BIOS
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// all values are in 10kHz
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typedef struct {
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uint32 max_pll_freq; // maximum PLL output frequency
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uint32 min_pll_freq; // minimum PLL output frequency
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uint32 xclk; // core frequency
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uint32 ref_div; // default reference divider
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uint32 ref_freq; // PLL reference frequency
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} general_pll_info;
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// mapping of pll divider code to actual divider value
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typedef struct {
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uint8 divider; // divider
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uint8 code; // code as used in register
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} pll_divider_map;
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// info about a PLL
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// all values are in 10 kHz
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typedef struct {
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pll_divider_map *post_divs; // list of possible post dividers
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pll_divider_map *extra_post_divs; // list of possible extra post dividers
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uint32 ref_freq; // reference frequency
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uint32 vco_min, vco_max; // VCO frequency range
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uint32 min_ref_div, max_ref_div; // reference divider range
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uint32 pll_in_min, pll_in_max; // PLL input frequency range
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uint32 extra_feedback_div; // hardwired divider before feedback divider
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uint32 min_feedback_div, max_feedback_div; // feedback divider range
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uint32 best_vco; // preferred VCO frequency (0 for don't care)
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} pll_info;
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// PLL divider values
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typedef struct {
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uint32 post_code; // code for post divider
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uint32 post; // value of post divider
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uint32 extra_post_code; // code for extra post divider
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uint32 extra_post; // value of extra post divider
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uint32 ref; // reference divider
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uint32 feedback; // feedback divider
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uint32 freq; // resulting frequency
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} pll_dividers;
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// TV-Out parameters
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typedef struct {
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uint16 y_accum_init;
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uint16 uv_accum_init;
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uint16 uv_inc;
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uint16 h_inc;
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uint32 tv_clocks_to_active;
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uint16 f_restart;
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uint16 v_restart;
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uint16 h_restart;
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bool mode888;
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uint16 y_saw_tooth_slope;
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uint16 y_saw_tooth_amp;
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uint16 y_rise_accum_init;
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uint16 y_fall_accum_init;
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bool y_coeff_enable;
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uint8 y_coeff_value;
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pll_dividers tv_dividers;
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pll_dividers crt_dividers;
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} tv_params;
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// TV-timing
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typedef struct {
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uint32 freq; // TV sub carrier frequency x12
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uint16 h_total;
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uint16 h_sync_len;
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uint16 h_genclk_delay;
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uint16 h_setup_delay;
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uint16 h_active_delay;
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uint16 h_active_len;
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uint16 v_total;
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uint16 v_active_lines;
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uint16 v_field_total;
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uint16 v_fields;
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uint16 f_total;
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uint16 frame_size_adjust;
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uint32 scale;
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} tv_timing;
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// list of register content (used for mode changes)
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typedef struct {
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// CRTC regs
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@@ -111,23 +288,32 @@ typedef struct {
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uint32 crtc_ext_cntl;
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uint32 crtc_offset_cntl;
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// Flat panel regs
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// many of them aren't touched by us, so they aren't stored here
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uint32 fp_gen_cntl;
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uint32 fp_horz_stretch;
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uint32 fp_panel_cntl;
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// RMX registers
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uint32 fp_horz_stretch;
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uint32 fp_vert_stretch;
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// Flat panel regs
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uint32 fp_gen_cntl;
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uint32 fp_panel_cntl;
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uint32 lvds_gen_cntl;
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uint32 fp_h_sync_strt_wid;
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uint32 fp_v_sync_strt_wid;
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uint32 fp2_gen_cntl;
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uint32 fp2_h_sync_strt_wid;
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uint32 fp2_v_sync_strt_wid;
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// DAC regs
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uint32 dac_cntl2;
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uint32 dac_cntl;
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//uint32 dac2_cntl;
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uint32 disp_hw_debug;
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// PLL regs
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uint32 ppll_div_3;
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uint32 ppll_ref_div;
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uint32 htotal_cntl;
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// pure information
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uint32 dot_clock_freq; // in 10 kHz
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uint32 pll_output_freq;// in 10 kHz
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int feedback_div;
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@@ -136,54 +322,45 @@ typedef struct {
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// Common regs
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uint32 surface_cntl;
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uint32 disp_output_cntl;
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// TV-Out registers
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uint32 tv_ftotal;
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uint32 tv_vscaler_cntl1;
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uint32 tv_y_saw_tooth_cntl;
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uint32 tv_y_fall_cntl;
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uint32 tv_y_rise_cntl;
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uint32 tv_vscaler_cntl2;
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uint32 tv_hrestart;
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uint32 tv_vrestart;
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uint32 tv_frestart;
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uint32 tv_tv_pll_cntl;
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uint32 tv_crt_pll_cntl;
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uint32 tv_clock_sel_cntl;
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uint32 tv_clkout_cntl;
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uint32 tv_htotal;
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uint32 tv_hsize;
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uint32 tv_hdisp;
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uint32 tv_hstart;
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uint32 tv_vtotal;
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uint32 tv_vdisp;
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uint32 tv_sync_size;
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uint32 tv_timing_cntl;
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uint32 tv_dac_cntl; // affects CRT connected to TV-DAC
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uint32 tv_modulator_cntl1;
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uint32 tv_modulator_cntl2;
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uint32 tv_data_delay_a;
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uint32 tv_data_delay_b;
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uint32 tv_frame_lock_cntl;
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uint32 tv_pll_cntl1;
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uint32 tv_rgb_cntl;
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uint32 tv_pre_dac_mux_cntl;
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uint32 tv_master_cntl;
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uint32 tv_uv_adr;
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uint32 tv_pll_fine_cntl;
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} port_regs;
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// port as seen by accelerant
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typedef struct {
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bool is_crtc2;
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int physical_port; // idx of physical port
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uint32 rel_x, rel_y; // relative position in multi-monitor mode
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bool cursor_on_screen; // cursor is visible on this port
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display_mode mode; // display mode of this port
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} virtual_port;
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// physical port
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typedef struct {
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display_type_e disp_type;
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sem_id vblank; // vertical blank interrupt semaphore
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} physical_port;
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// info about flat panel connected to port
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typedef struct {
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uint panel_pwr_delay;
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uint panel_xres, panel_yres;
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uint h_blank, h_over_plus, h_sync_width;
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uint v_blank, v_over_plus, v_sync_width;
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uint dot_clock; // in kHz (this is BeOS like, ATI uses 10 kHz steps!)
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display_type_e disp_type;
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uint64 h_ratio; // current stretch ratio, needed for overlays
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uint64 v_ratio; // (mode_res/native_res; 16.16)
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} fp_info;
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// info about PLL on graphics card
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typedef struct {
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uint32 max_pll_freq;
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uint32 min_pll_freq;
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uint32 xclk;
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uint32 ref_div;
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uint32 ref_freq;
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} pll_info;
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// one overlay buffer
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typedef struct overlay_buffer_node {
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struct overlay_buffer_node *next, *prev;
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uint32 mem_handle;
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@@ -193,6 +370,8 @@ typedef struct overlay_buffer_node {
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overlay_buffer buffer;
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} overlay_buffer_node;
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// info about active overlay
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typedef struct {
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overlay_token ot;
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overlay_buffer ob;
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@@ -201,22 +380,24 @@ typedef struct {
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uint16 h_display_start;
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uint16 v_display_start;
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overlay_buffer_node *on;
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int8 port; // physical port where the overlay is shown on
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overlay_buffer_node *on; // current buffer
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overlay_buffer_node *prev_on; // previous buffer (for temporal deinterlace, currently unused)
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int8 head; // physical head where the overlay is shown on
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uint32 rel_offset; // offset of overlay source due to clipping
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} overlay_info;
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// each accelerator gets one "virtual card", i.e. you
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// can have independant accelerators for each port
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// each accelerant gets one "virtual card", i.e. you
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// can have independant accelerants for each head
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// (this is an ongoing project ;)
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typedef struct {
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uint32 id; // identifier used to know which card the 2D accelerator
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// is prepared for (we use area_id of this structure)
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virtual_port ports[2];
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uint8 num_ports;
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virtual_head heads[2]; // heads assigned to virtual card
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uint8 num_heads; // number of heads assigned to virtual card
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int8 independant_ports; // number of ports to be programmed independantly
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int8 different_ports; // number of ports showing different parts of framebuffer
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int8 independant_heads; // number of heads to be programmed independantly
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int8 different_heads; // number of heads showing different parts of framebuffer
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bool scroll; // scrolling in virtual area enabled
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uint32 datatype; // Radeon code for pixel format
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@@ -231,86 +412,156 @@ typedef struct {
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multi_mode_e wanted_multi_mode; // multi monitor mode as requested by user
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bool swapDisplays; // true to swap monitors
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bool swap_displays; // true to swap monitors
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frame_buffer_config fbc; // data for direct frame buffer access
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display_mode mode; // offical mode with multi-monitor bits set
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overlay_buffer_node *overlay_buffers; // list of allocated overlay buffers
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//int8 whished_overlay_port; // port where users whishes the overlay to be
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//int8 whished_overlay_head; // head where users whishes the overlay to be
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bool uses_overlay; // true if this virtual card owns overlay
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int state_buffer_idx;
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int state_buffer_size;
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} virtual_card;
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// status of overlay
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typedef struct {
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vint32 inuse; // one, if someone allocated overlay port
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vint32 inuse; // one, if someone allocated overlay head
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// (this doesn't necessarily mean that an overlay is shown)
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uint32 token; // arbitrarily chosen token to identify overlay owner
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// (increased by 1 whenever there is a new owner)
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uint32 auto_flip_reg; // content of auto_flip_reg
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} overlay_mgr_info;
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// info about indirect CP buffer
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typedef struct {
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int next; // next used/free buffer (-1 for EOL)
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int32 send_tag; // tag assigned when buffer was submitted
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} indirect_buffer;
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// info about command processor (CP) state
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typedef struct {
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benaphore lock; // lock to be acquired when talking to CP or
|
||||
// when accesing this structure
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||||
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||||
// ring buffer (in non-local memory)
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struct {
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||||
uint32 mem_offset; // offset in non-local memory
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uint32 vm_base; // base of ring buffer as seen by graphics card
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||||
uint32 tail, tail_mask; // next write position in dwords; mask for wrap-arounds
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uint32 size; // size in dwords
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||||
//uint32 head_offset; // offset for automatically updates head in DMA buffer
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||||
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||||
//uint32 start_offset;
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memory_type_e mem_type;
|
||||
//uint32 *start; // pointer to ring buffer
|
||||
//vuint32 *head; // pointer to automatically updated read position
|
||||
|
||||
uint32 space; // known space in ring buffer
|
||||
uint32 mem_handle; // handle of memory of indirect buffers
|
||||
} ring;
|
||||
|
||||
// feedback registers (in PCI memory)
|
||||
struct {
|
||||
//vuint32 *ptr; // pointer to scratch registers
|
||||
uint32 scratch_mem_offset; // offset of scratch registers in feedback memory
|
||||
uint32 head_mem_offset; // offset of head register in feedback memory
|
||||
uint32 scratch_vm_start; // virtual address of scratch as seen by GC
|
||||
uint32 head_vm_address; // virtual address of head as seen by GC
|
||||
memory_type_e mem_type; // memory type of feedback memory
|
||||
uint32 mem_handle; // handle of feedback memory
|
||||
} feedback;
|
||||
|
||||
|
||||
// indirect buffers (in non-local memory)
|
||||
// for indeces: -1 means "none"
|
||||
struct {
|
||||
int free_list; // index of first empty buffer
|
||||
int oldest, // oldest submitted buffer
|
||||
newest; // newest submitted buffer
|
||||
int active_state; // index of active state buffer
|
||||
uint64 cur_tag; // tag of last submitted indirect buffer
|
||||
|
||||
memory_type_e mem_type;
|
||||
uint32 mem_offset; // offset of indirect buffers in non-local memory
|
||||
uint32 vm_start; // start of indirect buffers as seen by graphics card
|
||||
|
||||
indirect_buffer buffers[NUM_INDIRECT_BUFFERS]; // info about buffers
|
||||
uint32 mem_handle; // handle of memory of indirect buffers
|
||||
} buffers;
|
||||
} CP_info;
|
||||
|
||||
|
||||
// info about different graphics-related memory
|
||||
// (see memory_type_e)
|
||||
typedef struct {
|
||||
area_id area; // area to memory
|
||||
uint32 size; // usable size in bytes
|
||||
uint32 virtual_addr_start; // virtual address (for graphics card!)
|
||||
uint32 virtual_size; // reserved virtual address space in bytes
|
||||
} memory_type_info;
|
||||
|
||||
|
||||
// data published by kernel and shared by all accelerant/virtual cards
|
||||
typedef struct {
|
||||
// filled out by kernel
|
||||
uint16 vendor_id; // PCI vendor id
|
||||
uint16 device_id; // PCI device id
|
||||
uint8 revision; // PCI device revision
|
||||
CP_info cp; // info concerning command processor
|
||||
|
||||
bool has_crtc2; // has second CRTC
|
||||
radeon_type asic;
|
||||
|
||||
pll_info pll;
|
||||
|
||||
area_id regs_area; // area of memory mapped registers
|
||||
area_id fb_area; // area of frame buffer
|
||||
uint8 *framebuffer; // pointer to frame buffer (visible by all apps!)
|
||||
void *framebuffer_pci; // physical address of frame buffer
|
||||
|
||||
physical_port ports[2];
|
||||
fp_info fp_port;
|
||||
|
||||
uint32 local_mem_size; // size of graphics memory
|
||||
|
||||
uint32 AGP_vm_start; // logical address (for graphics card) of AGP memory
|
||||
uint32 AGP_vm_size; // size of AGP address range
|
||||
|
||||
uint32 nonlocal_vm_start; // logical address (for graphics card) of nonlocal memory
|
||||
// always use this one, as it is valid in PCI mode too
|
||||
uint32 *nonlocal_mem; // logical address (for CPU) of nonlocal memory
|
||||
uint32 nonlocal_mem_size; // size of nonlocal memory
|
||||
|
||||
|
||||
// set by accelerator
|
||||
// set by accelerant
|
||||
struct {
|
||||
uint64 count; // count of submitted CP commands
|
||||
uint64 last_idle; // count when engine was idle last time
|
||||
uint64 written; // last count passed to CP
|
||||
benaphore lock; // engine lock
|
||||
} engine;
|
||||
|
||||
struct { // DMA ring buffer of CP
|
||||
uint32 start_offset; // offset in DMA buffer
|
||||
uint32 tail, tail_mask; // next write position in dwords; mask for wrap-arounds
|
||||
uint32 size; // size in dwords
|
||||
uint32 head_offset; // offset for automatically updates head in DMA buffer
|
||||
} engine;
|
||||
|
||||
uint32 *start; // pointer to ring buffer
|
||||
vuint32 *head; // pointer to automatically updates read position
|
||||
} ring;
|
||||
uint16 vendor_id; // PCI vendor id
|
||||
uint16 device_id; // PCI device id
|
||||
uint8 revision; // PCI device revision
|
||||
|
||||
vuint32 *scratch_ptr; // pointer to scratch registers (in DMA buffer)
|
||||
//bool has_crtc2; // has second CRTC
|
||||
radeon_type asic; // ASIC version
|
||||
bool is_mobility; // mobility version
|
||||
tv_chip_type tv_chip; // type of TV-Out encoder
|
||||
|
||||
uint8 theatre_channel; // VIP channel of Rage Theatre (if applicable)
|
||||
|
||||
general_pll_info pll;
|
||||
|
||||
area_id regs_area; // area of memory mapped registers
|
||||
area_id ROM_area; // area of ROM
|
||||
//area_id fb_area; // area of frame buffer
|
||||
void *framebuffer_pci; // physical address of frame buffer (aka local memory)
|
||||
// this is a hack needed by BeOS
|
||||
|
||||
physical_head heads[2]; // physical heads
|
||||
uint8 num_heads; // number of physical heads
|
||||
|
||||
display_device_e connected_displays; // bit-field of connected displays
|
||||
|
||||
fp_info flatpanels[2]; // info about connected flat panels (if any)
|
||||
|
||||
memory_type_info memory[mt_last]; // info about memory types
|
||||
memory_type_e nonlocal_type; // default type of non-local memory
|
||||
|
||||
uint8 *local_mem; // address of local memory;
|
||||
// this is a hack requested by BeOS
|
||||
|
||||
area_id mode_list_area; // area containing display mode list
|
||||
uint mode_count;
|
||||
|
||||
uint32 active_vc; // currently selected virtual card
|
||||
|
||||
uint32 active_vc; // currently selected virtual card in terms of 2D acceleration
|
||||
|
||||
uint32 dac_cntl2; // content of dac_cntl2 register
|
||||
|
||||
overlay_info pending_overlay;
|
||||
overlay_info active_overlay;
|
||||
overlay_mgr_info overlay_mgr;
|
||||
overlay_info pending_overlay; // overlay to be shown
|
||||
overlay_info active_overlay; // overlay shown
|
||||
overlay_mgr_info overlay_mgr; // status of overlay
|
||||
|
||||
// data needed for VBI emulation
|
||||
// (currently not fully implemented - if the user disabled graphics card
|
||||
@@ -336,25 +587,76 @@ typedef struct {
|
||||
char *name; // pointer to buffer containing name (in)
|
||||
} radeon_device_name;
|
||||
|
||||
// alloc local memory
|
||||
// alloc (non-)local memory
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint32 size;
|
||||
uint32 fb_offset;
|
||||
uint32 handle;
|
||||
} radeon_alloc_local_mem;
|
||||
uint32 magic;
|
||||
memory_type_e memory_type;// type of memory
|
||||
uint32 size; // size in bytes
|
||||
uint32 offset; // offset in memory
|
||||
uint32 handle; // handle (needed to free memory)
|
||||
bool global; // set this to true if memory should persist even
|
||||
// if client gets terminated
|
||||
} radeon_alloc_mem;
|
||||
|
||||
// free local memory
|
||||
// free (non-)local memory
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint32 handle;
|
||||
} radeon_free_local_mem;
|
||||
uint32 magic;
|
||||
memory_type_e memory_type;// type of memory
|
||||
uint32 handle; // memory handle
|
||||
bool global; // must be same as on alloc_local_mem
|
||||
} radeon_free_mem;
|
||||
|
||||
// get/set i2c signals
|
||||
// wait for idle
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
int port;
|
||||
int value;
|
||||
} radeon_getset_i2c;
|
||||
uint32 magic;
|
||||
bool keep_lock; // keep lock after engine is idle
|
||||
} radeon_wait_for_idle;
|
||||
|
||||
// read VIP register
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint channel; // channel, i.e. device
|
||||
uint address; // address
|
||||
uint32 data; // read data
|
||||
} radeon_vip_read;
|
||||
|
||||
// write VIP register
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint channel; // channel, i.e. device
|
||||
uint address; // address
|
||||
uint32 data; // data to write
|
||||
} radeon_vip_write;
|
||||
|
||||
// find channel of device with given ID
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint32 device_id; // id of device
|
||||
uint channel; // channel of device (-1 if not found)
|
||||
} radeon_find_vip_device;
|
||||
|
||||
// wait for capture interrupt and get status about
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
bigtime_t timeout; // timeout to wait for irq
|
||||
bigtime_t timestamp; // timestamp when last capturing was finished
|
||||
uint32 int_status; // content of RADEON_CAP_INT_STATUS
|
||||
uint32 counter; // number of capture interrupts so far
|
||||
} radeon_wait_for_cap_irq;
|
||||
|
||||
// copy data from frame buffer to some memory location
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint32 src; // offset of source data in frame buffer
|
||||
void *target; // target buffer
|
||||
size_t size; // number of bytes to copy
|
||||
bool lock_mem; // true, if target needs to be locked
|
||||
bool contiguous; // true, if target is physically contiguous
|
||||
} radeon_dma_copy;
|
||||
|
||||
// parameter for ioctl without further arguments
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
} radeon_no_arg;
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user