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updated register and acc command defines

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10503 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-12-20 13:10:45 +00:00
parent 2a85b5e2c7
commit 9daf2efe7d
2 changed files with 33 additions and 34 deletions
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headers/private/graphics/nvidia/nv_acc.h
+25 -3
View File
@@ -9,19 +9,41 @@
typedef struct {
uint32 reserved00[0x0004];
uint16 FifoFree; /* little endian (FIFO internal register) */
uint16 Nop; /* little endian (FIFO internal register) */
uint16 FifoFree; /* little endian (FIFO internal register) */
uint16 Nop; /* little endian (FIFO internal register) */
uint32 reserved01[0x00bb];
uint32 Rop3; /* b0-7 is ROP3, b8-31 are not used */
uint32 SetRop5; /* b0-7 is ROP5 */
} cmd_nv_rop5_solid;
typedef struct {
uint32 reserved00[0x0004];
uint16 FifoFree; /* little endian (FIFO internal register) */
uint16 Nop; /* little endian (FIFO internal register) */
uint32 reserved01[0x00bb];
uint32 TopLeft; /* b0-15 is left, b16-31 is top */
uint32 HeightWidth; /* b0-15 is width, b16-31 is height */
} cmd_nv_image_black_rectangle;
typedef struct {
uint32 reserved00[0x0004];
uint16 FifoFree; /* little endian (FIFO internal register) */
uint16 Nop; /* little endian (FIFO internal register) */
uint32 reserved01[0x00bd];
uint32 SetShape; /* b0-1: %00 = 8X_8Y; %01 = 64X_1Y; %10 = 1X_64Y */
uint32 reserved02[0x0001];
uint32 SetColor0; /* b0-31 is color */
uint32 SetColor1; /* b0-31 is color */
uint32 SetPattern[0x0002]; /* b0-31 is bitmap */
} cmd_nv_image_pattern;
typedef struct {
uint32 reserved00[0x0004];
uint16 FifoFree; /* little endian (FIFO internal register) */
uint16 Nop; /* little endian (FIFO internal register) */
uint32 reserved01[0x00bb];
uint32 SourceOrg; /* b0-15 is X, b16-31 is Y */
uint32 DestOrg; /* b0-15 is X, b16-31 is Y */
uint32 HeightWidth; /* b0-15 is width, b16-31 is height */
} cmd_nv_image_blit;
typedef struct {
headers/private/graphics/nvidia/nv_macros.h
+8 -31
View File
@@ -433,37 +433,14 @@
/* acc engine fifo setup registers (for function_register 'mappings') */
#define NVACC_FIFO 0x00800000
#define NVACC_FIFO_00800000 0x00800000
#define NVACC_FIFO_00802000 0x00802000
#define NVACC_FIFO_00804000 0x00804000
#define NVACC_FIFO_00806000 0x00806000
#define NVACC_FIFO_00808000 0x00808000
#define NVACC_FIFO_0080a000 0x0080a000
#define NVACC_FIFO_0080c000 0x0080c000
#define NVACC_FIFO_0080e000 0x0080e000
/* ROP3 registers (Raster OPeration) */
#define NV16_ROP_FIFOFREE 0x00800010 /* little endian */
#define NVACC_ROP_ROP3 0x00800300 /* 'mapped' from 0x00420300 */
/* clip registers */
#define NV16_CLP_FIFOFREE 0x00802010 /* little endian */
#define NVACC_CLP_TOPLEFT 0x00802300 /* 'mapped' from 0x00450300 */
#define NVACC_CLP_WIDHEIGHT 0x00802304 /* 'mapped' from 0x00450304 */
/* pattern registers */
#define NV16_PAT_FIFOFREE 0x00804010 /* little endian */
#define NVACC_PAT_SHAPE 0x00804308 /* 'mapped' from 0x00460308 */
#define NVACC_PAT_COLOR0 0x00804310 /* 'mapped' from 0x00460310 */
#define NVACC_PAT_COLOR1 0x00804314 /* 'mapped' from 0x00460314 */
#define NVACC_PAT_MONO1 0x00804318 /* 'mapped' from 0x00460318 */
#define NVACC_PAT_MONO2 0x0080431c /* 'mapped' from 0x0046031c */
/* blit registers */
#define NV16_BLT_FIFOFREE 0x00808010 /* little endian */
#define NVACC_BLT_TOPLFTSRC 0x00808300 /* 'mapped' from 0x00500300 */
#define NVACC_BLT_TOPLFTDST 0x00808304 /* 'mapped' from 0x00500304 */
#define NVACC_BLT_SIZE 0x00808308 /* 'mapped' from 0x00500308 */
#define NVACC_FIFO_CH0 0x00800000
#define NVACC_FIFO_CH1 0x00802000
#define NVACC_FIFO_CH2 0x00804000
#define NVACC_FIFO_CH3 0x00806000
#define NVACC_FIFO_CH4 0x00808000
#define NVACC_FIFO_CH5 0x0080a000
#define NVACC_FIFO_CH6 0x0080c000
#define NVACC_FIFO_CH7 0x0080e000
/* used bitmap registers */
#define NV16_BMP_FIFOFREE 0x0080a010 /* little endian */