Applied patch by Vasilis Kaoutsis: now checks for the MSR feature as well; obviously
some Pentium 200 MMX pretend to support MTRRs. This should fix bug #553. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19899 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -22,6 +22,7 @@
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#define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201
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// cpuid eax 1 features
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#define IA32_FEATURE_MSR (1UL << 5)
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#define IA32_FEATURE_MTRR (1UL << 12)
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#define IA32_FEATURE_GLOBAL_PAGES (1UL << 13)
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#define IA32_FEATURE_SSE (1UL << 25)
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@@ -1,5 +1,5 @@
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/*
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* Copyright 2005-2006, Haiku, Inc.
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* Copyright 2005-2007, Haiku, Inc.
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* Distributed under the terms of the MIT License.
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*
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* Authors:
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@@ -48,7 +48,8 @@ generic_count_mtrrs(void)
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{
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cpuid_info cpuInfo;
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if (get_current_cpuid(&cpuInfo, 1) != B_OK
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|| (cpuInfo.eax_1.features & IA32_FEATURE_MTRR) == 0)
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|| (cpuInfo.eax_1.features & IA32_FEATURE_MTRR) == 0
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|| (cpuInfo.eax_1.features & IA32_FEATURE_MSR) == 0)
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return 0;
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mtrr_capabilities capabilities(x86_read_msr(IA32_MSR_MTRR_CAPABILITIES));
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@@ -160,6 +161,9 @@ generic_mtrr_compute_physical_mask(void)
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void
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generic_dump_mtrrs(uint32 count)
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{
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if (count == 0)
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return;
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if (x86_read_msr(IA32_MSR_MTRR_DEFAULT_TYPE) & IA32_MTRR_ENABLE) {
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TRACE(("MTRR enabled\n"));
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} else {
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