intel_extreme: Let ports pick a pipe if required

This commit is contained in:
Alexander von Gluck IV
2015-11-10 16:00:26 -06:00
parent 4f2b258c32
commit a5a2bf727c
4 changed files with 24 additions and 3 deletions
@@ -53,9 +53,14 @@ DisplayPipe::DisplayPipe(pipe_index pipeIndex)
// fFDILink(NULL),
// fPanelFitter(NULL),
fPipeIndex(pipeIndex),
fPipeBase(REGS_NORTH_PIPE_AND_PORT + pipeIndex * INTEL_DISPLAY_OFFSET),
fPlaneBase(REGS_NORTH_PLANE_CONTROL + pipeIndex * INTEL_PLANE_OFFSET)
fPipeBase(REGS_NORTH_PIPE_AND_PORT),
fPlaneBase(REGS_NORTH_PLANE_CONTROL)
{
if (pipeIndex == INTEL_PIPE_B) {
fPipeBase += INTEL_DISPLAY_OFFSET;
fPlaneBase += INTEL_PLANE_OFFSET;
}
TRACE("DisplayPipe %s. Pipe Base: 0x%" B_PRIxADDR
" Plane Base: 0x% " B_PRIxADDR "\n", (pipeIndex == INTEL_PIPE_A)
? "A" : "B", fPipeBase, fPlaneBase);
@@ -17,6 +17,7 @@
enum pipe_index {
INTEL_PIPE_ANY,
INTEL_PIPE_A,
INTEL_PIPE_B
};
@@ -66,6 +66,9 @@ virtual status_t GetPLLLimits(pll_limits& limits);
virtual status_t SetDisplayMode(display_mode* mode,
uint32 colorMode) { return B_ERROR; };
virtual pipe_index PipePreference()
{ return INTEL_PIPE_ANY; };
protected:
void _SetName(const char* name);
@@ -120,6 +123,9 @@ virtual bool IsConnected();
virtual status_t SetDisplayMode(display_mode* mode,
uint32 colorMode);
virtual pipe_index PipePreference()
{ return INTEL_PIPE_B; };
protected:
virtual addr_t _DDCRegister();
virtual addr_t _PortRegister();
@@ -325,11 +325,20 @@ assign_pipes()
// TODO: At some point we should "group" ports to pipes with the same mode.
// You can drive multiple ports from a single pipe as long as the mode is
// the same.
// the same. For the moment we could get displays with the wrong pipes
// assigned when the count is > 1;
for (uint32 i = 0; i < gInfo->port_count; i++) {
if (gInfo->ports[i] == NULL)
continue;
if (gInfo->ports[i]->PipePreference() != INTEL_PIPE_ANY) {
// Some ports *really* need to be assigned a pipe due to
// implementation bugs.
gInfo->ports[i]->AssignPipe(gInfo->ports[i]->PipePreference());
continue;
}
if (gInfo->ports[i]->IsConnected()) {
pipe_index currentPipe = INTEL_PIPE_A;
if (assigned == 1)