Added driver for Open PIC compatible interrupt controllers (ported
from FreeBSD). At the moment it only recognizes Apple's Intrepid Mac I/O Controller. Not sure how well it works yet. Enabling all I/O interrupts definitely triggers one, but I don't seem to get rid of it afterwards. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16270 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Ingo Weinhold
@@ -6,8 +6,10 @@ AddDirectoryToHaikuImage var tmp ;
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if $(TARGET_ARCH) = x86 {
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X86_ONLY = "" ;
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PPC_ONLY = ;
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} else if $(TARGET_ARCH) = ppc {
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X86_ONLY = ;
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PPC_ONLY = "" ;
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}
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BEOS_BIN = addattr alert arp basename beep cat catattr chgrp chmod chop chown clear
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@@ -84,6 +86,8 @@ AddFilesToHaikuImage beos system add-ons kernel file_systems : bfs ;
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AddFilesToHaikuImage beos system add-ons kernel generic
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: block_io fast_log ide_adapter locked_pool scsi_periph ;
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AddFilesToHaikuImage beos system add-ons kernel partitioning_systems : intel ;
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AddFilesToHaikuImage beos system add-ons kernel interrupt_controllers
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: $(PPC_ONLY)openpic ;
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if $(TARGET_ARCH) = x86 {
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AddFilesToHaikuImage beos system add-ons kernel cpu : generic_x86 ;
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@@ -186,8 +190,8 @@ AddFilesToHaikuImage beos system : zbeos ;
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# boot module links
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AddBootModuleSymlinks config_manager bfs block_io fast_log generic_ide_pci
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$(X86_ONLY)isa ide ide_adapter $(X86_ONLY)ide_isa intel locked_pool pci scsi
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scsi_cd scsi_dsk scsi_periph
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$(X86_ONLY)isa ide ide_adapter $(X86_ONLY)ide_isa intel locked_pool
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$(PPC_ONLY)openpic pci scsi scsi_cd scsi_dsk scsi_periph
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;
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# add-ons
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@@ -8,6 +8,7 @@ SubInclude HAIKU_TOP src add-ons kernel disk_scanner ;
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SubInclude HAIKU_TOP src add-ons kernel drivers ;
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SubInclude HAIKU_TOP src add-ons kernel file_cache ;
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SubInclude HAIKU_TOP src add-ons kernel file_systems ;
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SubInclude HAIKU_TOP src add-ons kernel interrupt_controllers ;
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SubInclude HAIKU_TOP src add-ons kernel network ;
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SubInclude HAIKU_TOP src add-ons kernel media ;
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SubInclude HAIKU_TOP src add-ons kernel partitioning_systems ;
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@@ -0,0 +1,3 @@
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SubDir HAIKU_TOP src add-ons kernel interrupt_controllers ;
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SubInclude HAIKU_TOP src add-ons kernel interrupt_controllers openpic ;
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@@ -0,0 +1,6 @@
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SubDir HAIKU_TOP src add-ons kernel interrupt_controllers openpic ;
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UsePrivateHeaders kernel ;
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UsePrivateHeaders shared ;
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KernelAddon openpic : kernel interrupt_controllers : openpic.cpp ;
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@@ -0,0 +1,535 @@
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/*
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* Copyright 2006, Ingo Weinhold <[email protected]>.
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* All rights reserved. Distributed under the terms of the MIT License.
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*/
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/*-
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* Copyright (C) 2002 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <stdio.h>
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#include <string.h>
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#include <ByteOrder.h>
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#include <KernelExport.h>
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#include <AutoDeleter.h>
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#include <bus/PCI.h>
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#include <interrupt_controller.h>
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#include <util/kernel_cpp.h>
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#include "openpic.h"
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#define OPENPIC_MODULE_NAME "interrupt_controllers/openpic/device_v1"
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enum {
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OPENPIC_MIN_REGISTER_SPACE_SIZE = 0x21000,
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OPENPIC_MAX_REGISTER_SPACE_SIZE = 0x40000,
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};
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struct openpic_supported_device {
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const char *name;
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uint16 vendor_id;
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uint16 device_id;
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uint32 register_offset;
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};
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static openpic_supported_device sSupportedDevices[] = {
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{ "Intrepid I/O Controller", 0x106b, 0x003e, 0x40000 },
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{}
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};
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static device_manager_info *sDeviceManager;
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static pci_module_info *sPCIBusManager;
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struct openpic_info : interrupt_controller_info {
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openpic_info()
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{
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memset(this, 0, sizeof(openpic_info));
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register_area = -1;
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}
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~openpic_info()
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{
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// unmap registers)
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if (register_area >= 0)
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delete_area(register_area);
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// uninit parent node driver
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if (pci)
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sDeviceManager->uninit_driver(sDeviceManager->get_parent(node));
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}
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openpic_supported_device *supported_device;
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device_node_handle node;
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pci_device_module_info *pci;
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pci_device device;
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addr_t physical_registers; // physical registers base
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addr_t virtual_registers; // virtual (mapped)
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// registers base
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area_id register_area; // register area
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size_t register_space_size;
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};
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static openpic_supported_device *
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openpic_check_supported_device(uint16 vendorID, uint16 deviceID)
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{
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for (openpic_supported_device *supportedDevice = sSupportedDevices;
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supportedDevice->name;
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supportedDevice++) {
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if (supportedDevice->vendor_id == vendorID
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&& supportedDevice->device_id == deviceID) {
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return supportedDevice;
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}
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}
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return NULL;
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}
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static uint32
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openpic_read(openpic_info *info, int reg)
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{
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return B_SWAP_INT32(info->pci->read_io_32(info->device,
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info->virtual_registers + reg));
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}
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static void
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openpic_write(openpic_info *info, int reg, uint32 val)
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{
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info->pci->write_io_32(info->device, info->virtual_registers + reg,
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B_SWAP_INT32(val));
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}
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static int
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openpic_read_irq(openpic_info *info, int cpu)
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{
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return openpic_read(info, OPENPIC_IACK(cpu)) & OPENPIC_VECTOR_MASK;
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}
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static void
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openpic_eoi(openpic_info *info, int cpu)
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{
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openpic_write(info, OPENPIC_EOI(cpu), 0);
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// the Linux driver does this:
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//openpic_read(info, OPENPIC_EOI(cpu));
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}
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static void
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openpic_enable_irq(openpic_info *info, int irq, int type)
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{
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// TODO: Align this code with the sequence recommended in the Open PIC
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// Specification (v 1.2 section 5.2.2).
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uint32 x;
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x = openpic_read(info, OPENPIC_SRC_VECTOR(irq));
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x &= ~(OPENPIC_IMASK | OPENPIC_SENSE_LEVEL | OPENPIC_SENSE_EDGE);
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if (type == IRQ_TYPE_LEVEL)
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x |= OPENPIC_SENSE_LEVEL;
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else
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x |= OPENPIC_SENSE_EDGE;
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openpic_write(info, OPENPIC_SRC_VECTOR(irq), x);
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}
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static void
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openpic_disable_irq(openpic_info *info, int irq)
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{
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uint32 x;
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x = openpic_read(info, OPENPIC_SRC_VECTOR(irq));
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x |= OPENPIC_IMASK;
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openpic_write(info, OPENPIC_SRC_VECTOR(irq), x);
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}
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static void
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openpic_set_priority(openpic_info *info, int cpu, int pri)
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{
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uint32 x;
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x = openpic_read(info, OPENPIC_CPU_PRIORITY(cpu));
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x &= ~OPENPIC_CPU_PRIORITY_MASK;
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x |= pri;
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openpic_write(info, OPENPIC_CPU_PRIORITY(cpu), x);
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}
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static status_t
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openpic_init(openpic_info *info)
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{
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uint32 x = openpic_read(info, OPENPIC_FEATURE);
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const char *featureVersion;
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char versionBuffer[64];
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switch (x & OPENPIC_FEATURE_VERSION_MASK) {
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case 1:
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featureVersion = "1.0";
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break;
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case 2:
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featureVersion = "1.2";
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break;
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case 3:
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featureVersion = "1.3";
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break;
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default:
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snprintf(versionBuffer, sizeof(versionBuffer),
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"unknown (feature reg: 0x%lx)", x);
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featureVersion = versionBuffer;
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break;
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}
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info->cpu_count = ((x & OPENPIC_FEATURE_LAST_CPU_MASK) >>
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OPENPIC_FEATURE_LAST_CPU_SHIFT) + 1;
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info->irq_count = ((x & OPENPIC_FEATURE_LAST_IRQ_MASK) >>
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OPENPIC_FEATURE_LAST_IRQ_SHIFT) + 1;
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/*
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* PSIM seems to report 1 too many IRQs
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*/
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// if (sc->sc_psim)
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// sc->sc_nirq--;
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dprintf("openpic: Version %s, supports %d CPUs and %d irqs\n",
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featureVersion, info->cpu_count, info->irq_count);
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/* disable all interrupts */
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for (int irq = 0; irq < info->irq_count; irq++)
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openpic_write(info, OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
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openpic_set_priority(info, 0, 15);
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/* we don't need 8259 passthrough mode */
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x = openpic_read(info, OPENPIC_CONFIG);
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x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
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openpic_write(info, OPENPIC_CONFIG, x);
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/* send all interrupts to cpu 0 */
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for (int irq = 0; irq < info->irq_count; irq++)
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openpic_write(info, OPENPIC_IDEST(irq), 1 << 0);
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for (int irq = 0; irq < info->irq_count; irq++) {
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x = irq;
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x |= OPENPIC_IMASK;
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x |= OPENPIC_POLARITY_POSITIVE;
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x |= OPENPIC_SENSE_LEVEL;
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x |= 8 << OPENPIC_PRIORITY_SHIFT;
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openpic_write(info, OPENPIC_SRC_VECTOR(irq), x);
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}
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/* XXX IPI */
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/* XXX set spurious intr vector */
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openpic_set_priority(info, 0, 0);
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/* clear all pending interrupts */
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for (int irq = 0; irq < info->irq_count; irq++) {
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openpic_read_irq(info, 0);
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openpic_eoi(info, 0);
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}
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return B_OK;
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}
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// #pragma mark - driver interface
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static status_t
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openpic_std_ops(int32 op, ...)
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{
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switch (op) {
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case B_MODULE_INIT:
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case B_MODULE_UNINIT:
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return B_OK;
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default:
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return B_ERROR;
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}
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}
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static float
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openpic_supports_device(device_node_handle parent, bool *_noConnection)
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{
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char *bus;
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uint16 vendorID;
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uint16 deviceID;
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// get the bus (should be PCI)
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if (sDeviceManager->get_attr_string(parent, B_DRIVER_BUS, &bus, false)
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!= B_OK) {
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return B_ERROR;
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}
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MemoryDeleter _(bus);
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// get vendor and device ID
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if (sDeviceManager->get_attr_uint16(parent, PCI_DEVICE_VENDOR_ID_ITEM,
|
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&vendorID, false) != B_OK
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|| sDeviceManager->get_attr_uint16(parent, PCI_DEVICE_DEVICE_ID_ITEM,
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&deviceID, false) != B_OK) {
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return B_ERROR;
|
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}
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// check, whether bus, vendor and device ID match
|
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if (strcmp(bus, "pci") != 0
|
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|| !openpic_check_supported_device(vendorID, deviceID)) {
|
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return 0.0;
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}
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return 0.6;
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}
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static status_t
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openpic_register_device(device_node_handle parent)
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{
|
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// get interface to PCI device
|
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pci_device_module_info *pci;
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pci_device device;
|
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status_t error = sDeviceManager->init_driver(parent, NULL,
|
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(driver_module_info**)&pci, (void**)&device);
|
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if (error != B_OK)
|
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return error;
|
||||
|
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sDeviceManager->uninit_driver(parent);
|
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|
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device_attr attrs[] = {
|
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// info about ourself
|
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{ B_DRIVER_MODULE, B_STRING_TYPE, { string: OPENPIC_MODULE_NAME }},
|
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{ B_DRIVER_DEVICE_TYPE, B_STRING_TYPE,
|
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{ string: B_INTERRUPT_CONTROLLER_DRIVER_TYPE }},
|
||||
|
||||
{}
|
||||
};
|
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|
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return sDeviceManager->register_device(parent, attrs, NULL, NULL);
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
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openpic_init_driver(device_node_handle node, void *user_cookie,
|
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void **cookie)
|
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{
|
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openpic_info *info = new(nothrow) openpic_info;
|
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if (!info)
|
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return B_NO_MEMORY;
|
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ObjectDeleter<openpic_info> infoDeleter(info);
|
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|
||||
info->node = node;
|
||||
|
||||
// get interface to PCI device
|
||||
status_t error = sDeviceManager->init_driver(
|
||||
sDeviceManager->get_parent(node), NULL,
|
||||
(driver_module_info**)&info->pci, (void**)&info->device);
|
||||
if (error != B_OK)
|
||||
return error;
|
||||
|
||||
// get the pci info for the device
|
||||
pci_info pciInfo;
|
||||
error = info->pci->get_pci_info(info->device, &pciInfo);
|
||||
if (error != B_OK)
|
||||
return error;
|
||||
|
||||
// find supported device info
|
||||
info->supported_device = openpic_check_supported_device(pciInfo.vendor_id,
|
||||
pciInfo.device_id);
|
||||
if (!info->supported_device) {
|
||||
dprintf("openpic: device (0x%04hx:0x%04hx) not supported\n",
|
||||
pciInfo.vendor_id, pciInfo.device_id);
|
||||
return B_ERROR;
|
||||
}
|
||||
dprintf("openpic: found supported device: %s (0x%04hx:0x%04hx)\n",
|
||||
info->supported_device->name, pciInfo.vendor_id, pciInfo.device_id);
|
||||
|
||||
// get register space
|
||||
addr_t physicalRegisterBase = pciInfo.u.h0.base_registers[0];
|
||||
uint32 registerSpaceSize = pciInfo.u.h0.base_register_sizes[0];
|
||||
if (registerSpaceSize < info->supported_device->register_offset
|
||||
|| registerSpaceSize - info->supported_device->register_offset
|
||||
< OPENPIC_MIN_REGISTER_SPACE_SIZE) {
|
||||
dprintf("openpic: register space too small\n");
|
||||
}
|
||||
physicalRegisterBase += info->supported_device->register_offset;
|
||||
registerSpaceSize -= info->supported_device->register_offset;
|
||||
if (registerSpaceSize > OPENPIC_MAX_REGISTER_SPACE_SIZE)
|
||||
registerSpaceSize = OPENPIC_MAX_REGISTER_SPACE_SIZE;
|
||||
|
||||
// map register space
|
||||
void *virtualRegisterBase = NULL;
|
||||
area_id registerArea = map_physical_memory("openpic registers",
|
||||
(void*)physicalRegisterBase, registerSpaceSize, B_ANY_KERNEL_ADDRESS,
|
||||
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, &virtualRegisterBase);
|
||||
if (registerArea < 0)
|
||||
return info->register_area;
|
||||
|
||||
info->physical_registers = physicalRegisterBase;
|
||||
info->register_space_size = registerSpaceSize;
|
||||
info->register_area = registerArea;
|
||||
info->virtual_registers = (addr_t)virtualRegisterBase;
|
||||
|
||||
// init the controller
|
||||
error = openpic_init(info);
|
||||
if (error != B_OK)
|
||||
return error;
|
||||
|
||||
// keep the info
|
||||
infoDeleter.Detach();
|
||||
*cookie = info;
|
||||
|
||||
dprintf("openpic_init_driver(): Successfully initialized!\n");
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
openpic_uninit_driver(void *cookie)
|
||||
{
|
||||
openpic_info *info = (openpic_info*)cookie;
|
||||
|
||||
delete info;
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
openpic_device_removed(device_node_handle node, void *cookie)
|
||||
{
|
||||
// TODO: ...
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
openpic_get_paths(const char ***_bus, const char ***_device)
|
||||
{
|
||||
static const char *kBus[] = { "pci", NULL };
|
||||
// static const char *kDevice[] = { "drivers/dev/disk/ide", NULL };
|
||||
|
||||
*_bus = kBus;
|
||||
// *_device = kDevice;
|
||||
*_device = NULL;
|
||||
}
|
||||
|
||||
|
||||
// #pragma mark - interrupt_controller interface
|
||||
|
||||
|
||||
static status_t
|
||||
openpic_get_controller_info(void *cookie, interrupt_controller_info *_info)
|
||||
{
|
||||
if (!_info)
|
||||
return B_BAD_VALUE;
|
||||
|
||||
openpic_info *info = (openpic_info*)cookie;
|
||||
|
||||
*_info = *info;
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
openpic_enable_io_interrupt(void *cookie, int irq, int type)
|
||||
{
|
||||
openpic_info *info = (openpic_info*)cookie;
|
||||
|
||||
openpic_enable_irq(info, irq, type);
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
openpic_disable_io_interrupt(void *cookie, int irq)
|
||||
{
|
||||
openpic_info *info = (openpic_info*)cookie;
|
||||
|
||||
openpic_disable_irq(info, irq);
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
openpic_acknowledge_io_interrupt(void *cookie)
|
||||
{
|
||||
openpic_info *info = (openpic_info*)cookie;
|
||||
|
||||
int cpu = 0;
|
||||
// Note: We direct all I/O interrupts to CPU 0. We could nevertheless
|
||||
// check against the value of the "Who Am I Register".
|
||||
|
||||
int irq = openpic_read_irq(info, cpu);
|
||||
if (irq == 255)
|
||||
return -1; // spurious interrupt
|
||||
|
||||
// signal end of interrupt
|
||||
openpic_eoi(info, cpu);
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
|
||||
static interrupt_controller_module_info sControllerModuleInfo = {
|
||||
{
|
||||
{
|
||||
OPENPIC_MODULE_NAME,
|
||||
0,
|
||||
openpic_std_ops
|
||||
},
|
||||
|
||||
openpic_supports_device,
|
||||
openpic_register_device,
|
||||
openpic_init_driver,
|
||||
openpic_uninit_driver,
|
||||
openpic_device_removed,
|
||||
NULL, // cleanup
|
||||
openpic_get_paths,
|
||||
},
|
||||
|
||||
openpic_get_controller_info,
|
||||
openpic_enable_io_interrupt,
|
||||
openpic_disable_io_interrupt,
|
||||
openpic_acknowledge_io_interrupt,
|
||||
};
|
||||
|
||||
module_dependency module_dependencies[] = {
|
||||
{ B_DEVICE_MANAGER_MODULE_NAME, (module_info **)&sDeviceManager },
|
||||
{ B_PCI_MODULE_NAME, (module_info**)&sPCIBusManager},
|
||||
{}
|
||||
};
|
||||
|
||||
module_info *modules[] = {
|
||||
(module_info *)&sControllerModuleInfo,
|
||||
NULL
|
||||
};
|
||||
@@ -0,0 +1,111 @@
|
||||
/*-
|
||||
* Copyright (c) 2000 Tsubai Masanari. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* from NetBSD: openpicreg.h,v 1.3 2001/08/30 03:08:52 briggs Exp
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef OPENPIC_H
|
||||
#define OPENPIC_H
|
||||
|
||||
/*
|
||||
* Size of OpenPIC register space
|
||||
*/
|
||||
#define OPENPIC_SIZE 0x40000
|
||||
|
||||
/*
|
||||
* GLOBAL/TIMER register (IDU base + 0x1000)
|
||||
*/
|
||||
|
||||
/* feature reporting reg 0 */
|
||||
#define OPENPIC_FEATURE 0x1000
|
||||
#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff
|
||||
#define OPENPIC_FEATURE_LAST_CPU_MASK 0x00001f00
|
||||
#define OPENPIC_FEATURE_LAST_CPU_SHIFT 8
|
||||
#define OPENPIC_FEATURE_LAST_IRQ_MASK 0x07ff0000
|
||||
#define OPENPIC_FEATURE_LAST_IRQ_SHIFT 16
|
||||
|
||||
/* global config reg 0 */
|
||||
#define OPENPIC_CONFIG 0x1020
|
||||
#define OPENPIC_CONFIG_RESET 0x80000000
|
||||
#define OPENPIC_CONFIG_8259_PASSTHRU_DISABLE 0x20000000
|
||||
|
||||
/* interrupt configuration mode (direct or serial) */
|
||||
#define OPENPIC_ICR 0x1030
|
||||
#define OPENPIC_ICR_SERIAL_MODE (1 << 27)
|
||||
#define OPENPIC_ICR_SERIAL_RATIO_MASK (0x7 << 28)
|
||||
#define OPENPIC_ICR_SERIAL_RATIO_SHIFT 28
|
||||
|
||||
/* processor initialization reg */
|
||||
#define OPENPIC_PROC_INIT 0x1090
|
||||
|
||||
/* IPI vector/priority reg */
|
||||
#define OPENPIC_IPI_VECTOR(ipi) (0x10a0 + (ipi) * 0x10)
|
||||
|
||||
/* spurious intr. vector */
|
||||
#define OPENPIC_SPURIOUS_VECTOR 0x10e0
|
||||
|
||||
|
||||
/*
|
||||
* INTERRUPT SOURCE register (IDU base + 0x10000)
|
||||
*/
|
||||
|
||||
/* interrupt vector/priority reg */
|
||||
#ifndef OPENPIC_SRC_VECTOR
|
||||
#define OPENPIC_SRC_VECTOR(irq) (0x10000 + (irq) * 0x20)
|
||||
#endif
|
||||
#define OPENPIC_SENSE_LEVEL 0x00400000
|
||||
#define OPENPIC_SENSE_EDGE 0x00000000
|
||||
#define OPENPIC_POLARITY_POSITIVE 0x00800000
|
||||
#define OPENPIC_POLARITY_NEGATIVE 0x00000000
|
||||
#define OPENPIC_IMASK 0x80000000
|
||||
#define OPENPIC_ACTIVITY 0x40000000
|
||||
#define OPENPIC_PRIORITY_MASK 0x000f0000
|
||||
#define OPENPIC_PRIORITY_SHIFT 16
|
||||
#define OPENPIC_VECTOR_MASK 0x000000ff
|
||||
|
||||
/* interrupt destination cpu */
|
||||
#ifndef OPENPIC_IDEST
|
||||
#define OPENPIC_IDEST(irq) (0x10010 + (irq) * 0x20)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* PROCESSOR register (IDU base + 0x20000)
|
||||
*/
|
||||
|
||||
/* IPI command reg */
|
||||
#define OPENPIC_IPI(cpu, ipi) (0x20040 + (cpu) * 0x1000 + (ipi))
|
||||
|
||||
/* current task priority reg */
|
||||
#define OPENPIC_CPU_PRIORITY(cpu) (0x20080 + (cpu) * 0x1000)
|
||||
#define OPENPIC_CPU_PRIORITY_MASK 0x0000000f
|
||||
|
||||
/* interrupt acknowledge reg */
|
||||
#define OPENPIC_IACK(cpu) (0x200a0 + (cpu) * 0x1000)
|
||||
|
||||
/* end of interrupt reg */
|
||||
#define OPENPIC_EOI(cpu) (0x200b0 + (cpu) * 0x1000)
|
||||
|
||||
#endif // OPENPIC_H
|
||||
Reference in New Issue
Block a user