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rewritten ISA coldstart script cmd's to actually use ISA I/O.

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8791 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-09-02 08:36:27 +00:00
parent 05835518ae
commit abbf0913fb
3 changed files with 18 additions and 12 deletions
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src/add-ons/accelerants/nvidia/engine/nv_globals.c
+10 -1
View File
@@ -3,7 +3,8 @@
This file may be used under the terms of the Be Sample Code License. This file may be used under the terms of the Be Sample Code License.
Other authors: Other authors:
Mark Watson Mark Watson,
Rudolf Cornelissen 8/2004
*/ */
#include "nv_std.h" #include "nv_std.h"
@@ -24,3 +25,11 @@ nv_get_set_pci nv_pci_access=
4, 4,
0 0
}; };
nv_in_out_isa nv_isa_access=
{
NV_PRIVATE_DATA_MAGIC,
0,
1,
0
};
src/add-ons/accelerants/nvidia/engine/nv_globals.h
+1
View File
@@ -8,6 +8,7 @@ extern area_id my_mode_list_area;
extern int accelerantIsClone; extern int accelerantIsClone;
extern nv_get_set_pci nv_pci_access; extern nv_get_set_pci nv_pci_access;
extern nv_in_out_isa nv_isa_access;
typedef status_t (*crtc_validate_timing)(uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*); typedef status_t (*crtc_validate_timing)(uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*);
src/add-ons/accelerants/nvidia/engine/nv_info.c
+7 -11
View File
@@ -413,14 +413,12 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
adress += 1; adress += 1;
LOG(8,("cmd 'RD 8bit ISA I/O REG $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n", LOG(8,("cmd 'RD 8bit ISA I/O REG $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n",
reg, and_out, or_in)); reg, and_out, or_in));
//fixme? this is for ISA I/O registers. Looks like they are in mapped range
// as well (confirm or update code!)
if (exec) if (exec)
{ {
byte = NV_REG8(/*0x00601000 + */reg); byte = ISARB(reg);
byte &= (uint8)and_out; byte &= (uint8)and_out;
byte |= (uint8)or_in; byte |= (uint8)or_in;
NV_REG8(/*0x00601000 + */reg) = byte; ISAWB(reg, byte);
} }
break; break;
case 0x6e: case 0x6e:
@@ -521,17 +519,15 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
adress += 1; adress += 1;
LOG(8,("cmd 'RD 8bit idx ISA I/O REG $%02x via $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n", LOG(8,("cmd 'RD 8bit idx ISA I/O REG $%02x via $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n",
index, reg, and_out, or_in)); index, reg, and_out, or_in));
//fixme? this is for ISA I/O registers. Looks like they are in mapped range
// as well (confirm or update code!)
if (exec) if (exec)
{ {
safe = NV_REG8(/*0x00601000 + */reg); safe = ISARB(reg);
NV_REG8(/*0x00601000 + */reg) = index; ISAWB(reg, index);
byte = NV_REG8(/*0x00601000 + */reg + 1); byte = ISARB(reg + 1);
byte &= (uint8)and_out; byte &= (uint8)and_out;
byte |= (uint8)or_in; byte |= (uint8)or_in;
NV_REG8(/*0x00601000 + */reg + 1) = byte; ISAWB((reg + 1), byte);
NV_REG8(/*0x00601000 + */reg) = safe; ISAWB(reg, safe);
} }
break; break;
case 0x79: case 0x79: