arm/paging: Convert to new-style CPU management

* Aka, post-scheduler changes
* Luckily ARM paging code is very simular to x86 paging

src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp

@@ -9,8 +9,7 @@
 
 ARMPagingStructures::ARMPagingStructures()
 	:
-	ref_count(1),
-	active_on_cpus(0)
+	ref_count(1)
 {
 }
 

src/system/kernel/arch/arm/paging/ARMPagingStructures.h

@@ -14,11 +14,13 @@
 
 #include <heap.h>
 
+#include <smp.h>
+
 
 struct ARMPagingStructures : DeferredDeletable {
 	uint32						pgdir_phys;
 	int32						ref_count;
-	vint32						active_on_cpus;
+	CPUSet						active_on_cpus;
 		// mask indicating on which CPUs the map is currently used
 
 								ARMPagingStructures();

src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp

@@ -113,9 +113,10 @@ ARMVMTranslationMap::Flush()
 			restore_interrupts(state);
 
 			int cpu = smp_get_current_cpu();
-			uint32 cpuMask = PagingStructures()->active_on_cpus
-				& ~((uint32)1 << cpu);
-			if (cpuMask != 0) {
+			CPUSet cpuMask = PagingStructures()->active_on_cpus;
+			cpuMask.ClearBit(cpu);
+
+			if (!cpuMask.IsEmpty()) {
 				smp_send_multicast_ici(cpuMask, SMP_MSG_USER_INVALIDATE_PAGES,
 					0, 0, 0, NULL, SMP_MSG_FLAG_SYNC);
 			}
@@ -132,9 +133,10 @@ ARMVMTranslationMap::Flush()
 				SMP_MSG_FLAG_SYNC);
 		} else {
 			int cpu = smp_get_current_cpu();
-			uint32 cpuMask = PagingStructures()->active_on_cpus
-				& ~((uint32)1 << cpu);
-			if (cpuMask != 0) {
+			CPUSet cpuMask = PagingStructures()->active_on_cpus;
+			cpuMask.ClearBit(cpu);
+
+			if (!cpuMask.IsEmpty()) {
 				smp_send_multicast_ici(cpuMask, SMP_MSG_INVALIDATE_PAGE_LIST,
 					(addr_t)fInvalidPages, fInvalidPagesCount, 0, NULL,
 					SMP_MSG_FLAG_SYNC);

src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp

@@ -112,7 +112,7 @@ private:
 			struct page_slot {
 				PhysicalPageSlot*	slot;
 				phys_addr_t			physicalAddress;
-				cpu_mask_t			valid;
+				CPUSet				valid;
 			};
 
 			page_slot			fSlots[SLOTS_PER_TRANSLATION_MAP];
@@ -174,7 +174,7 @@ private:
 			PhysicalPageSlot* fDebugSlot;
 			PhysicalPageSlotPool* fInitialPool;
 			LargeMemoryTranslationMapPhysicalPageMapper	fKernelMapper;
-			PhysicalPageOpsCPUData fPerCPUData[B_MAX_CPU_COUNT];
+			PhysicalPageOpsCPUData fPerCPUData[SMP_MAX_CPUS];
 };
 
 static LargeMemoryPhysicalPageMapper sPhysicalPageMapper;
@@ -396,11 +396,11 @@ LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
 		page_slot& slot = fSlots[i];
 		if (slot.physicalAddress == physicalAddress) {
 			fNextSlot = (i + 1) & (fSlotCount - 1);
-			if ((slot.valid & (1 << currentCPU)) == 0) {
+			if (!slot.valid.GetBit(currentCPU)) {
 				// not valid on this CPU -- invalidate the TLB entry
 				arch_cpu_invalidate_TLB_range(slot.slot->address,
 					slot.slot->address + B_PAGE_SIZE);
-				slot.valid |= 1 << currentCPU;
+				slot.valid.SetBit(currentCPU);
 			}
 			return (void*)slot.slot->address + off;
 		}
@@ -412,7 +412,8 @@ LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
 
 	slot.physicalAddress = physicalAddress;
 	slot.slot->Map(physicalAddress);
-	slot.valid = 1 << currentCPU;
+	slot.valid.ClearAll();
+	slot.valid.SetBit(currentCPU);
 
 	return (void*)slot.slot->address + off;
 }