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arm/paging: Convert to new-style CPU management

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* Aka, post-scheduler changes
* Luckily ARM paging code is very simular to x86 paging
This commit is contained in:
Alexander von Gluck IV
2014-02-12 23:54:35 -06:00
parent 35171b073d
commit abcbb5d617
4 changed files with 18 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp
+1 -2
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@@ -9,8 +9,7 @@
ARMPagingStructures::ARMPagingStructures() ARMPagingStructures::ARMPagingStructures()
: :
ref_count(1), ref_count(1)
active_on_cpus(0)
{ {
} }
src/system/kernel/arch/arm/paging/ARMPagingStructures.h
+3 -1
View File
@@ -14,11 +14,13 @@
#include <heap.h> #include <heap.h>
#include <smp.h>
struct ARMPagingStructures : DeferredDeletable { struct ARMPagingStructures : DeferredDeletable {
uint32 pgdir_phys; uint32 pgdir_phys;
int32 ref_count; int32 ref_count;
vint32 active_on_cpus; CPUSet active_on_cpus;
// mask indicating on which CPUs the map is currently used // mask indicating on which CPUs the map is currently used
ARMPagingStructures(); ARMPagingStructures();
src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp
+8 -6
View File
@@ -113,9 +113,10 @@ ARMVMTranslationMap::Flush()
restore_interrupts(state); restore_interrupts(state);
int cpu = smp_get_current_cpu(); int cpu = smp_get_current_cpu();
uint32 cpuMask = PagingStructures()->active_on_cpus CPUSet cpuMask = PagingStructures()->active_on_cpus;
& ~((uint32)1 << cpu); cpuMask.ClearBit(cpu);
if (cpuMask != 0) {
if (!cpuMask.IsEmpty()) {
smp_send_multicast_ici(cpuMask, SMP_MSG_USER_INVALIDATE_PAGES, smp_send_multicast_ici(cpuMask, SMP_MSG_USER_INVALIDATE_PAGES,
0, 0, 0, NULL, SMP_MSG_FLAG_SYNC); 0, 0, 0, NULL, SMP_MSG_FLAG_SYNC);
} }
@@ -132,9 +133,10 @@ ARMVMTranslationMap::Flush()
SMP_MSG_FLAG_SYNC); SMP_MSG_FLAG_SYNC);
} else { } else {
int cpu = smp_get_current_cpu(); int cpu = smp_get_current_cpu();
uint32 cpuMask = PagingStructures()->active_on_cpus CPUSet cpuMask = PagingStructures()->active_on_cpus;
& ~((uint32)1 << cpu); cpuMask.ClearBit(cpu);
if (cpuMask != 0) {
if (!cpuMask.IsEmpty()) {
smp_send_multicast_ici(cpuMask, SMP_MSG_INVALIDATE_PAGE_LIST, smp_send_multicast_ici(cpuMask, SMP_MSG_INVALIDATE_PAGE_LIST,
(addr_t)fInvalidPages, fInvalidPagesCount, 0, NULL, (addr_t)fInvalidPages, fInvalidPagesCount, 0, NULL,
SMP_MSG_FLAG_SYNC); SMP_MSG_FLAG_SYNC);
src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp
+6 -5
View File
@@ -112,7 +112,7 @@ private:
struct page_slot { struct page_slot {
PhysicalPageSlot* slot; PhysicalPageSlot* slot;
phys_addr_t physicalAddress; phys_addr_t physicalAddress;
cpu_mask_t valid; CPUSet valid;
}; };
page_slot fSlots[SLOTS_PER_TRANSLATION_MAP]; page_slot fSlots[SLOTS_PER_TRANSLATION_MAP];
@@ -174,7 +174,7 @@ private:
PhysicalPageSlot* fDebugSlot; PhysicalPageSlot* fDebugSlot;
PhysicalPageSlotPool* fInitialPool; PhysicalPageSlotPool* fInitialPool;
LargeMemoryTranslationMapPhysicalPageMapper fKernelMapper; LargeMemoryTranslationMapPhysicalPageMapper fKernelMapper;
PhysicalPageOpsCPUData fPerCPUData[B_MAX_CPU_COUNT]; PhysicalPageOpsCPUData fPerCPUData[SMP_MAX_CPUS];
}; };
static LargeMemoryPhysicalPageMapper sPhysicalPageMapper; static LargeMemoryPhysicalPageMapper sPhysicalPageMapper;
@@ -396,11 +396,11 @@ LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
page_slot& slot = fSlots[i]; page_slot& slot = fSlots[i];
if (slot.physicalAddress == physicalAddress) { if (slot.physicalAddress == physicalAddress) {
fNextSlot = (i + 1) & (fSlotCount - 1); fNextSlot = (i + 1) & (fSlotCount - 1);
if ((slot.valid & (1 << currentCPU)) == 0) { if (!slot.valid.GetBit(currentCPU)) {
// not valid on this CPU -- invalidate the TLB entry // not valid on this CPU -- invalidate the TLB entry
arch_cpu_invalidate_TLB_range(slot.slot->address, arch_cpu_invalidate_TLB_range(slot.slot->address,
slot.slot->address + B_PAGE_SIZE); slot.slot->address + B_PAGE_SIZE);
slot.valid |= 1 << currentCPU; slot.valid.SetBit(currentCPU);
} }
return (void*)slot.slot->address + off; return (void*)slot.slot->address + off;
} }
@@ -412,7 +412,8 @@ LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
slot.physicalAddress = physicalAddress; slot.physicalAddress = physicalAddress;
slot.slot->Map(physicalAddress); slot.slot->Map(physicalAddress);
slot.valid = 1 << currentCPU; slot.valid.ClearAll();
slot.valid.SetBit(currentCPU);
return (void*)slot.slot->address + off; return (void*)slot.slot->address + off;
} }