arm: enable enforcing memory access permissions

Bootloader:
* set permissions to kernel read/write, no user access
  for initially mapped memory areas
* set permissions to kernel read/write, no execute,
  no user access for UART

Kernel:
* physical memory mapper uses kernel read/write mapping
  with no-execute bit enabled
* all other pages are mapped as read/write/execute for
  kernel and user
* proper access permissions and memory types to be
  implemented later

Enforce memory access permissions by setting DACR to
client mode for domain #0, no access for other domains.

see ARM Architecture Reference Manual, section B3.7 Memory access control
and in particular the following subsections:
B3.7.1 Access permissions
B3.7.2 Execute-never restrictions on instruction fetching
B3.7.3 Domains, Short-descriptor format only

Change-Id: I8127b4c72dc516d013cb9751d80d6f3a9ec835e6
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5233
Reviewed-by: Adrien Destugues <[email protected]>
This commit is contained in:
David Karoly
2022-04-22 12:20:01 +00:00
committed by Fredrik Holmqvist
parent 097f72e92c
commit adc32659fb
4 changed files with 28 additions and 23 deletions
+16 -16
View File
@@ -43,26 +43,26 @@
// found it in the cortex A8 reference... so I set t to 0
// page table must obviously be on multiple of 1KB
/*
* L2-Page descriptors... now things get really complicated...
* there are three different types of pages large pages (64KB) and small(4KB)
* and "small extended".
* only small extende is used by now....
* and there is a new and a old format of page table entries
* I will use the old format...
*/
#define ARM_MMU_L2_TYPE_LARGE 0x1
#define ARM_MMU_L2_TYPE_SMALLNEW 0x2
#define ARM_MMU_L2_TYPE_SMALLEXT 0x3
/* for new format entries (cortex-a8) */
#define ARM_MMU_L2_TYPE_SMALLNEW 0x2
#define ARM_MMU_L2_FLAG_XN 0x001
#define ARM_MMU_L2_FLAG_B 0x004
#define ARM_MMU_L2_FLAG_C 0x008
#define ARM_MMU_L2_FLAG_AP0 0x010
#define ARM_MMU_L2_FLAG_AP1 0x020
#define ARM_MMU_L2_FLAG_TEX0 0x040
#define ARM_MMU_L2_FLAG_TEX1 0x080
#define ARM_MMU_L2_FLAG_TEX2 0x100
#define ARM_MMU_L2_FLAG_AP2 0x200
#define ARM_MMU_L2_FLAG_S 0x400
#define ARM_MMU_L2_FLAG_NG 0x800
// for B C and TEX see ARM arm B4-11
#define ARM_MMU_L2_FLAG_B 0x4
#define ARM_MMU_L2_FLAG_C 0x8
#define ARM_MMU_L2_FLAG_TEX 0 // use 0b000 as TEX
#define ARM_MMU_L2_FLAG_AP_RW 0x30
#define ARM_MMU_L2_FLAG_AP_KRW 0x010
// allow read and write for kernel only
#define ARM_MMU_L2_FLAG_AP_RW 0x030
// allow read and write for user and system
#define ARM_MMU_L1_TABLE_ENTRY_COUNT 4096