arm64: Configure maximum PA size to the maximum supported by the HW.

* If this was set too small by EFI, some MMIO addresses could end up out
  of range and trigger Address Size Faults.

Change-Id: I29280e1f536cfd64c4711b3b702418cd43699278
Reviewed-on: https://review.haiku-os.org/c/haiku/+/8357
Haiku-Format: Haiku-format Bot <[email protected]>
Reviewed-by: Fredrik Holmqvist <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
This commit is contained in:
Owen Anderson
2024-09-22 19:07:36 +00:00
committed by waddlesplash
parent 617be7bcdc
commit add4a0b683
2 changed files with 12 additions and 0 deletions
@@ -189,6 +189,8 @@ static constexpr uint64 TxSZ_MASK = (1 << 6) - 1;
static constexpr uint64 T0SZ_MASK = TxSZ_MASK;
static constexpr uint64 T1SZ_MASK = TxSZ_MASK << TCR_T1SZ_SHIFT;
static constexpr uint64 IPS_MASK = 0x7UL << TCR_IPS_SHIFT;
static constexpr uint64 TCR_EPD1_DISABLE = (1 << 23);
static inline uint32 arch_mmu_user_address_bits()
@@ -122,6 +122,16 @@ void arch_mmu_setup_EL1(uint64 tcr) {
// TODO: Compiler dependency?
tcr |= TCR_T1SZ(__builtin_popcountl(KERNEL_BASE));
// Set the maximum PA size to the maximum supported by the hardware.
uint64_t pa_size = READ_SPECIALREG(ID_AA64MMFR0_EL1) & ID_AA64MMFR0_PA_RANGE_MASK;
// PA size of 4 petabytes required 64KB paging granules, which
// we don't support, so clamp the maximum to 256 terabytes.
if (pa_size == ID_AA64MMFR0_PA_RANGE_4P)
pa_size = ID_AA64MMFR0_PA_RANGE_256T;
tcr &= ~IPS_MASK;
tcr |= pa_size << TCR_IPS_SHIFT;
// Flush the cache so that we don't receive unexpected writebacks later.
_arch_cache_clean_poc();