updates for NM2097 and NM2160 acc (not ready yet)
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7046 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -3,7 +3,7 @@
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This file may be used under the terms of the Be Sample Code License.
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Other authors:
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Rudolf Cornelissen 10/2002-4/2003
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Rudolf Cornelissen 10/2002-3/2004
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*/
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#define MODULE_BIT 0x08000000
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@@ -112,12 +112,12 @@ void * get_accelerant_hook(uint32 feature, void *data)
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/* only export 2D acceleration functions in modes that are capable of it */
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/* used by the app_server and applications (BWindowScreen) */
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CHKA(SCREEN_TO_SCREEN_BLIT);
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CHKA(FILL_RECTANGLE);
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CHKA(INVERT_RECTANGLE);
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CHKA(FILL_SPAN);
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// CHKA(FILL_RECTANGLE);
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// CHKA(INVERT_RECTANGLE);
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// CHKA(FILL_SPAN);
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/* not (yet) used by the app_server:
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* so just for application use (BWindowScreen) */
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CHKA(SCREEN_TO_SCREEN_TRANSPARENT_BLIT);
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// CHKA(SCREEN_TO_SCREEN_TRANSPARENT_BLIT);
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//CHKA(SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT;
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}
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@@ -1,7 +1,7 @@
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/* nm Acceleration functions */
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/* Authors:
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Mark Watson 2/2000,
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Rudolf Cornelissen 10/2002-8/2003.
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/* Author:
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Rudolf Cornelissen 3/2004.
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*/
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#define MODULE_BIT 0x00080000
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@@ -17,27 +17,16 @@ invert rectangle
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blit
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*/
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/* G100 pre SRCORG/DSTORG registers */
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static uint32 src_dst;
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/* MIL1/2 adress linearisation does not always work */
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static uint8 y_lin;
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static uint8 depth;
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/* needed by MIL 1/2 because of adress linearisation constraints */
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#define ACCW_YDSTLEN(dst, len) do { \
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if (y_lin) { \
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ACCW(YDST,((dst)* (si->fbc.bytes_per_row / (depth >> 3))) >> 5); \
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ACCW(LEN,len); \
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} else ACCW(YDSTLEN,((dst)<<16)|(len)); \
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} while (0)
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//fixme: acc setup for NM2097 and NM2160 only for now...
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status_t nm_acc_wait_idle()
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{
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// volatile int i;
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// while (ACCR(STATUS)&(1<<16))
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// {
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// for (i=0;i<10000;i++); /*spin in place so I do not hammer the bus*/
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// };
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/* wait until engine completely idle */
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while (ACCR(STATUS) & 0x00000001)
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{
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/* snooze a bit so I do not hammer the bus */
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snooze (100);
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}
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return B_OK;
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}
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@@ -45,172 +34,84 @@ status_t nm_acc_wait_idle()
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* Engine required init. */
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status_t nm_acc_init()
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{
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/* used for convenience: MACCESS is a write only register! */
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uint32 maccess = 0x00000000;
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/* preset using hardware adress linearisation */
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y_lin = 0x00;
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/* reset depth */
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depth = 0;
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/* cleanup bitblt */
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ACCW(OPMODE,0);
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/* Set the Z origin to the start of FB (otherwise lockup on blits) */
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ACCW(ZORG,0);
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uint32 depth;
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/* Set pixel width */
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switch(si->dm.space)
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{
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case B_CMAP8:
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ACCW(MACCESS, ((maccess & 0xfffffffc) | 0x00));
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depth = 8;
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/* b8-9 determine engine colordepth */
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si->engine.control = (1 << 8);
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// nAcl->ColorShiftAmt = 8;
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depth = 1;
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break;
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case B_RGB15_LITTLE:case B_RGB16_LITTLE:
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ACCW(MACCESS, ((maccess & 0xfffffffc) | 0x01));
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depth = 16;
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break;
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case B_RGB32_LITTLE:case B_RGBA32_LITTLE:
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ACCW(MACCESS, ((maccess & 0xfffffffc) | 0x02));
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depth = 32;
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/* b8-9 determine engine colordepth */
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si->engine.control = (2 << 8);
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// nAcl->ColorShiftAmt = 0;
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depth = 2;
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break;
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case B_RGB24_LITTLE:
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/* no acceleration supported on NM2097 and NM2160 */
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default:
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LOG(8,("ACC: init, invalid bit depth\n"));
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return B_ERROR;
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}
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/* setup PITCH: very cardtype specific! */
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switch (si->ps.card_type)
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/* setup memory pitch (b10-12):
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* this works with a table, there are very few fixed settings.. */
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switch(si->fbc.bytes_per_row / depth)
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{
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case G100:
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/* always using hardware adress linearisation, because 2D/3D
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* engine works on every pitch multiple of 32 */
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ACCW(PITCH, ((si->fbc.bytes_per_row / (depth >> 3)) & 0x0FFF));
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case 640:
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si->engine.control |= (2 << 10);
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break;
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default:
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/* G200 and up are equal.. */
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/* always using hardware adress linearisation, because 2D/3D
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* engine works on every pitch multiple of 32 */
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ACCW(PITCH, ((si->fbc.bytes_per_row / (depth >> 3)) & 0x1FFF));
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case 800:
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si->engine.control |= (3 << 10);
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break;
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case 1024:
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si->engine.control |= (4 << 10);
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break;
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case 1152:
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si->engine.control |= (5 << 10);
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break;
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case 1280:
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si->engine.control |= (6 << 10);
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break;
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case 1600:
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si->engine.control |= (7 << 10);
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break;
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}
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/* disable plane write mask (needed for SDRAM): actual change needed to get it sent to RAM */
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ACCW(PLNWT,0x00000000);
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ACCW(PLNWT,0xffffffff);
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if (si->ps.card_type >= G200) {
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/*DSTORG - location of active screen in framebuffer*/
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ACCW(DSTORG,((uint8*)si->fbc.frame_buffer) - ((uint8*)si->framebuffer));
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/*SRCORG - init source address - same as dest*/
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ACCW(SRCORG,((uint8*)si->fbc.frame_buffer) - ((uint8*)si->framebuffer));
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}
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/* init YDSTORG - apsed, if not inited, BitBlts may fails on <= G200 */
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src_dst = 0;
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ACCW(YDSTORG, src_dst);
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/* <= G100 uses this register as SRCORG/DSTORG replacement, but
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* MIL 1/2 does not need framebuffer space for the hardcursor! */
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if ((si->ps.card_type == G100) && (si->settings.hardcursor))
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{
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switch (si->dm.space)
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{
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case B_CMAP8:
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src_dst = 1024 / 1;
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break;
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case B_RGB15_LITTLE:
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case B_RGB16_LITTLE:
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src_dst = 1024 / 2;
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break;
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case B_RGB32_LITTLE:
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src_dst = 1024 / 4;
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break;
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default:
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LOG(8,("ACC: G100 hardcursor not supported for current colorspace\n"));
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return B_ERROR;
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}
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}
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ACCW(YDSTORG,src_dst);
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/* clipping */
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/* i.e. highest and lowest X pixel adresses */
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ACCW(CXBNDRY,(((si->fbc.bytes_per_row / (depth >> 3)) - 1) << 16) | (0));
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/* Y pixel addresses must be linear */
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/* lowest adress */
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ACCW(YTOP, 0 + src_dst);
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/* highest adress */
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ACCW(YBOT,((si->dm.virtual_height - 1) *
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(si->fbc.bytes_per_row / (depth >> 3))) + src_dst);
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/* fixme?: setup clipping */
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return B_OK;
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}
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/* screen to screen blit - i.e. move windows around.
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* Engine function bitblit, paragraph 4.5.7.2 */
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/* screen to screen blit - i.e. move windows around and scroll within them. */
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status_t nm_acc_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16 w,uint16 h)
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{
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uint32 t_start,t_end,offset;
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uint32 b_start,b_end;
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/*find where the top,bottom and offset are*/
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offset = (si->fbc.bytes_per_row / (depth >> 3));
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/* make sure the previous command (if any) is completed */
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nm_acc_wait_idle();
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t_end = t_start = xs + (offset*ys) + src_dst;
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t_end += w;
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b_end = b_start = xs + (offset*(ys+h)) + src_dst;
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b_end +=w;
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/* sgnzero bit _must_ be '0' before accessing SGN! */
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ACCW(DWGCTL,0x00000000);
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/*find which quadrant */
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switch((yd>ys)|((xd>xs)<<1))
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{
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case 0: /*L->R,down*/
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ACCW(SGN,0);
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ACCW(AR3,t_start);
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ACCW(AR0,t_end);
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ACCW(AR5,offset);
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ACCW_YDSTLEN(yd,h+1);
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break;
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case 1: /*L->R,up*/
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ACCW(SGN,4);
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ACCW(AR3,b_start);
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ACCW(AR0,b_end);
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ACCW(AR5,-offset);
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ACCW_YDSTLEN(yd+h,h+1);
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break;
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case 2: /*R->L,down*/
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ACCW(SGN,1);
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ACCW(AR3,t_end);
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ACCW(AR0,t_start);
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ACCW(AR5,offset);
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ACCW_YDSTLEN(yd,h+1);
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break;
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case 3: /*R->L,up*/
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ACCW(SGN,5);
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ACCW(AR3,b_end);
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ACCW(AR0,b_start);
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ACCW(AR5,-offset);
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ACCW_YDSTLEN(yd+h,h+1);
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break;
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if ((yd < ys) || ((yd == ys) && (xd < xs)))
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{
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/* start with upper left corner */
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ACCW(BLTCNTL, si->engine.control);
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ACCW(SRCSTARTOFF, ((ys << 16) | (xs & 0x0000ffff)));
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ACCW(DSTSTARTOFF, ((yd << 16) | (xd & 0x0000ffff)));
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ACCW(XYEXT, ((h << 16) | (w & 0x0000ffff)));
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}
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else
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{
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/* start with lower right corner */
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ACCW(BLTCNTL, (si->engine.control | 0x00000013));
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ACCW(SRCSTARTOFF, (((ys + (h - 1)) << 16) | ((xs + (w - 1)) & 0x0000ffff)));
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ACCW(DSTSTARTOFF, (((yd + (h - 1)) << 16) | ((xd + (w - 1)) & 0x0000ffff)));
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ACCW(XYEXT, ((h << 16) | (w & 0x0000ffff)));
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}
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ACCW(FXBNDRY,((xd+w)<<16)|xd);
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/*do the blit*/
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ACCGO(DWGCTL,0x040C4018); // atype RSTR
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return B_OK;
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}
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@@ -225,63 +126,63 @@ status_t nm_acc_transparent_blit(uint16 xs,uint16 ys,uint16 xd,uint16 yd,uint16
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return B_ERROR;
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/*find where the top,bottom and offset are*/
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offset = (si->fbc.bytes_per_row / (depth >> 3));
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// offset = (si->fbc.bytes_per_row / (depth >> 3));
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t_end = t_start = xs + (offset*ys) + src_dst;
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// t_end = t_start = xs + (offset*ys) + src_dst;
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t_end += w;
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b_end = b_start = xs + (offset*(ys+h)) + src_dst;
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// b_end = b_start = xs + (offset*(ys+h)) + src_dst;
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b_end +=w;
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/* sgnzero bit _must_ be '0' before accessing SGN! */
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ACCW(DWGCTL,0x00000000);
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// ACCW(DWGCTL,0x00000000);
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/*find which quadrant */
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switch((yd>ys)|((xd>xs)<<1))
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{
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case 0: /*L->R,down*/
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ACCW(SGN,0);
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// ACCW(SGN,0);
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ACCW(AR3,t_start);
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ACCW(AR0,t_end);
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ACCW(AR5,offset);
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// ACCW(AR3,t_start);
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// ACCW(AR0,t_end);
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// ACCW(AR5,offset);
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ACCW_YDSTLEN(yd,h+1);
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// ACCW_YDSTLEN(yd,h+1);
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break;
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case 1: /*L->R,up*/
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ACCW(SGN,4);
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// ACCW(SGN,4);
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ACCW(AR3,b_start);
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ACCW(AR0,b_end);
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ACCW(AR5,-offset);
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// ACCW(AR3,b_start);
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// ACCW(AR0,b_end);
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// ACCW(AR5,-offset);
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ACCW_YDSTLEN(yd+h,h+1);
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// ACCW_YDSTLEN(yd+h,h+1);
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break;
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case 2: /*R->L,down*/
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ACCW(SGN,1);
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// ACCW(SGN,1);
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ACCW(AR3,t_end);
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ACCW(AR0,t_start);
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ACCW(AR5,offset);
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// ACCW(AR3,t_end);
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// ACCW(AR0,t_start);
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// ACCW(AR5,offset);
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ACCW_YDSTLEN(yd,h+1);
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// ACCW_YDSTLEN(yd,h+1);
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break;
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case 3: /*R->L,up*/
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ACCW(SGN,5);
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// ACCW(SGN,5);
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ACCW(AR3,b_end);
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ACCW(AR0,b_start);
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ACCW(AR5,-offset);
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// ACCW(AR3,b_end);
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// ACCW(AR0,b_start);
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// ACCW(AR5,-offset);
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ACCW_YDSTLEN(yd+h,h+1);
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// ACCW_YDSTLEN(yd+h,h+1);
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break;
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}
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ACCW(FXBNDRY,((xd+w)<<16)|xd);
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// ACCW(FXBNDRY,((xd+w)<<16)|xd);
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/*do the blit*/
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ACCW(FCOL,colour);
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ACCW(BCOL,0xffffffff);
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ACCGO(DWGCTL,0x440C4018); // atype RSTR
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// ACCW(FCOL,colour);
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// ACCW(BCOL,0xffffffff);
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// ACCGO(DWGCTL,0x440C4018); // atype RSTR
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return B_OK;
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}
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@@ -298,20 +199,20 @@ status_t nm_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32 col)
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FCOL - foreground colour a
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*/
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ACCW(FXBNDRY,(xe<<16)|xs); /*set x start and end*/
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ACCW_YDSTLEN(ys,yl); /*set y start and length*/
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ACCW(FCOL,col); /*set colour*/
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// ACCW(FXBNDRY,(xe<<16)|xs); /*set x start and end*/
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// ACCW_YDSTLEN(ys,yl); /*set y start and length*/
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// ACCW(FCOL,col); /*set colour*/
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//acc fixme: checkout blockmode constraints for G100+ (mil: nc?): also add blockmode
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// for other functions, and use fastblt on MIL1/2 if possible...
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//or is CMAP8 contraint a non-blockmode contraint? (linearisation problem maybe?)
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if (si->dm.space==B_CMAP8)
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{
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ACCGO(DWGCTL,0x400C7814); // atype RSTR
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// ACCGO(DWGCTL,0x400C7814); // atype RSTR
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}
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else
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{
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ACCGO(DWGCTL,0x400C7844); // atype BLK
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// ACCGO(DWGCTL,0x400C7844); // atype BLK
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}
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return B_OK;
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}
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@@ -329,12 +230,12 @@ status_t nm_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl,uint32
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FCOL - foreground colour a
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*/
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ACCW(FXBNDRY,(xe<<16)|xs); /*set x start and end*/
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ACCW_YDSTLEN(ys,yl); /*set y start and length*/
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ACCW(FCOL,col); /*set colour*/
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// ACCW(FXBNDRY,(xe<<16)|xs); /*set x start and end*/
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// ACCW_YDSTLEN(ys,yl); /*set y start and length*/
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// ACCW(FCOL,col); /*set colour*/
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/*draw it! top nibble is c is clipping enabled*/
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ACCGO(DWGCTL,0x40057814); // atype RSTR
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// ACCGO(DWGCTL,0x40057814); // atype RSTR
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return B_OK;
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}
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