NV11 panel update; widescreen panel aspect programming added
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7003 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -228,8 +228,10 @@ typedef struct {
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bool tmds2_active; /* found panel on CRTC2 that is active */
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bool tmds2_active; /* found panel on CRTC2 that is active */
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uint16 panel1_width; /* native horizontal resolution for digital panels */
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uint16 panel1_width; /* native horizontal resolution for digital panels */
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uint16 panel1_height; /* navive vertical resolution for digital panels */
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uint16 panel1_height; /* navive vertical resolution for digital panels */
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float panel1_aspect; /* panel's aspect ratio */
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uint16 panel2_width; /* native horizontal resolution for digital panels */
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uint16 panel2_width; /* native horizontal resolution for digital panels */
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uint16 panel2_height; /* navive vertical resolution for digital panels */
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uint16 panel2_height; /* navive vertical resolution for digital panels */
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float panel2_aspect; /* panel's aspect ratio */
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uint32 tvout_chip_type; /* see tvchip_type enum above */
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uint32 tvout_chip_type; /* see tvchip_type enum above */
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status_t pins_status; /* B_OK if read correctly, B_ERROR if faked */
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status_t pins_status; /* B_OK if read correctly, B_ERROR if faked */
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@@ -111,9 +111,11 @@ status_t nv_crtc_set_timing(display_mode target)
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LOG(2,("CRTC: DFP active: tuning modeline\n"));
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LOG(2,("CRTC: DFP active: tuning modeline\n"));
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/* horizontal timing */
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/* horizontal timing */
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target.timing.h_total = target.timing.h_display + 128;
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//fixme (?): maybe we need real modeline calculations here...
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target.timing.h_sync_start = target.timing.h_total - 112;
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//testing (640x480): total = 135% is too much, 120% to small...
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target.timing.h_sync_end = target.timing.h_total - 16;
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target.timing.h_total = target.timing.h_display + 160;//128
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target.timing.h_sync_start = target.timing.h_total - 144;//112
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target.timing.h_sync_end = target.timing.h_total - 48;//16
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/* vertical timing */
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/* vertical timing */
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target.timing.v_total = target.timing.v_display + 6;
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target.timing.v_total = target.timing.v_display + 6;
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@@ -261,7 +263,6 @@ status_t nv_crtc_set_timing(display_mode target)
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{
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{
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uint32 iscale_x, iscale_y;
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uint32 iscale_x, iscale_y;
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//fixme: checkout upscaling and aspect!!!
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/* calculate needed inverse scaling factors in 20.12 format */
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/* calculate needed inverse scaling factors in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width);
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height);
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@@ -271,7 +272,7 @@ status_t nv_crtc_set_timing(display_mode target)
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CRTCW(FP_VTIMING, 0);
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CRTCW(FP_VTIMING, 0);
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/* nVidia cards support upscaling except on NV11 */
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/* nVidia cards support upscaling except on NV11 */
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if (si->ps.card_arch == NV11)
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if (si->ps.card_type == NV11)
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{
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{
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/* disable last fetched line limiting */
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/* disable last fetched line limiting */
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DACW(FP_DEBUG2, 0x00000000);
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DACW(FP_DEBUG2, 0x00000000);
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@@ -291,22 +292,44 @@ status_t nv_crtc_set_timing(display_mode target)
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{
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{
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LOG(2,("CRTC: GPU scales for DFP if needed\n"));
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LOG(2,("CRTC: GPU scales for DFP if needed\n"));
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/* GPU scaling is automatically setup by hardware */
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//fixme: checkout non 4:3 aspect scaling.
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// DACW(FP_DEBUG3, (iscale_x & 0x00001fff) | ((iscale_y & 0x00001fff) << 16));
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// temp = (((iscale_x >> 1) & 0x00000fff) | (((iscale_y >> 1) & 0x00000fff) << 16));
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// DACW(FP_DEBUG1, (temp | (1 << 12) | (1 << 28)));
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/* limit last fetched line if vertical scaling is done */
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/* limit last fetched line if vertical scaling is done */
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if (iscale_y != (1 << 12))
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if (iscale_y != (1 << 12))
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DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
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DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
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//not needed apparantly:
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// ((1 << 12) | ((target.timing.h_display - 1) << 0)));
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else
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else
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DACW(FP_DEBUG2, 0x00000000);
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DACW(FP_DEBUG2, 0x00000000);
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/* inform panel not to scale */
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/* inform panel not to scale */
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DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));
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DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));
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/* disable GPU scaling testmode so automatic scaling is done */
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DACW(FP_DEBUG1, 0);
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/* GPU scaling is automatically setup by hardware, so only modify this
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* scalingfactor for non 4:3 (1.33) aspect panels;
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* let's consider 1280x1024 1:33 aspect (it's 1.25 aspect actually!) */
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/* correct for landscape non 4:3 aspect panels... */
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/* known non 4:3 aspect panels:
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* 1280 x 800 (1.60),
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* 1440 x 900 (1.60),
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* 1680 x 1050 (1.60). */
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/* known 4:3 aspect non-standard resolution panels:
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* 1400 x 1050 (1.33). */
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if ((iscale_x != (1 << 12)) && (si->ps.panel1_aspect > 1.34))
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{
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LOG(2,("CRTC: non 4:3 aspect landscape panel: tuning horizontal scaling\n"));
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/* X-scaling should be the same as Y-scaling,
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* except for 1280 x 1024 panels(!) */
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iscale_x = iscale_y * (1.33333333 / si->ps.panel1_aspect);
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/* enable testmode (b12) and program new X-scaling factor */
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DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));
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}
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/* correct for portrait panels... */
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if ((iscale_y != (1 << 12)) && (si->ps.panel1_aspect < 1.25))
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{
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LOG(2,("CRTC: portrait aspect panel: should tune vertical scaling\n"));
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/* fixme?: implement... */
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}
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}
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}
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/* do some logging.. */
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/* do some logging.. */
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@@ -97,9 +97,11 @@ status_t nv_crtc2_set_timing(display_mode target)
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LOG(2,("CRTC2: DFP active: tuning modeline\n"));
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LOG(2,("CRTC2: DFP active: tuning modeline\n"));
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/* horizontal timing */
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/* horizontal timing */
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target.timing.h_total = target.timing.h_display + 128;
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//fixme (?): maybe we need real modeline calculations here...
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target.timing.h_sync_start = target.timing.h_total - 112;
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//testing (640x480): total = 135% is too much, 120% to small...
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target.timing.h_sync_end = target.timing.h_total - 16;
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target.timing.h_total = target.timing.h_display + 160;//128
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target.timing.h_sync_start = target.timing.h_total - 144;//112
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target.timing.h_sync_end = target.timing.h_total - 48;//16
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/* vertical timing */
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/* vertical timing */
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target.timing.v_total = target.timing.v_display + 6;
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target.timing.v_total = target.timing.v_display + 6;
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@@ -244,7 +246,6 @@ status_t nv_crtc2_set_timing(display_mode target)
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{
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{
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uint32 iscale_x, iscale_y;
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uint32 iscale_x, iscale_y;
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//fixme: checkout upscaling and aspect!!!
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/* calculate needed inverse scaling factors in 20.12 format */
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/* calculate needed inverse scaling factors in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width);
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height);
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@@ -254,7 +255,7 @@ status_t nv_crtc2_set_timing(display_mode target)
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CRTC2W(FP_VTIMING, 0);
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CRTC2W(FP_VTIMING, 0);
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/* nVidia cards support upscaling except on NV11 */
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/* nVidia cards support upscaling except on NV11 */
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if (si->ps.card_arch == NV11)
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if (si->ps.card_type == NV11)
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{
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{
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/* disable last fetched line limiting */
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/* disable last fetched line limiting */
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DAC2W(FP_DEBUG2, 0x00000000);
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DAC2W(FP_DEBUG2, 0x00000000);
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@@ -274,22 +275,44 @@ status_t nv_crtc2_set_timing(display_mode target)
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{
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{
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LOG(2,("CRTC2: GPU scales for DFP if needed\n"));
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LOG(2,("CRTC2: GPU scales for DFP if needed\n"));
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/* GPU scaling is automatically setup by hardware */
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//fixme: checkout non 4:3 aspect scaling.
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// DAC2W(FP_DEBUG3, (iscale_x & 0x00001fff) | ((iscale_y & 0x00001fff) << 16));
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// temp = (((iscale_x >> 1) & 0x00000fff) | (((iscale_y >> 1) & 0x00000fff) << 16));
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// DAC2W(FP_DEBUG1, (temp | (1 << 12) | (1 << 28)));
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/* limit last fetched line if vertical scaling is done */
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/* limit last fetched line if vertical scaling is done */
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if (iscale_y != (1 << 12))
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if (iscale_y != (1 << 12))
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DAC2W(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
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DAC2W(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
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//not needed apparantly:
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// ((1 << 12) | ((target.timing.h_display - 1) << 0)));
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else
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else
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DAC2W(FP_DEBUG2, 0x00000000);
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DAC2W(FP_DEBUG2, 0x00000000);
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/* inform panel not to scale */
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/* inform panel not to scale */
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DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
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DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
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/* disable GPU scaling testmode so automatic scaling is done */
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DAC2W(FP_DEBUG1, 0);
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/* GPU scaling is automatically setup by hardware, so only modify this
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* scalingfactor for non 4:3 (1.33) aspect panels;
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* let's consider 1280x1024 1:33 aspect (it's 1.25 aspect actually!) */
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/* correct for landscape non 4:3 aspect panels... */
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/* known non 4:3 aspect panels:
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* 1280 x 800 (1.60),
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* 1440 x 900 (1.60),
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* 1680 x 1050 (1.60). */
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/* known 4:3 aspect non-standard resolution panels:
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* 1400 x 1050 (1.33). */
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if ((iscale_x != (1 << 12)) && (si->ps.panel2_aspect > 1.34))
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{
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LOG(2,("CRTC2: non 4:3 aspect landscape panel: tuning horizontal scaling\n"));
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/* X-scaling should be the same as Y-scaling,
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* except for 1280 x 1024 panels(!) */
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iscale_x = iscale_y * (1.33333333 / si->ps.panel2_aspect);
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/* enable testmode (b12) and program new X-scaling factor */
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DAC2W(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));
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}
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/* correct for portrait panels... */
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if ((iscale_y != (1 << 12)) && (si->ps.panel2_aspect < 1.25))
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{
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LOG(2,("CRTC2: portrait aspect panel: should tune vertical scaling\n"));
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/* fixme?: implement... */
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}
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}
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}
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/* do some logging.. */
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/* do some logging.. */
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@@ -80,7 +80,7 @@ status_t nv_general_powerup()
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{
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{
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status_t status;
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status_t status;
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-6 running.\n"));
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-7 running.\n"));
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/* preset no laptop */
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/* preset no laptop */
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si->ps.laptop = false;
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si->ps.laptop = false;
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@@ -296,8 +296,10 @@ static void detect_panels()
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/* do some presets */
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/* do some presets */
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si->ps.panel1_width = 0;
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si->ps.panel1_width = 0;
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si->ps.panel1_height = 0;
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si->ps.panel1_height = 0;
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si->ps.panel1_aspect = 0;
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si->ps.panel2_width = 0;
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si->ps.panel2_width = 0;
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si->ps.panel2_height = 0;
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si->ps.panel2_height = 0;
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si->ps.panel2_aspect = 0;
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si->ps.slaved_tmds1 = false;
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si->ps.slaved_tmds1 = false;
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si->ps.slaved_tmds2 = false;
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si->ps.slaved_tmds2 = false;
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si->ps.master_tmds1 = false;
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si->ps.master_tmds1 = false;
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@@ -324,7 +326,7 @@ static void detect_panels()
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si->ps.panel1_height = height;
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si->ps.panel1_height = height;
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}
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}
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}
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}
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if ((si->ps.card_arch != NV11) &&
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if ((si->ps.card_type != NV11) &&
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si->ps.secondary_head && slaved_for_dev2 && !tvout2)
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si->ps.secondary_head && slaved_for_dev2 && !tvout2)
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{
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{
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uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
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uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
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@@ -349,7 +351,7 @@ static void detect_panels()
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si->ps.panel1_height = height;
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si->ps.panel1_height = height;
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}
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}
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}
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}
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if ((si->ps.card_arch != NV11) &&
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if ((si->ps.card_type != NV11) &&
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si->ps.secondary_head && !si->ps.slaved_tmds2 && !tvout2)
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si->ps.secondary_head && !si->ps.slaved_tmds2 && !tvout2)
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{
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{
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uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
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uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
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@@ -364,6 +366,12 @@ static void detect_panels()
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}
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}
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}
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}
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/* determine panel(s) aspect ratio(s) */
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if (si->ps.tmds1_active)
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si->ps.panel1_aspect = (si->ps.panel1_width / ((float)si->ps.panel1_height));
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if (si->ps.tmds2_active)
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si->ps.panel2_aspect = (si->ps.panel2_width / ((float)si->ps.panel2_height));
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/* dump some panel configuration registers... */
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/* dump some panel configuration registers... */
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LOG(2,("INFO: Dumping flatpanel registers:\n"));
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LOG(2,("INFO: Dumping flatpanel registers:\n"));
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LOG(2,("DAC1: FP_HDISPEND: $%08x = (dec) %d\n", DACR(FP_HDISPEND),DACR(FP_HDISPEND)));
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LOG(2,("DAC1: FP_HDISPEND: $%08x = (dec) %d\n", DACR(FP_HDISPEND),DACR(FP_HDISPEND)));
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@@ -864,15 +872,15 @@ void dump_pins(void)
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{
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{
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LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is "));
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LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is "));
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if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n"));
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if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n"));
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LOG(2,("panel width: %d, height: %d\n",
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LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
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si->ps.panel1_width, si->ps.panel1_height));
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si->ps.panel1_width, si->ps.panel1_height, si->ps.panel1_aspect));
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}
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}
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if (si->ps.tmds2_active)
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if (si->ps.tmds2_active)
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{
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{
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LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is "));
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LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is "));
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if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n"));
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if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n"));
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LOG(2,("panel width: %d, height: %d\n",
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LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
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si->ps.panel2_width, si->ps.panel2_height));
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si->ps.panel2_width, si->ps.panel2_height, si->ps.panel2_aspect));
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}
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}
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LOG(2,("INFO: end pinsdump.\n"));
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LOG(2,("INFO: end pinsdump.\n"));
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}
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}
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@@ -4,13 +4,14 @@
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</head>
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</head>
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<body>
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<body>
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<p><h2>Changes done for each driverversion:</h2></p>
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<p><h2>Changes done for each driverversion:</h2></p>
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<p><h1>head (0.10-6), (Rudolf)</h1></p>
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<p><h1>head (0.10-7), (Rudolf)</h1></p>
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<ul>
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<ul>
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||||||
<li>Implemented laptop internal flatpanel presence and native resolution detection;
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<li>Implemented laptop internal flatpanel presence and native resolution detection;
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||||||
<li>Implemented external DVI flatpanel(s) presence and native resolution detection;
|
<li>Implemented external DVI flatpanel(s) presence and native resolution detection;
|
||||||
<li>Added flatpanel(s) refreshrate protection: it(they) is(are) always kept at 60Hz refresh;
|
<li>Added flatpanel(s) refreshrate protection: it(they) is(are) always kept at 60Hz refresh;
|
||||||
<li>Added flatpanel specific CRTC modeline and DFP modeline tuning: DVI connected panels work now on both heads (if applicable);
|
<li>Added flatpanel specific CRTC modeline and DFP modeline tuning: DVI connected panels work now on both heads (if applicable);
|
||||||
<li>Fixed fullscreen overlay on DVI panels;
|
<li>Fixed fullscreen overlay on DVI panels;
|
||||||
|
<li>Added aspect correction programming for widescreen panels;
|
||||||
<li>Fixed acceleration engine management regarding sync_to_token: no more updating glitches should occur now.
|
<li>Fixed acceleration engine management regarding sync_to_token: no more updating glitches should occur now.
|
||||||
</ul>
|
</ul>
|
||||||
NOTE:<br>
|
NOTE:<br>
|
||||||
|
|||||||
Reference in New Issue
Block a user