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xhci: Use 64-bit pci addresses when requested

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* My skylake requests 64-bit addressing.. so I think
  Intel might start leveraging this soon.
* Hopefully won't break any builds, might have to wrap
  that << 32 shift if phys_addr_t is 32-bits anywhere.
This commit is contained in:
Alexander von Gluck IV
2016-11-02 10:08:05 -05:00
parent 12431ebff4
commit c6bd5d1ea5
1 changed files with 15 additions and 9 deletions
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src/add-ons/kernel/busses/usb/xhci.cpp
+15 -9
View File
@@ -153,19 +153,25 @@ XHCI::XHCI(pci_info *info, Stack *stack)
sPCIModule->write_pci_config(fPCIInfo->bus, fPCIInfo->device,
fPCIInfo->function, PCI_command, 2, command);
// map the registers
uint32 offset = fPCIInfo->u.h0.base_registers[0] & (B_PAGE_SIZE - 1);
phys_addr_t physicalAddress = fPCIInfo->u.h0.base_registers[0] - offset;
size_t mapSize = (fPCIInfo->u.h0.base_register_sizes[0] + offset
+ B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
// map the registers (low + high for 64-bit when requested)
phys_addr_t physicalAddress = fPCIInfo->u.h0.base_registers[0];
physicalAddress &= PCI_address_memory_32_mask;
if ((fPCIInfo->u.h0.base_register_flags[0] & 0xC) == PCI_address_type_64)
physicalAddress += (phys_addr_t)fPCIInfo->u.h0.base_registers[1] << 32;
TRACE("map physical memory 0x%08" B_PRIx32 " (base: 0x%08" B_PRIxPHYSADDR
"; offset: %" B_PRIx32 "); size: %" B_PRId32 "\n",
fPCIInfo->u.h0.base_registers[0], physicalAddress, offset,
uint32 offset = physicalAddress & (B_PAGE_SIZE - 1);
phys_addr_t physicalAddressAligned = physicalAddress - offset;
size_t mapSize = (fPCIInfo->u.h0.base_register_sizes[0]
+ offset + B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
TRACE("map physical memory 0x%08" B_PRIx32 " : 0x%08" B_PRIx32 " "
"(base: 0x%08" B_PRIxPHYSADDR "; offset: %" B_PRIx32 ");"
"size: %" B_PRId32 "\n", fPCIInfo->u.h0.base_registers[0],
fPCIInfo->u.h0.base_registers[1], physicalAddress, offset,
fPCIInfo->u.h0.base_register_sizes[0]);
fRegisterArea = map_physical_memory("XHCI memory mapped registers",
physicalAddress, mapSize, B_ANY_KERNEL_BLOCK_ADDRESS,
physicalAddressAligned, mapSize, B_ANY_KERNEL_BLOCK_ADDRESS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_READ_AREA | B_WRITE_AREA,
(void **)&fCapabilityRegisters);
if (fRegisterArea < B_OK) {