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Matrox: fix 64bit warnings.

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This commit is contained in:
Adrien Destugues
2014-10-19 12:51:51 +00:00
parent 13af65c402
commit c8113d4d63
5 changed files with 176 additions and 161 deletions
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src/add-ons/accelerants/matrox/Overlay.c
+25 -25
View File
@@ -67,7 +67,7 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space)
{
default:
/* fixme: for now 'direct 32bit' desktop colorspace assumed */
return
return
( B_OVERLAY_KEYING_USES_ALPHA |
B_OVERLAY_COLOR_KEY |
B_OVERLAY_HORIZONTAL_FILTERING |
@@ -75,19 +75,20 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space)
}
}
const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint16 height)
{
int offset = 0; /* used to determine next buffer to create */
uint32 adress, adress2, temp32; /* used to calculate buffer adresses */
uintptr_t adress, adress2, temp32; /* used to calculate buffer adresses */
uint32 oldsize = 0; /* used to 'squeeze' new buffers between already existing ones */
int cnt; /* loopcounter */
/* acquire the shared benaphore */
AQUIRE_BEN(si->overlay.lock)
LOG(4,("Overlay: cardRAM_start = $%08x\n",(uint32)((uint8*)si->framebuffer)));
LOG(4,("Overlay: cardRAM_start_DMA = $%08x\n",(uint32)((uint8*)si->framebuffer_pci)));
LOG(4,("Overlay: cardRAM_size = %dMb\n",si->ps.memory_size));
LOG(4, ("Overlay: cardRAM_start = $%p\n", (uint8*)si->framebuffer));
LOG(4, ("Overlay: cardRAM_start_DMA = $%p\n", (uint8*)si->framebuffer_pci));
LOG(4, ("Overlay: cardRAM_size = %dMb\n", si->ps.memory_size));
/* find first empty slot (room for another buffer?) */
for (offset = 0; offset < MAXBUFFERS; offset++)
@@ -95,7 +96,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
if (si->overlay.myBuffer[offset].buffer == NULL) break;
}
LOG(4,("Overlay: Allocate_buffer offset = %d\n",offset));
LOG(4, ("Overlay: Allocate_buffer offset = %d\n", offset));
if (offset < MAXBUFFERS)
/* setup new scaler input buffer */
@@ -237,22 +238,22 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
/* Another NOTE for app programmers:
* A *positive* side-effect of assigning the first overlay buffer exactly at the end of the
* cardRAM is that apps that try to write beyond the buffer's space get a segfault immediately.
* This *greatly* simplifies tracking such errors!
* This *greatly* simplifies tracking such errors!
* Of course such errors may lead to strange effects in the app or driver behaviour if they are
* not hunted down and removed.. */
/* calculate first free RAM adress in card:
* Driver setup is as follows:
* Driver setup is as follows:
* card base: - hardware cursor bitmap (if used),
* directly above - screen memory for both heads */
adress2 = (((uint32)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */
adress2 = (((uintptr_t)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */
(si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */
LOG(4,("Overlay: first free cardRAM virtual adress $%08x\n", adress2));
LOG(4, ("Overlay: first free cardRAM virtual adress $%08x\n", adress2));
/* calculate 'preliminary' buffer size including slopspace */
oldsize = si->overlay.myBufInfo[offset].size;
si->overlay.myBufInfo[offset].size =
si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
si->overlay.myBufInfo[offset].size
= si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
/* calculate virtual memory adress that would be needed for a new bitmap */
/* NOTE to app programmers:
@@ -265,7 +266,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
* If you switch now to settings: 1600x1200x32bit (single head) the app needs to fallback to
* bitmap output or maybe single buffered overlay output if small bitmaps are used. */
adress = (((uint32)((uint8*)si->framebuffer)) + (si->ps.memory_size * 1024 * 1024));
adress = (((uintptr_t)((uint8*)si->framebuffer)) + (si->ps.memory_size * 1024 * 1024));
for (cnt = 0; cnt <= offset; cnt++)
{
adress -= si->overlay.myBufInfo[cnt].size;
@@ -276,7 +277,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
/* Check if we need to modify the buffers starting adress and thus the size */
/* calculate 'would be' cardRAM offset */
temp32 = (adress - ((uint32)((vuint32 *)si->framebuffer)));
temp32 = (adress - ((uintptr_t)((vuint32 *)si->framebuffer)));
/* check if it is aligned */
if (temp32 != (temp32 & 0xfffffff0))
{
@@ -359,7 +360,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
* If you switch now to settings: 1600x1200x32bit (single head) the app needs to fallback to
* bitmap output or maybe single buffered overlay output if small bitmaps are used. */
adress = (((uint32)((uint8*)si->framebuffer_pci)) + (si->ps.memory_size * 1024 * 1024));
adress = (((uintptr_t)((uint8*)si->framebuffer_pci)) + (si->ps.memory_size * 1024 * 1024));
for (cnt = 0; cnt <= offset; cnt++)
{
adress -= si->overlay.myBufInfo[cnt].size;
@@ -367,20 +368,18 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
/* this adress is already aligned to the scaler's requirements (via the already modified sizes) */
si->overlay.myBuffer[offset].buffer_dma = (void *) adress;
LOG(4,("Overlay: New buffer: addr $%08x, dma_addr $%08x, color space $%08x\n",
(uint32)((uint8*)si->overlay.myBuffer[offset].buffer),
(uint32)((uint8*)si->overlay.myBuffer[offset].buffer_dma), cs));
LOG(4,("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size));
LOG(4, ("Overlay: New buffer: addr $%p, dma_addr $%p, color space $%08x\n",
(uint8*)si->overlay.myBuffer[offset].buffer,
(uint8*)si->overlay.myBuffer[offset].buffer_dma, cs));
LOG(4, ("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size));
/* release the shared benaphore */
RELEASE_BEN(si->overlay.lock)
return &si->overlay.myBuffer[offset];
}
else
/* sorry, no more room for buffers */
{
LOG(4,("Overlay: Sorry, no more space for buffers: aborted\n"));
} else {
/* sorry, no more room for buffers */
LOG(4, ("Overlay: Sorry, no more space for buffers: aborted\n"));
/* release the shared benaphore */
RELEASE_BEN(si->overlay.lock)
@@ -389,6 +388,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
}
}
status_t RELEASE_OVERLAY_BUFFER(const overlay_buffer *ob)
/* Note that the user can delete the buffers in any order desired! */
{
src/add-ons/accelerants/matrox/engine/mga_bes.c
+5 -7
View File
@@ -14,7 +14,7 @@ struct move_overlay_info
uint32 hsrcstv; /* horizontal source start in source buffer (clipping) */
uint32 hsrcendv; /* horizontal source end in source buffer (clipping) */
uint32 v1srcstv; /* vertical source start in source buffer (clipping) */
uint32 a1orgv; /* alternate source clipping via startadress of source buffer */
uintptr_t a1orgv; /* alternate source clipping via startadress of source buffer */
};
static void gx00_bes_calc_move_overlay(move_overlay_info *moi);
@@ -270,9 +270,9 @@ static void gx00_bes_calc_move_overlay(move_overlay_info *moi)
/* calculate relative base_adress and 'vertical weight fractional part' */
moi->v1srcstv = 0;
/* calculate origin adress */
moi->a1orgv = (uint32)((vuint32 *)si->overlay.ob.buffer);
moi->a1orgv -= (uint32)((vuint32 *)si->framebuffer);
LOG(4,("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv));
moi->a1orgv = (uintptr_t)((vuint32 *)si->overlay.ob.buffer);
moi->a1orgv -= (uintptr_t)((vuint32 *)si->framebuffer);
LOG(4, ("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv));
/* check for destination vertical clipping at top side */
if (si->overlay.ow.v_start < crtc_vstart)
{
@@ -285,9 +285,7 @@ static void gx00_bes_calc_move_overlay(move_overlay_info *moi)
* bytes per row source picture */
moi->v1srcstv = (si->overlay.ow.height - 2) * si->overlay.v_ifactor;
moi->a1orgv += ((moi->v1srcstv >> 16) * si->overlay.ob.bytes_per_row);
}
else
{
} else {
/* increase source buffer origin with:
* (integer part of (number of destination picture clipping pixels * inverse scaling factor)) *
* bytes per row source picture */
src/add-ons/accelerants/matrox/engine/mga_dac.c
+81 -70
View File
@@ -337,17 +337,19 @@ status_t gx00_dac_pix_pll_find
return B_ERROR;
}
/* find nearest valid pixel PLL setting: rewritten by rudolf */
static status_t milx_dac_pix_pll_find(
display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result)
display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
uint8* p_result)
{
int m = 0, n = 0, p = 0;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco, max_pclk;
float req_pclk = target.timing.pixel_clock/1000.0;
float req_pclk = target.timing.pixel_clock / 1000.0;
LOG(4,("DAC: MIL1/MIL2 TVP restrictions apply\n"));
LOG(4, ("DAC: MIL1/MIL2 TVP restrictions apply\n"));
/* determine the max. pixelclock for the current videomode */
switch (target.space)
@@ -375,15 +377,15 @@ static status_t milx_dac_pix_pll_find(
/* lower limit is min_pixel_vco divided by highest postscaler-factor */
if (req_pclk < (si->ps.min_pixel_vco / 8.0))
{
LOG(4,("DAC: TVP clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 8.0)));
LOG(4, ("DAC: TVP clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 8.0)));
req_pclk = (si->ps.min_pixel_vco / 8.0);
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclk > max_pclk)
{
LOG(4,("DAC: TVP clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
LOG(4, ("DAC: TVP clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
req_pclk = max_pclk;
}
@@ -424,14 +426,14 @@ static status_t milx_dac_pix_pll_find(
p = best[2];
f_vco = (((8 * si->ps.f_ref) / n) * m);
LOG(2,("DAC: TVP pix VCO frequency found %fMhz\n", f_vco));
LOG(2, ("DAC: TVP pix VCO frequency found %fMhz\n", f_vco));
/* setup the scalers programming values for found optimum setting */
*calc_pclk = (f_vco / p);
*m_result = (65 - m);
*n_result = (65 - n);
switch(p)
switch (p)
{
case 1:
p = 0x00;
@@ -449,36 +451,38 @@ static status_t milx_dac_pix_pll_find(
*p_result = p;
/* display the found pixelclock values */
LOG(2,("DAC: TVP pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("DAC: TVP pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
return B_OK;
}
/* find nearest valid pixel PLL setting: rewritten by rudolf */
static status_t g100_g400max_dac_pix_pll_find(
display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
uint8* p_result, uint8 test)
{
int m = 0, n = 0, p = 0, m_max;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco, max_pclk;
float req_pclk = target.timing.pixel_clock/1000.0;
/* determine the max. reference-frequency postscaler setting for the
/* determine the max. reference-frequency postscaler setting for the
* current card (see G100, G200 and G400 specs). */
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
LOG(4,("DAC: G100 restrictions apply\n"));
LOG(4, ("DAC: G100 restrictions apply\n"));
m_max = 7;
break;
case G200:
LOG(4,("DAC: G200 restrictions apply\n"));
LOG(4, ("DAC: G200 restrictions apply\n"));
m_max = 7;
break;
default:
LOG(4,("DAC: G400/G400MAX restrictions apply\n"));
LOG(4, ("DAC: G400/G400MAX restrictions apply\n"));
m_max = 32;
break;
}
@@ -490,7 +494,7 @@ static status_t g100_g400max_dac_pix_pll_find(
* only modify the clock if we are actually going to set the mode */
if ((target.flags & DUALHEAD_BITS) && test)
{
LOG(4,("DAC: dualhead mode active: modified requested pixelclock +1.5%%\n"));
LOG(4, ("DAC: dualhead mode active: modified requested pixelclock +1.5%%\n"));
req_pclk *= 1.015;
}
@@ -523,15 +527,15 @@ static status_t g100_g400max_dac_pix_pll_find(
/* lower limit is min_pixel_vco divided by highest postscaler-factor */
if (req_pclk < (si->ps.min_pixel_vco / 8.0))
{
LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 8.0)));
LOG(4, ("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 8.0)));
req_pclk = (si->ps.min_pixel_vco / 8.0);
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclk > max_pclk)
{
LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
LOG(4, ("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
req_pclk = max_pclk;
}
@@ -575,13 +579,13 @@ static status_t g100_g400max_dac_pix_pll_find(
/* calc the needed PLL loopbackfilter setting belonging to current VCO speed,
* for the current card (see G100, G200 and G400 specs). */
f_vco = (si->ps.f_ref / (m + 1)) * (n + 1);
LOG(2,("DAC: pix VCO frequency found %fMhz\n", f_vco));
LOG(2, ("DAC: pix VCO frequency found %fMhz\n", f_vco));
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
case G200:
for(;;)
for (;;)
{
if (f_vco >= 180) {p |= (0x03 << 3); break;};
if (f_vco >= 140) {p |= (0x02 << 3); break;};
@@ -590,7 +594,7 @@ static status_t g100_g400max_dac_pix_pll_find(
}
break;
default:
for(;;)
for (;;)
{
if (f_vco >= 240) {p |= (0x03 << 3); break;};
if (f_vco >= 170) {p |= (0x02 << 3); break;};
@@ -607,24 +611,26 @@ static status_t g100_g400max_dac_pix_pll_find(
*p_result = p;
/* display the found pixelclock values */
LOG(2,("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
return B_OK;
}
/* find nearest valid pixel PLL setting: rewritten by rudolf */
static status_t g450_g550_dac_pix_pll_find
(display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
(display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
uint8* p_result, uint8 test)
{
int m = 0, n = 0;
uint8 p = 0, q = 0;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco, max_pclk;
float req_pclk = target.timing.pixel_clock/1000.0;
float req_pclk = target.timing.pixel_clock / 1000.0;
LOG(4,("DAC: G450/G550 restrictions apply\n"));
LOG(4, ("DAC: G450/G550 restrictions apply\n"));
/* determine the max. pixelclock for the current videomode */
switch (target.space)
@@ -655,15 +661,15 @@ static status_t g450_g550_dac_pix_pll_find
/* lower limit is min_pixel_vco divided by highest postscaler-factor */
if (req_pclk < (si->ps.min_pixel_vco / 16.0))
{
LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 16.0)));
LOG(4, ("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_pixel_vco / 16.0)));
req_pclk = (si->ps.min_pixel_vco / 16.0);
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclk > max_pclk)
{
LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
LOG(4, ("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
req_pclk = max_pclk;
}
@@ -703,7 +709,7 @@ static status_t g450_g550_dac_pix_pll_find
/* setup the scalers programming values for found optimum setting */
m=best[0] - 1;
n=best[1] - 2;
switch(best[2])
switch (best[2])
{
case 1:
p = 0x40;
@@ -724,14 +730,14 @@ static status_t g450_g550_dac_pix_pll_find
/* log the closest VCO speed found */
f_vco = ((si->ps.f_ref * 2) / (m + 1)) * (n + 2);
LOG(2,("DAC: pix VCO frequency found %fMhz\n", f_vco));
LOG(2, ("DAC: pix VCO frequency found %fMhz\n", f_vco));
/* now find the filtersetting that matches best with this frequency by testing.
* for now we assume this routine succeeds to get us a stable setting */
if (test)
gx50_dac_check_pix_pll_range(m, n, &p, &q);
else
LOG(2,("DAC: Not testing G450/G550 VCO feedback filters\n"));
else
LOG(2, ("DAC: Not testing G450/G550 VCO feedback filters\n"));
/* return the results */
*calc_pclk = f_vco / best[2];
@@ -740,35 +746,37 @@ static status_t g450_g550_dac_pix_pll_find
*p_result = p;
/* display the found pixelclock values */
LOG(2,("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
return B_OK;
}
/* find nearest valid system PLL setting */
static status_t g100_g400max_dac_sys_pll_find(
float req_sclk,float * calc_sclk,uint8 * m_result,uint8 * n_result,uint8 * p_result)
float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result,
uint8 * p_result)
{
int m = 0, n = 0, p = 0, m_max;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco;
/* determine the max. reference-frequency postscaler setting for the
/* determine the max. reference-frequency postscaler setting for the
* current card (see G100, G200 and G400 specs). */
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
LOG(4,("DAC: G100 restrictions apply\n"));
LOG(4, ("DAC: G100 restrictions apply\n"));
m_max = 7;
break;
case G200:
LOG(4,("DAC: G200 restrictions apply\n"));
LOG(4, ("DAC: G200 restrictions apply\n"));
m_max = 7;
break;
default:
LOG(4,("DAC: G400/G400MAX restrictions apply\n"));
LOG(4, ("DAC: G400/G400MAX restrictions apply\n"));
m_max = 32;
break;
}
@@ -777,15 +785,15 @@ static status_t g100_g400max_dac_sys_pll_find(
/* lower limit is min_system_vco divided by highest postscaler-factor */
if (req_sclk < (si->ps.min_system_vco / 8.0))
{
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)(si->ps.min_system_vco / 8.0)));
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)(si->ps.min_system_vco / 8.0)));
req_sclk = (si->ps.min_system_vco / 8.0);
}
/* upper limit is max_system_vco */
if (req_sclk > si->ps.max_system_vco)
{
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)si->ps.max_system_vco));
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)si->ps.max_system_vco));
req_sclk = si->ps.max_system_vco;
}
@@ -829,13 +837,13 @@ static status_t g100_g400max_dac_sys_pll_find(
/* calc the needed PLL loopbackfilter setting belonging to current VCO speed,
* for the current card (see G100, G200 and G400 specs). */
f_vco = (si->ps.f_ref / (m + 1)) * (n + 1);
LOG(2,("DAC: sys VCO frequency found %fMhz\n", f_vco));
LOG(2, ("DAC: sys VCO frequency found %fMhz\n", f_vco));
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
case G200:
for(;;)
for (;;)
{
if (f_vco >= 180) {p |= (0x03 << 3); break;};
if (f_vco >= 140) {p |= (0x02 << 3); break;};
@@ -844,7 +852,7 @@ static status_t g100_g400max_dac_sys_pll_find(
}
break;
default:
for(;;)
for (;;)
{
if (f_vco >= 240) {p |= (0x03 << 3); break;};
if (f_vco >= 170) {p |= (0x02 << 3); break;};
@@ -861,12 +869,13 @@ static status_t g100_g400max_dac_sys_pll_find(
*p_result = p;
/* display the found pixelclock values */
LOG(2,("DAC: sys PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("DAC: sys PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_sclk, *calc_sclk, *m_result, *n_result, *p_result));
return B_OK;
}
static status_t gx50_dac_check_sys_pll(uint8 m, uint8 n, uint8 p)
{
uint time = 0, count = 0;
@@ -948,35 +957,37 @@ static status_t gx50_dac_check_sys_pll_range(uint8 m, uint8 n, uint8 *p, uint8 *
if (*q == 2) return B_OK;
/* nothing worked at all */
LOG(2,("DAC: no working VCO filter found!\n"));
LOG(2, ("DAC: no working VCO filter found!\n"));
return B_ERROR;
}
/* find nearest valid system PLL setting */
static status_t g450_g550_dac_sys_pll_find(
float req_sclk,float * calc_sclk,uint8 * m_result,uint8 * n_result,uint8 * p_result)
float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result,
uint8* p_result)
{
int m = 0, n = 0;
uint8 p = 0, q = 0;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco;
LOG(4,("DAC: G450/G550 restrictions apply\n"));
LOG(4, ("DAC: G450/G550 restrictions apply\n"));
/* Make sure the requested pixelclock is within the PLL's operational limits */
/* lower limit is min_system_vco divided by highest postscaler-factor */
if (req_sclk < (si->ps.min_system_vco / 16.0))
{
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)(si->ps.min_system_vco / 16.0)));
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)(si->ps.min_system_vco / 16.0)));
req_sclk = (si->ps.min_system_vco / 16.0);
}
/* upper limit is max_system_vco */
if (req_sclk > si->ps.max_system_vco)
{
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)si->ps.max_system_vco));
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
req_sclk, (float)si->ps.max_system_vco));
req_sclk = si->ps.max_system_vco;
}
src/add-ons/accelerants/matrox/engine/mga_maven.c
+34 -29
View File
@@ -329,30 +329,32 @@ status_t g100_g400max_maven_set_vid_pll(display_mode target)
return B_OK;
}
/* find nearest valid video PLL setting */
status_t g100_g400max_maven_vid_pll_find(
display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result)
display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
uint8* p_result)
{
int m = 0, n = 0, p = 0, m_max;
float error, error_best = 999999999;
int best[3];
float error, error_best = INT_MAX;
int best[3] = {0, 0, 0};
float f_vco, max_pclk;
float req_pclk = target.timing.pixel_clock/1000.0;
/* determine the max. reference-frequency postscaler setting for the current card */
//fixme: check G100 and G200 m_max if possible...
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
LOG(4,("MAVEN: G100 restrictions apply\n"));
LOG(4, ("MAVEN: G100 restrictions apply\n"));
m_max = 32;
break;
case G200:
LOG(4,("MAVEN: G200 restrictions apply\n"));
LOG(4, ("MAVEN: G200 restrictions apply\n"));
m_max = 32;
break;
default:
LOG(4,("MAVEN: G400/G400MAX restrictions apply\n"));
LOG(4, ("MAVEN: G400/G400MAX restrictions apply\n"));
m_max = 32;
break;
}
@@ -379,15 +381,15 @@ status_t g100_g400max_maven_vid_pll_find(
/* lower limit is min_video_vco divided by highest postscaler-factor */
if (req_pclk < (si->ps.min_video_vco / 8.0))
{
LOG(4,("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_video_vco / 8.0)));
LOG(4, ("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_video_vco / 8.0)));
req_pclk = (si->ps.min_video_vco / 8.0);
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclk > max_pclk)
{
LOG(4,("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
LOG(4, ("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
req_pclk = max_pclk;
}
@@ -430,13 +432,13 @@ status_t g100_g400max_maven_vid_pll_find(
/* calc the needed PLL loopbackfilter setting belonging to current VCO speed */
f_vco = (si->ps.f_ref / (m + 1)) * (n + 1);
LOG(2,("MAVEN: vid VCO frequency found %fMhz\n", f_vco));
LOG(2, ("MAVEN: vid VCO frequency found %fMhz\n", f_vco));
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
case G200:
for(;;)
for (;;)
{
if (f_vco >= 180) {p |= (0x03 << 3); break;};
if (f_vco >= 140) {p |= (0x02 << 3); break;};
@@ -445,7 +447,7 @@ status_t g100_g400max_maven_vid_pll_find(
}
break;
default:
for(;;)
for (;;)
{
if (f_vco >= 240) {p |= (0x03 << 3); break;};
if (f_vco >= 170) {p |= (0x02 << 3); break;};
@@ -462,12 +464,13 @@ status_t g100_g400max_maven_vid_pll_find(
*p_result = p;
/* display the found pixelclock values */
LOG(2,("MAVEN: vid PLL check: req. %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("MAVEN: vid PLL check: req. %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
return B_OK;
}
static status_t gx50_maven_check_vid_pll(uint8 m, uint8 n, uint8 p)
{
uint time = 0, count = 0;
@@ -558,18 +561,20 @@ static status_t gx50_maven_check_vid_pll_range(uint8 m, uint8 n, uint8 *p, uint8
return B_ERROR;
}
/* find nearest valid video PLL setting */
status_t g450_g550_maven_vid_pll_find
(display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
(display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
uint8* p_result, uint8 test)
{
int m = 0, n = 0;
uint8 p = 0, q = 0;
float error, error_best = 999999999;
int best[3];
float error, error_best = INFINITY;
int best[3] = {0, 0, 0};
float f_vco, max_pclk;
float req_pclk = target.timing.pixel_clock/1000.0;
LOG(4,("MAVEN: G450/G550 restrictions apply\n"));
LOG(4, ("MAVEN: G450/G550 restrictions apply\n"));
/* determine the max. pixelclock for the current videomode */
switch (target.space)
@@ -593,15 +598,15 @@ status_t g450_g550_maven_vid_pll_find
/* lower limit is min_pixel_vco divided by highest postscaler-factor */
if (req_pclk < (si->ps.min_video_vco / 16.0))
{
LOG(4,("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_video_vco / 16.0)));
LOG(4, ("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)(si->ps.min_video_vco / 16.0)));
req_pclk = (si->ps.min_video_vco / 16.0);
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclk > max_pclk)
{
LOG(4,("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
LOG(4, ("MAVEN: clamping vidclock: requested %fMHz, set to %fMHz\n",
req_pclk, (float)max_pclk));
req_pclk = max_pclk;
}
@@ -641,7 +646,7 @@ status_t g450_g550_maven_vid_pll_find
/* setup the scalers programming values for found optimum setting */
m=best[0] - 1;
n=best[1] - 2;
switch(best[2])
switch (best[2])
{
case 1:
p = 0x40;
@@ -662,14 +667,14 @@ status_t g450_g550_maven_vid_pll_find
/* log the closest VCO speed found */
f_vco = ((si->ps.f_ref * 2) / (m + 1)) * (n + 2);
LOG(2,("MAVEN: vid VCO frequency found %fMhz\n", f_vco));
LOG(2, ("MAVEN: vid VCO frequency found %fMhz\n", f_vco));
/* now find the filtersetting that matches best with this frequency by testing.
* for now we assume this routine succeeds to get us a stable setting */
if (test)
gx50_maven_check_vid_pll_range(m, n, &p, &q);
else
LOG(2,("MAVEN: Not testing G450/G550 VCO feedback filters\n"));
else
LOG(2, ("MAVEN: Not testing G450/G550 VCO feedback filters\n"));
/* return the results */
*calc_pclk = f_vco / best[2];
@@ -678,7 +683,7 @@ status_t g450_g550_maven_vid_pll_find
*p_result = p;
/* display the found pixelclock values */
LOG(2,("MAVEN: vid PLL check: req. %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("MAVEN: vid PLL check: req. %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
return B_OK;
src/add-ons/accelerants/matrox/engine/mga_maventv.c
+31 -30
View File
@@ -20,9 +20,11 @@ typedef struct {
float chroma_subcarrier;
} gx50_maven_timing;
//fixme: try to implement 'fast' and 'slow' settings for all modes,
// so buffer duplication or skipping won't be neccesary for realtime video.
//fixme: try to setup the CRTC2 in interlaced mode for the video modes on <= G400MAX cards.
// FIXME: try to implement 'fast' and 'slow' settings for all modes, so buffer
// duplication or skipping won't be neccesary for realtime video.
// FIXME: try to setup the CRTC2 in interlaced mode for the video modes
// on <= G400MAX cards.
/* find 'exact' valid video PLL setting */
status_t g100_g400max_maventv_vid_pll_find(
@@ -30,8 +32,9 @@ status_t g100_g400max_maventv_vid_pll_find(
uint8 * m_result, uint8 * n_result, uint8 * p_result)
{
int m = 0, n = 0, p = 0, m_max;
float diff, diff_smallest = 999999999;
int best[5], h_total_mod;
float diff, diff_smallest = INFINITY;
int best[5] = {0, 0, 0, 0, 0};
int h_total_mod;
float fields_sec, f_vco;
/* We need to be exact, so work with clockperiods per field instead of with frequency.
* Make sure however we truncate these clocks to be integers!
@@ -42,22 +45,22 @@ status_t g100_g400max_maventv_vid_pll_find(
* represents a whole number of clocks per field later on! */
float calc_pclks_field;
LOG(2,("MAVENTV: searching for EXACT videoclock match\n"));
LOG(2, ("MAVENTV: searching for EXACT videoclock match\n"));
/* determine the max. reference-frequency postscaler setting for the current card */
//fixme: check G100 and G200 m_max if exist and possible...
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
LOG(2,("MAVENTV: G100 restrictions apply\n"));
LOG(2, ("MAVENTV: G100 restrictions apply\n"));
m_max = 32;
break;
case G200:
LOG(2,("MAVENTV: G200 restrictions apply\n"));
LOG(2, ("MAVENTV: G200 restrictions apply\n"));
m_max = 32;
break;
default:
LOG(2,("MAVENTV: G400/G400MAX restrictions apply\n"));
LOG(2, ("MAVENTV: G400/G400MAX restrictions apply\n"));
m_max = 32;
break;
}
@@ -91,7 +94,7 @@ status_t g100_g400max_maventv_vid_pll_find(
* (The MAVEN apparantly has a granularity of 1 pixel, while CRTC2 has 8 pixels) */
for (h_total_mod = 0; h_total_mod < 8; h_total_mod++)
{
LOG(2,("MAVENTV: trying h_total modification of +%d...\n", h_total_mod));
LOG(2, ("MAVENTV: trying h_total modification of +%d...\n", h_total_mod));
/* Calculate videoclock to be a bit to high so we can compensate for an exact
* match via h_total_lastline.. */
@@ -103,13 +106,13 @@ status_t g100_g400max_maventv_vid_pll_find(
if (req_pclks_field < (((si->ps.min_video_vco * 1000000) / fields_sec) / 8.0))
{
req_pclks_field = (((si->ps.min_video_vco * 1000000) / fields_sec) / 8.0);
LOG(4,("MAVENTV: WARNING, clamping at lowest possible videoclock\n"));
LOG(4, ("MAVENTV: WARNING, clamping at lowest possible videoclock\n"));
}
/* upper limit is given by pins in combination with current active mode */
if (req_pclks_field > max_pclks_field)
{
req_pclks_field = max_pclks_field;
LOG(4,("MAVENTV: WARNING, clamping at highest possible videoclock\n"));
LOG(4, ("MAVENTV: WARNING, clamping at highest possible videoclock\n"));
}
/* iterate through all valid PLL postscaler settings */
@@ -147,7 +150,7 @@ status_t g100_g400max_maventv_vid_pll_find(
/* check if we haven't got too much clocks in the last field line for a sync lock */
if (*ht_last_line > *ht_new) continue;
/* we have a match! */
/* calculate the difference between a full line and the last line */
diff = *ht_new - *ht_last_line;
@@ -157,14 +160,14 @@ status_t g100_g400max_maventv_vid_pll_find(
{
/* log results */
if (diff_smallest == 999999999)
LOG(2,("MAVENTV: MATCH, "));
LOG(2, ("MAVENTV: MATCH, "));
else
LOG(2,("MAVENTV: better MATCH,"));
LOG(2, ("MAVENTV: better MATCH,"));
f_vco = (si->ps.f_ref / m) * n;
LOG(2,("found vid VCO freq %fMhz, pixclk %fMhz\n", f_vco, (f_vco / p)));
LOG(2,("MAVENTV: mnp(ex. filter) 0x%02x 0x%02x 0x%02x, h_total %d, ht_lastline %d\n",
LOG(2, ("found vid VCO freq %fMhz, pixclk %fMhz\n", f_vco, (f_vco / p)));
LOG(2, ("MAVENTV: mnp(ex. filter) 0x%02x 0x%02x 0x%02x, h_total %d, ht_lastline %d\n",
(m - 1), (n - 1), (p - 1), (*ht_new - 2), (*ht_last_line - 2)));
/* remember this best match */
diff_smallest = diff;
best[0] = m;
@@ -181,7 +184,7 @@ status_t g100_g400max_maventv_vid_pll_find(
}
}
}
LOG(2,("MAVENTV: search completed.\n"));
LOG(2, ("MAVENTV: search completed.\n"));
/* setup the scalers programming values for found optimum setting */
m = best[0] - 1;
@@ -191,7 +194,7 @@ status_t g100_g400max_maventv_vid_pll_find(
/* if no match was found set fixed PLL frequency so we have something valid at least */
if (diff_smallest == 999999999)
{
LOG(4,("MAVENTV: WARNING, no MATCH found!\n"));
LOG(4, ("MAVENTV: WARNING, no MATCH found!\n"));
if (si->ps.f_ref == 27.000)
{
@@ -199,9 +202,7 @@ status_t g100_g400max_maventv_vid_pll_find(
m = 0x03;
n = 0x07;
p = 0x03;
}
else
{
} else {
/* set 14.31818Mhz */
m = 0x01;
n = 0x07;
@@ -213,13 +214,13 @@ status_t g100_g400max_maventv_vid_pll_find(
/* calc the needed PLL loopbackfilter setting belonging to current VCO speed */
f_vco = (si->ps.f_ref / (m + 1)) * (n + 1);
LOG(2,("MAVENTV: using vid VCO frequency %fMhz\n", f_vco));
LOG(2, ("MAVENTV: using vid VCO frequency %fMhz\n", f_vco));
switch(si->ps.card_type)
switch (si->ps.card_type)
{
case G100:
case G200:
for(;;)
for (;;)
{
if (f_vco >= 180) {p |= (0x03 << 3); break;};
if (f_vco >= 140) {p |= (0x02 << 3); break;};
@@ -228,7 +229,7 @@ status_t g100_g400max_maventv_vid_pll_find(
}
break;
default:
for(;;)
for (;;)
{
if (f_vco >= 240) {p |= (0x03 << 3); break;};
if (f_vco >= 170) {p |= (0x02 << 3); break;};
@@ -246,9 +247,9 @@ status_t g100_g400max_maventv_vid_pll_find(
*ht_last_line = best[4];
/* display the found pixelclock values */
LOG(2,("MAVENTV: vid PLL check: got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
LOG(2, ("MAVENTV: vid PLL check: got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
(f_vco / ((p & 0x07) + 1)), m, n, p));
LOG(2,("MAVENTV: new h_total %d, ht_lastline %d\n", *ht_new, *ht_last_line));
LOG(2, ("MAVENTV: new h_total %d, ht_lastline %d\n", *ht_new, *ht_last_line));
/* return status */
if (diff_smallest == 999999999) return B_ERROR;