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@@ -2176,6 +2176,7 @@ void fake_panel_start(void)
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si->ps.tvout = false;
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si->ps.tv_encoder.type = NONE;
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si->ps.tv_encoder.version = 0;
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/* I2C init currently also fetches DDC EDID info from all connected screens */
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i2c_init();
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//fixme: add support for more encoders...
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BT_probe();
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@@ -2280,10 +2281,10 @@ static void detect_panels()
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/* do some presets */
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si->ps.p1_timing.h_display = 0;
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si->ps.p1_timing.v_display = 0;
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si->ps.crtc1_aspect = 0;
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si->ps.crtc1_screen.aspect = 0;
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si->ps.p2_timing.h_display = 0;
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si->ps.p2_timing.v_display = 0;
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si->ps.crtc2_aspect = 0;
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si->ps.crtc2_screen.aspect = 0;
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si->ps.slaved_tmds1 = false;
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si->ps.slaved_tmds2 = false;
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si->ps.master_tmds1 = false;
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@@ -2415,10 +2416,8 @@ static void detect_panels()
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if (si->ps.monitors & CRTC1_TMDS)
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{
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/* determine panel aspect ratio */
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si->ps.crtc1_aspect =
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si->ps.crtc1_screen.aspect =
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(si->ps.p1_timing.h_display / ((float)si->ps.p1_timing.v_display));
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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/* horizontal timing */
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si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;
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si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;
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@@ -2441,10 +2440,8 @@ static void detect_panels()
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if (si->ps.monitors & CRTC2_TMDS)
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{
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/* determine panel aspect ratio */
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si->ps.crtc2_aspect =
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si->ps.crtc2_screen.aspect =
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(si->ps.p2_timing.h_display / ((float)si->ps.p2_timing.v_display));
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc2_aspect = 1.60;
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/* horizontal timing */
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si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
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si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
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@@ -2525,35 +2522,40 @@ static void detect_panels()
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LOG(2,("DAC2: PANEL_PWR: $%08x\n", NV_REG32(NV32_2PANEL_PWR)));
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}
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/* determine flatpanel type(s) */
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/* note:
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* - on NV11 accessing registerset(s) hangs card.
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* - the same applies for NV34.
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* Confirmed for DAC2 access on ID 0x0322,
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* but only after a failed VESA modeswitch by the HAIKU kernel
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* at boot time caused by a BIOS fault inside the gfx card: it says
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* it can do VESA 1280x1024x32 on CRTC1/DAC1 but it fails: no signal. */
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if ((si->ps.monitors & CRTC1_TMDS) && (si->ps.card_type != NV11))
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{
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/* Read a indexed register to see if it indicates LVDS or TMDS panel presence.
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* b0-7 = adress, b16 = 1 = write_enable */
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DACW(FP_TMDS_CTRL, ((1 << 16) | 0x04));
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/* (b0-7 = data) */
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if (DACR(FP_TMDS_DATA) & 0x01)
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LOG(2,("INFO: Flatpanel on head 1 is LVDS type\n"));
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else
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LOG(2,("INFO: Flatpanel on head 1 is TMDS type\n"));
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}
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if ((si->ps.monitors & CRTC2_TMDS) && (si->ps.card_type != NV11))
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{
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/* Read a indexed register to see if it indicates LVDS or TMDS panel presence.
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* b0-7 = adress, b16 = 1 = write_enable */
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DAC2W(FP_TMDS_CTRL, ((1 << 16) | 0x04));
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/* (b0-7 = data) */
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if (DAC2R(FP_TMDS_DATA) & 0x01)
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LOG(2,("INFO: Flatpanel on head 2 is LVDS type\n"));
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else
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LOG(2,("INFO: Flatpanel on head 2 is TMDS type\n"));
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/* if something goes wrong during driver init reading those registers below might
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* result in a hanging system. Without reading them at least a blind (or KDL)
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* restart becomes possible. Leaving the code here for debugging purposes. */
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if (0) {
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/* determine flatpanel type(s) */
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/* note:
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* - on NV11 accessing registerset(s) hangs card.
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* - the same applies for NV34.
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* Confirmed for DAC2 access on ID 0x0322,
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* but only after a failed VESA modeswitch by the HAIKU kernel
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* at boot time caused by a BIOS fault inside the gfx card: it says
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* it can do VESA 1280x1024x32 on CRTC1/DAC1 but it fails: no signal. */
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if ((si->ps.monitors & CRTC1_TMDS) && (si->ps.card_type != NV11))
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{
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/* Read a indexed register to see if it indicates LVDS or TMDS panel presence.
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* b0-7 = adress, b16 = 1 = write_enable */
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DACW(FP_TMDS_CTRL, ((1 << 16) | 0x04));
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/* (b0-7 = data) */
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if (DACR(FP_TMDS_DATA) & 0x01)
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LOG(2,("INFO: Flatpanel on head 1 is LVDS type\n"));
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else
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LOG(2,("INFO: Flatpanel on head 1 is TMDS type\n"));
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}
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if ((si->ps.monitors & CRTC2_TMDS) && (si->ps.card_type != NV11))
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{
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/* Read a indexed register to see if it indicates LVDS or TMDS panel presence.
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* b0-7 = adress, b16 = 1 = write_enable */
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DAC2W(FP_TMDS_CTRL, ((1 << 16) | 0x04));
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/* (b0-7 = data) */
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if (DAC2R(FP_TMDS_DATA) & 0x01)
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LOG(2,("INFO: Flatpanel on head 2 is LVDS type\n"));
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else
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LOG(2,("INFO: Flatpanel on head 2 is TMDS type\n"));
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}
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}
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LOG(2,("INFO: End flatpanel registers dump.\n"));
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@@ -2564,56 +2566,113 @@ static void setup_output_matrix()
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/* setup defaults: */
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/* head 1 will be the primary head */
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si->ps.crtc2_prim = false;
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/* no screens usable */
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si->ps.crtc1_screen.have_edid = false;
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si->ps.crtc1_screen.timing.h_display = 0;
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si->ps.crtc1_screen.timing.v_display = 0;
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si->ps.crtc2_screen.have_edid = false;
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si->ps.crtc2_screen.timing.h_display = 0;
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si->ps.crtc2_screen.timing.v_display = 0;
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/* connect analog outputs straight through if possible */
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if ((si->ps.secondary_head) && (si->ps.card_type != NV11))
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nv_general_output_select(false);
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/* panels are pre-connected to a CRTC (1 or 2) by the card's BIOS,
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* we can't change this (lack of info) */
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/* detect analog monitors. First try EDID, else use load sensing. */
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/* (load sensing is confirmed working OK on NV04, NV05, NV11, NV18, NV28 and NV34.) */
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/* primary connector: */
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if (si->ps.con1_screen.have_edid) {
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if (!si->ps.con1_screen.digital) si->ps.monitors |= CRTC1_VGA;
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} else {
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if (nv_dac_crt_connected()) {
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si->ps.monitors |= CRTC1_VGA;
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/* assume 4:3 monitor on con1 */
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si->ps.con1_screen.aspect = 1.33;
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}
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}
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/* Note: digitally connected panels take precedence over analog connected screens. */
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/* fill-out crtc1_screen from panel info gathered from BIOS programming since
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* we don't know which connector connects to crtc1 (so EDID use not possible).
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* Also the BIOS might have programmed for a lower mode than EDID reports:
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* which limits our use of the panel (LVDS link setup too slow). */
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if(si->ps.monitors & CRTC1_TMDS) {
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si->ps.crtc1_screen.timing.pixel_clock = si->ps.p1_timing.pixel_clock;
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si->ps.crtc1_screen.timing.h_display = si->ps.p1_timing.h_display;
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si->ps.crtc1_screen.timing.h_sync_start = si->ps.p1_timing.h_sync_start;
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si->ps.crtc1_screen.timing.h_sync_end = si->ps.p1_timing.h_sync_end;
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si->ps.crtc1_screen.timing.h_total = si->ps.p1_timing.h_total;
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si->ps.crtc1_screen.timing.v_display = si->ps.p1_timing.h_display;
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si->ps.crtc1_screen.timing.v_sync_start = si->ps.p1_timing.v_sync_start;
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si->ps.crtc1_screen.timing.v_sync_end = si->ps.p1_timing.v_sync_end;
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si->ps.crtc1_screen.timing.v_total = si->ps.p1_timing.v_total;
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si->ps.crtc1_screen.timing.flags = si->ps.p1_timing.flags;
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si->ps.crtc1_screen.have_edid = true;
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//note: crtc1_screen.aspect was already filled in...
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//si->ps.crtc1_screen.aspect = si->ps.p1_aspect;
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si->ps.crtc1_screen.digital = true;
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} else if(si->ps.monitors & CRTC1_VGA) {
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/* fill-out crtc1_screen from EDID info, or faked info if EDID failed. */
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memcpy(&(si->ps.crtc1_screen), &(si->ps.con1_screen), sizeof(si->ps.crtc1_screen));
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}
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/* force widescreen types if requested */
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if (si->settings.force_ws) si->ps.crtc1_screen.aspect = 1.60;
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/* setup output devices and heads */
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if (si->ps.secondary_head)
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{
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if (si->ps.card_type != NV11)
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{
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/* setup defaults: */
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/* connect analog outputs straight through */
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nv_general_output_select(false);
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/* panels are pre-connected to a CRTC (1 or 2) by the card's BIOS,
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* we can't change this (lack of info) */
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/* detect analog monitors. First try EDID, else use load sensing. */
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/* (load sensing is confirmed working OK on NV18, NV28 and NV34.) */
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/* primary connector: */
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if (si->ps.con1_screen.have_edid) {
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if (!si->ps.con1_screen.digital) {
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si->ps.monitors |= CRTC1_VGA;
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si->ps.crtc1_aspect = si->ps.con1_screen.aspect;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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} else {
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if (nv_dac_crt_connected()) {
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si->ps.monitors |= CRTC1_VGA;
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/* assume 4:3 monitor */
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si->ps.crtc1_aspect = 1.33;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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}
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/* secondary connector */
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if (si->ps.con2_screen.have_edid) {
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if (!si->ps.con2_screen.digital) {
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si->ps.monitors |= CRTC2_VGA;
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si->ps.crtc2_aspect = si->ps.con2_screen.aspect;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc2_aspect = 1.60;
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}
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if (!si->ps.con2_screen.digital) si->ps.monitors |= CRTC2_VGA;
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} else {
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if (nv_dac2_crt_connected()) {
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si->ps.monitors |= CRTC2_VGA;
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/* assume 4:3 monitor */
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si->ps.crtc2_aspect = 1.33;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc2_aspect = 1.60;
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/* assume 4:3 monitor on con2 */
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si->ps.con2_screen.aspect = 1.33;
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}
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}
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/* Note: digitally connected panels take precedence over analog connected screens. */
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/* fill-out crtc2_screen from panel info gathered from BIOS programming since
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* we don't know which connector connects to crtc2 (so EDID use not possible).
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* Also the BIOS might have programmed for a lower mode than EDID reports:
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* which limits our use of the panel (LVDS link setup too slow). */
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if(si->ps.monitors & CRTC2_TMDS) {
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si->ps.crtc2_screen.timing.pixel_clock = si->ps.p1_timing.pixel_clock;
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si->ps.crtc2_screen.timing.h_display = si->ps.p1_timing.h_display;
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si->ps.crtc2_screen.timing.h_sync_start = si->ps.p1_timing.h_sync_start;
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si->ps.crtc2_screen.timing.h_sync_end = si->ps.p1_timing.h_sync_end;
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si->ps.crtc2_screen.timing.h_total = si->ps.p1_timing.h_total;
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si->ps.crtc2_screen.timing.v_display = si->ps.p1_timing.h_display;
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si->ps.crtc2_screen.timing.v_sync_start = si->ps.p1_timing.v_sync_start;
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si->ps.crtc2_screen.timing.v_sync_end = si->ps.p1_timing.v_sync_end;
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si->ps.crtc2_screen.timing.v_total = si->ps.p1_timing.v_total;
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si->ps.crtc2_screen.timing.flags = si->ps.p1_timing.flags;
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si->ps.crtc2_screen.have_edid = true;
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//note: crtc2_screen.aspect was already filled in...
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//si->ps.crtc2_screen.aspect = si->ps.p2_aspect;
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si->ps.crtc2_screen.digital = true;
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} else if(si->ps.monitors & CRTC2_VGA) {
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/* fill-out crtc2_screen from EDID info, or faked info if EDID failed. */
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memcpy(&(si->ps.crtc2_screen), &(si->ps.con2_screen), sizeof(si->ps.crtc2_screen));
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}
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/* force widescreen types if requested */
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if (si->settings.force_ws) si->ps.crtc2_screen.aspect = 1.60;
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/* setup correct output and head use */
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//fixme? add TVout (only, so no CRT(s) connected) support...
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switch (si->ps.monitors)
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@@ -2640,8 +2699,8 @@ static void setup_output_matrix()
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/* cross connect analog outputs so analog panel or CRT gets head 2 */
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nv_general_output_select(true);
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si->ps.monitors = 0x21;
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si->ps.crtc1_aspect = si->ps.con2_screen.aspect;
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si->ps.crtc2_aspect = si->ps.con1_screen.aspect;
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/* tell head 2 it now has a screen (connected at connector 1) */
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memcpy(&(si->ps.crtc2_screen), &(si->ps.con1_screen), sizeof(si->ps.crtc2_screen));
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LOG(2,("INFO: head 1 has a digital panel;\n"));
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LOG(2,("INFO: head 2 has an analog panel or CRT:\n"));
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LOG(2,("INFO: defaulting to head 1 for primary use.\n"));
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@@ -2665,8 +2724,8 @@ static void setup_output_matrix()
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/* cross connect analog outputs so analog panel or CRT gets head 1 */
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nv_general_output_select(true);
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si->ps.monitors = 0x12;
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si->ps.crtc1_aspect = si->ps.con2_screen.aspect;
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si->ps.crtc2_aspect = si->ps.con1_screen.aspect;
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/* tell head 1 it now has a screen (connected at connector 2) */
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memcpy(&(si->ps.crtc1_screen), &(si->ps.con2_screen), sizeof(si->ps.crtc1_screen));
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LOG(2,("INFO: head 1 has an analog panel or CRT;\n"));
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LOG(2,("INFO: head 2 has a digital panel:\n"));
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LOG(2,("INFO: defaulting to head 2 for primary use.\n"));
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@@ -2722,29 +2781,7 @@ static void setup_output_matrix()
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/* confirmed no analog output switch-options for NV11 */
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LOG(2,("INFO: NV11 outputs are hardwired to be straight-through\n"));
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/* panels are pre-connected to a CRTC (1 or 2) by the card's BIOS,
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* we can't change this (lack of info) */
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/* detect analog monitors. First try EDID, else use load sensing. */
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/* (load sensing is confirmed working OK on NV11.) */
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/* primary connector: */
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if (si->ps.con1_screen.have_edid) {
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if (!si->ps.con1_screen.digital) {
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si->ps.monitors |= CRTC1_VGA;
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si->ps.crtc1_aspect = si->ps.con1_screen.aspect;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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} else {
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if (nv_dac_crt_connected()) {
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si->ps.monitors |= CRTC1_VGA;
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/* assume 4:3 monitor */
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si->ps.crtc1_aspect = 1.33;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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}
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/* (sense analog monitor on secondary connector is impossible on NV11) */
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/* (DDC or load sense analog monitor on secondary connector is impossible on NV11) */
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/* setup correct output and head use */
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//fixme? add TVout (only, so no CRT(s) connected) support...
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@@ -2797,29 +2834,6 @@ static void setup_output_matrix()
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}
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else /* singlehead cards */
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{
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/* panels are pre-setup by the card's BIOS,
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* we can't change this (lack of info) */
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/* detect analog monitors. First try EDID, else use load sensing. */
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/* (load sensing is confirmed working OK on all cards.) */
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/* primary connector: */
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if (si->ps.con1_screen.have_edid) {
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if (!si->ps.con1_screen.digital) {
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si->ps.monitors |= CRTC1_VGA;
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si->ps.crtc1_aspect = si->ps.con1_screen.aspect;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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} else {
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if (nv_dac_crt_connected()) {
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si->ps.monitors |= CRTC1_VGA;
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/* assume 4:3 monitor */
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si->ps.crtc1_aspect = 1.33;
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/* force widescreen type if requested */
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if (si->settings.force_ws) si->ps.crtc1_aspect = 1.60;
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}
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}
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//fixme? add TVout (only, so no CRT connected) support...
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}
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}
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@@ -3354,14 +3368,14 @@ void dump_pins(void)
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LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is %s\n",
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si->ps.slaved_tmds1 ? "slaved" : "master"));
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LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
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si->ps.p1_timing.h_display, si->ps.p1_timing.v_display, si->ps.crtc1_aspect));
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si->ps.p1_timing.h_display, si->ps.p1_timing.v_display, si->ps.crtc1_screen.aspect));
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}
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if (si->ps.monitors & CRTC2_TMDS)
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{
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LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is %s\n",
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si->ps.slaved_tmds2 ? "slaved" : "master"));
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LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
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si->ps.p2_timing.h_display, si->ps.p2_timing.v_display, si->ps.crtc2_aspect));
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si->ps.p2_timing.h_display, si->ps.p2_timing.v_display, si->ps.crtc2_screen.aspect));
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}
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LOG(2,("monitor (output devices) setup matrix: $%02x\n", si->ps.monitors));
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LOG(2,("INFO: end pinsdump.\n"));
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