Use cpu-specific mmu code from arch/m68k.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@38911 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
François Revol
@@ -21,6 +21,21 @@ KernelMergeObject boot_arch_$(TARGET_ARCH).o :
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$(kernelLibArchObjects)
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;
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KernelMergeObject boot_arch_$(TARGET_ARCH)_030.o :
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mmu_030.cpp
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: -fno-pic -Wno-unused -m68030
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;
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KernelMergeObject boot_arch_$(TARGET_ARCH)_040.o :
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mmu_040.cpp
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: -fno-pic -Wno-unused -m68040
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;
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KernelMergeObject boot_arch_$(TARGET_ARCH)_060.o :
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mmu_060.cpp
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: -fno-pic -Wno-unused -m68060
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;
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SEARCH on [ FGristFiles arch_elf.cpp ]
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= [ FDirName $(HAIKU_TOP) src system kernel arch $(TARGET_ARCH) ] ;
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@@ -27,20 +27,6 @@ KernelMergeObject boot_platform_atari_m68k_shell.o :
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# cpu-specific stuff
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# should be moved to boot/arch/m68k/...
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# TODO: add 020+68851 support
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KernelMergeObject boot_arch_m68k_030.o :
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mmu_030.cpp
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: -fno-pic -Wno-unused -m68030
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;
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KernelMergeObject boot_arch_m68k_040.o :
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mmu_040.cpp
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: -fno-pic -Wno-unused -m68040
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;
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KernelMergeObject boot_arch_m68k_060.o :
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mmu_060.cpp
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: -fno-pic -Wno-unused -m68060
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;
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KernelMergeObject boot_platform_atari_m68k_other.o :
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@@ -1,144 +0,0 @@
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/*
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* Copyright 2004-2007, Axel Dörfler, [email protected].
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* Based on code written by Travis Geiselbrecht for NewOS.
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*
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* Distributed under the terms of the MIT License.
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*/
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#include "mmu.h"
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#include <boot/platform.h>
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#include <boot/stdio.h>
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#include <boot/kernel_args.h>
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#include <boot/stage2.h>
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#include <arch/cpu.h>
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#include <arch_kernel.h>
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#include <kernel.h>
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#include <OS.h>
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#include <string.h>
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#include "arch_030_mmu.h"
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#define TRACE_MMU
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#ifdef TRACE_MMU
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# define TRACE(x) dprintf x
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#else
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# define TRACE(x) ;
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#endif
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extern page_root_entry *gPageRoot;
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static void
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initialize(void)
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{
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TRACE(("mmu_030:initialize\n"));
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}
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static status_t
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set_tt(int which, addr_t pa, size_t len, uint32 perms)
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{
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TRACE(("mmu_030:set_tt(%d, 0x%lx, 0x%lx, 0x%08lx)\n", which, pa, len, perms));
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uint32 mask;
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uint32 ttr = 0;
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mask = 0x0000ffff;
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if (len) {
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len = (len >> 24) & 0x00ff;
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while (len >>= 1)
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mask <<= 1;
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// enable, cachable(?), r/w
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// super only
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// mc68030 user's manual, page 9-57
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ttr = 0x08043;
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ttr |= (pa & 0xff000000);
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ttr |= (mask & 0x00ff0000);
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}
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TRACE(("mmu_030:set_tt: 0x%08lx\n", ttr));
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/* as seen in linux and BSD code,
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* we need to use .chip pseudo op here as -m68030 doesn't seem to help gas grok it.
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*/
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switch (which) {
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case 0:
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asm volatile( \
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".chip 68030\n\t" \
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"pmove %%tt0,(%0)\n\t" \
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".chip 68k\n\t" \
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: : "a"(&ttr));
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break;
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case 1:
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asm volatile( \
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".chip 68030\n\t" \
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"pmove (%0),%%tt1\n" \
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".chip 68k\n\t" \
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: : "a"(&ttr));
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break;
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default:
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return EINVAL;
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}
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return B_OK;
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}
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static status_t
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load_rp(addr_t pa)
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{
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TRACE(("mmu_030:load_rp(0x%lx)\n", pa));
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long_page_directory_entry entry;
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*(uint64 *)&entry = DFL_PAGEENT_VAL;
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entry.type = DT_ROOT;
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entry.addr = TA_TO_PREA(((addr_t)pa));
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asm volatile( \
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"pmove (%0),%%srp\n" \
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"pmove (%0),%%crp\n" \
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: : "a"((uint64 *)&entry));
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return B_OK;
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}
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static status_t
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allocate_kernel_pgdirs(void)
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{
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page_root_entry *pr = gPageRoot;
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page_directory_entry *pd;
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addr_t tbl;
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int i;
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// we'll fill in the 2nd half with ready made page dirs
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for (i = NUM_ROOTENT_PER_TBL/2; i < NUM_ROOTENT_PER_TBL; i++) {
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if (i % NUM_DIRTBL_PER_PAGE)
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tbl += SIZ_DIRTBL;
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else
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tbl = mmu_get_next_page_tables();
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pr[i].addr = TA_TO_PREA(tbl);
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pr[i].type = DT_ROOT;
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pd = (page_directory_entry *)tbl;
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for (int32 j = 0; j < NUM_DIRENT_PER_TBL; j++)
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*(page_directory_entry_scalar *)(&pd[j]) = DFL_DIRENT_VAL;
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}
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return B_OK;
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}
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static status_t
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enable_paging(void)
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{
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TRACE(("mmu_030:enable_paging\n"));
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return B_NO_INIT;
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}
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const struct boot_mmu_ops k030MMUOps = {
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&initialize,
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&set_tt,
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&load_rp,
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&allocate_kernel_pgdirs,
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&enable_paging
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};
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@@ -1,327 +0,0 @@
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/*
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* Copyright 2004-2007, Axel Dörfler, [email protected].
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* Based on code written by Travis Geiselbrecht for NewOS.
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*
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* Distributed under the terms of the MIT License.
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*/
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#include "mmu.h"
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#include <boot/platform.h>
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#include <boot/stdio.h>
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#include <boot/kernel_args.h>
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#include <boot/stage2.h>
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#include <arch/cpu.h>
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#include <arch_kernel.h>
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#include <kernel.h>
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#include <OS.h>
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#include <string.h>
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#include "arch_040_mmu.h"
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//#define TRACE_MMU
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#ifdef TRACE_MMU
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# define TRACE(x) dprintf x
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#else
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# define TRACE(x) ;
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#endif
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extern page_root_entry *gPageRoot;
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static void
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initialize(void)
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{
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TRACE(("mmu_040:initialize\n"));
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}
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static status_t
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set_tt(int which, addr_t pa, size_t len, uint32 perms /* NOTUSED */)
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{
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TRACE(("mmu_040:set_tt(%d, 0x%lx, 0x%lx, 0x%08lx)\n", which, pa, len, perms));
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uint32 mask;
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uint32 ttr = 0;
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mask = 0x0000ffff;
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if (len) {
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len = (len >> 24) & 0x00ff;
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while (len >>= 1)
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mask <<= 1;
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// enable, super only, upa=0,
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// cachable write-through, rw
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ttr = 0x0a000;
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ttr |= (pa & 0xff000000);
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ttr |= (mask & 0x00ff0000);
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}
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TRACE(("mmu_040:set_tt: 0x%08lx\n", ttr));
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switch (which) {
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case 0:
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asm volatile( \
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"movec %0,%%dtt0\n" \
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"movec %0,%%itt0\n" \
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: : "d"(ttr));
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break;
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case 1:
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asm volatile( \
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"movec %0,%%dtt1\n" \
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"movec %0,%%itt1\n" \
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: : "d"(ttr));
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break;
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default:
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return EINVAL;
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}
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return B_OK;
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}
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static status_t
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load_rp(addr_t pa)
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{
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TRACE(("mmu_040:load_rp(0x%lx)\n", pa));
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// sanity check
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if (pa & ((1 << 9) - 1)) {
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panic("mmu root pointer missaligned!");
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return EINVAL;
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}
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// make sure it's empty
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page_directory_entry_scalar *pr = (page_directory_entry_scalar *)pa;
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for (int32 j = 0; j < NUM_ROOTENT_PER_TBL; j++)
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pr[j] = DFL_ROOTENT_VAL;
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/* mc68040 user's manual, 6-37 */
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/* pflush before... why not after ? */
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asm volatile( \
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"pflusha\n" \
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"movec %0,%%srp\n" \
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"movec %0,%%urp\n" \
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"pflusha\n" \
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: : "d"(pa));
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return B_OK;
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}
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static status_t
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allocate_kernel_pgdirs(void)
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{
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page_root_entry *pr = gPageRoot;
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page_directory_entry *pd;
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addr_t tbl;
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int i;
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// we'll fill in the 2nd half with ready made page dirs
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for (i = NUM_ROOTENT_PER_TBL/2; i < NUM_ROOTENT_PER_TBL; i++) {
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if (i % NUM_DIRTBL_PER_PAGE)
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tbl += SIZ_DIRTBL;
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else
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tbl = mmu_get_next_page_tables();
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pr[i].addr = TA_TO_PREA(tbl);
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pr[i].type = DT_ROOT;
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pd = (page_directory_entry *)tbl;
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for (int32 j = 0; j < NUM_DIRENT_PER_TBL; j++)
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*(page_directory_entry_scalar *)(&pd[j]) = DFL_DIRENT_VAL;
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}
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return B_OK;
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}
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static status_t
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enable_paging(void)
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{
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TRACE(("mmu_040:enable_paging\n"));
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uint16 tcr = 0x8000; // Enable, 4K page size
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asm volatile( \
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"pflusha\n" \
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"movec %0,%%tcr\n" \
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"pflusha\n" \
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: : "d"(tcr));
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return B_OK;
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}
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static status_t
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add_page_table(addr_t virtualAddress)
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{
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page_root_entry *pr = gPageRoot;
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page_directory_entry *pd;
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page_table_entry *pt;
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addr_t tbl;
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uint32 index;
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uint32 i;
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TRACE(("mmu->add_page_table(base = %p)\n", (void *)virtualAddress));
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// everything much simpler here because pa = va
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// thanks to transparent translation
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index = VADDR_TO_PRENT(virtualAddress);
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if (pr[index].type != DT_ROOT)
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panic("invalid page root entry %d\n", index);
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#if 0
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// not needed anymore
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if (pr[index].type != DT_ROOT) {
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unsigned aindex = index & ~(NUM_DIRTBL_PER_PAGE-1); /* aligned */
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//TRACE(("missing page root entry %d ai %d\n", index, aindex));
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tbl = mmu_get_next_page_tables();
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if (!tbl)
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return ENOMEM;
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// for each pgdir on the allocated page:
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for (i = 0; i < NUM_DIRTBL_PER_PAGE; i++) {
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page_root_entry *apr = &pr[aindex + i];
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apr->addr = TA_TO_PREA(tbl);
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apr->type = DT_ROOT;
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//TRACE(("inserting tbl @ %p as %08x pr[%d] %08x\n", tbl, TA_TO_PREA(tbl), aindex + i, *(uint32 *)apr));
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// clear the table
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//TRACE(("clearing table[%d]\n", i));
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pd = (page_directory_entry *)tbl;
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for (int32 j = 0; j < NUM_DIRENT_PER_TBL; j++)
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*(page_directory_entry_scalar *)(&pd[j]) = DFL_DIRENT_VAL;
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tbl += SIZ_DIRTBL;
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}
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}
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#endif
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pd = (page_directory_entry *)PRE_TO_TA(pr[index]);
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index = VADDR_TO_PDENT(virtualAddress);
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if (pd[index].type != DT_DIR) {
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unsigned aindex = index & ~(NUM_PAGETBL_PER_PAGE-1); /* aligned */
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//TRACE(("missing page dir entry %d ai %d\n", index, aindex));
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tbl = mmu_get_next_page_tables();
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if (!tbl)
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return ENOMEM;
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// for each pgdir on the allocated page:
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for (i = 0; i < NUM_PAGETBL_PER_PAGE; i++) {
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page_directory_entry *apd = &pd[aindex + i];
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apd->addr = TA_TO_PDEA(tbl);
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apd->type = DT_DIR;
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// clear the table
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//TRACE(("clearing table[%d]\n", i));
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pt = (page_table_entry *)tbl;
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for (int32 j = 0; j < NUM_PAGEENT_PER_TBL; j++)
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*(page_table_entry_scalar *)(&pt[j]) = DFL_PAGEENT_VAL;
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tbl += SIZ_PAGETBL;
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}
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}
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#if 0
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pt = PDE_TO_TA(pd[index]);
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index = VADDR_TO_PTENT(virtualAddress);
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pt[index].addr = TA_TO_PTEA(0xdeadb00b);
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pt[index].supervisor = 1;
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pt[index].type = DT_PAGE;
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#endif
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return B_OK;
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}
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static page_table_entry *
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lookup_pte(addr_t virtualAddress)
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{
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page_root_entry *pr = gPageRoot;
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page_directory_entry *pd;
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page_table_entry *pt;
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uint32 rindex, dindex, pindex;
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rindex = VADDR_TO_PRENT(virtualAddress);
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if (pr[rindex].type != DT_ROOT)
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panic("lookup_pte: invalid entry pgrt[%d]", rindex);
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pd = (page_directory_entry *)PRE_TO_TA(pr[rindex]);
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dindex = VADDR_TO_PDENT(virtualAddress);
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if (pd[dindex].type != DT_DIR)
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panic("lookup_pte: invalid entry pgrt[%d] prdir[%d]", rindex, dindex);
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pt = (page_table_entry *)PDE_TO_TA(pd[dindex]);
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pindex = VADDR_TO_PTENT(virtualAddress);
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#if 0 // of course, it's used in map_page!
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if (pt[pindex].type != DT_PAGE)
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panic("lookup_pte: invalid entry pgrt[%d] prdir[%d] pgtbl[%d]",
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rindex, dindex, pindex);
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#endif
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return (&pt[pindex]);
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}
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static void
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unmap_page(addr_t virtualAddress)
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{
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page_table_entry *pt;
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TRACE(("mmu->unmap_page(virtualAddress = %p)\n", (void *)virtualAddress));
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if (virtualAddress < KERNEL_BASE)
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panic("unmap_page: asked to unmap invalid page %p!\n",
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(void *)virtualAddress);
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// unmap the page from the correct page table
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pt = lookup_pte(virtualAddress);
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||||
if (pt->type != DT_PAGE)
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panic("unmap_page: asked to map non-existing page for %08x\n",
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virtualAddress);
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pt->addr = TA_TO_PTEA(0xdeadb00b);
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pt->type = DT_INVALID;
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// flush ATC
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asm volatile("pflush (%0)" : : "a" (virtualAddress));
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||||
}
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||||
|
||||
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||||
/** insert the physical address into existing page table */
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||||
static void
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||||
map_page(addr_t virtualAddress, addr_t physicalAddress, uint32 flags)
|
||||
{
|
||||
page_table_entry *pt;
|
||||
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TRACE(("mmu->map_page: vaddr 0x%lx, paddr 0x%lx\n", virtualAddress, physicalAddress));
|
||||
|
||||
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||||
physicalAddress &= ~(B_PAGE_SIZE - 1);
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||||
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||||
// map the page to the correct page table
|
||||
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||||
pt = lookup_pte(virtualAddress);
|
||||
|
||||
if (pt->type != DT_INVALID)
|
||||
panic("map_page: asked to map existing page for %08x\n",
|
||||
virtualAddress);
|
||||
|
||||
TRACE(("map_page: inserting pageTableEntry %p, physicalAddress %p\n",
|
||||
pt, physicalAddress));
|
||||
|
||||
|
||||
pt->addr = TA_TO_PTEA(physicalAddress);
|
||||
pt->supervisor = 1;
|
||||
#ifdef MMU_HAS_GLOBAL_PAGES
|
||||
pt->global = 1;
|
||||
#endif
|
||||
pt->type = DT_PAGE;
|
||||
// XXX: are flags needed ? ro ? global ?
|
||||
|
||||
// flush ATC
|
||||
asm volatile("pflush (%0)" : : "a" (virtualAddress));
|
||||
|
||||
TRACE(("mmu->map_page: done\n"));
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
const struct boot_mmu_ops k040MMUOps = {
|
||||
&initialize,
|
||||
&set_tt,
|
||||
&load_rp,
|
||||
&allocate_kernel_pgdirs,
|
||||
&enable_paging,
|
||||
&add_page_table,
|
||||
&unmap_page,
|
||||
&map_page
|
||||
};
|
||||
Reference in New Issue
Block a user