Add support for thermal status queries on newer chipsets
* add temperature query support for Juniper, Sumo, Evergreen, and North Islands * add missing thermal defines for evergreen cards * northern island cards use the evergreen thermal calculations
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@@ -80,5 +80,18 @@
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#define EVERGREEN_SCRATCH_UMSK 0x8540
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#define EVERGREEN_SCRATCH_UMSK 0x8540
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#define EVERGREEN_SCRATCH_ADDR 0x8544
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#define EVERGREEN_SCRATCH_ADDR 0x8544
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/* evergreen */
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#define EVERGREEN_CG_THERMAL_CTRL 0x72c
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#define EVERGREEN_TOFFSET_MASK 0x00003FE0
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#define EVERGREEN_TOFFSET_SHIFT 5
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#define EVERGREEN_CG_MULT_THERMAL_STATUS 0x740
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#define EVERGREEN_ASIC_T(x) ((x) << 16)
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#define EVERGREEN_ASIC_T_MASK 0x07FF0000
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#define EVERGREEN_ASIC_T_SHIFT 16
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#define EVERGREEN_CG_TS0_STATUS 0x760
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#define EVERGREEN_TS0_ADC_DOUT_MASK 0x000003FF
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#define EVERGREEN_TS0_ADC_DOUT_SHIFT 0
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/* APU */
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#define EVERGREEN_CG_THERMAL_STATUS 0x678
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#endif
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#endif
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@@ -783,10 +783,43 @@ radeon_get_temp()
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radeon_shared_info &info = *gInfo->shared_info;
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radeon_shared_info &info = *gInfo->shared_info;
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uint32 rawTemp = 0; // temp
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uint32 rawTemp = 0;
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int32 finalTemp = 0; // actual_temp
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int32 finalTemp = 0;
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if (info.chipsetID >= RADEON_RV770) {
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if (info.chipsetID == RADEON_JUNIPER) {
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uint32 offset = (Read32(OUT, EVERGREEN_CG_THERMAL_CTRL)
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& EVERGREEN_TOFFSET_MASK) >> EVERGREEN_TOFFSET_SHIFT;
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rawTemp = (Read32(OUT, EVERGREEN_CG_TS0_STATUS)
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& EVERGREEN_TS0_ADC_DOUT_MASK) >> EVERGREEN_TS0_ADC_DOUT_SHIFT;
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if (offset & 0x100)
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finalTemp = rawTemp / 2 - (0x200 - offset);
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else
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finalTemp = rawTemp / 2 + offset;
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return finalTemp * 1000;
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} else if (info.chipsetID == RADEON_SUMO
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|| info.chipsetID == RADEON_SUMO2) {
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uint32 rawTemp = Read32(OUT, EVERGREEN_CG_THERMAL_STATUS) & 0xff;
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finalTemp = rawTemp - 49;
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return finalTemp * 1000;
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} else if (info.chipsetID >= RADEON_CEDAR) {
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rawTemp = (Read32(OUT, EVERGREEN_CG_MULT_THERMAL_STATUS)
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& EVERGREEN_ASIC_T_MASK) >> EVERGREEN_ASIC_T_SHIFT;
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if (rawTemp & 0x400)
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finalTemp = -256;
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else if (rawTemp & 0x200)
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finalTemp = 255;
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else if (rawTemp & 0x100) {
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finalTemp = rawTemp & 0x1ff;
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finalTemp |= ~0x1ff;
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} else
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finalTemp = rawTemp & 0xff;
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return (finalTemp * 1000) / 2;
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} else if (info.chipsetID >= RADEON_RV770) {
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rawTemp = (Read32(OUT, R700_CG_MULT_THERMAL_STATUS) & R700_ASIC_T_MASK)
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rawTemp = (Read32(OUT, R700_CG_MULT_THERMAL_STATUS) & R700_ASIC_T_MASK)
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>> R700_ASIC_T_SHIFT;
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>> R700_ASIC_T_SHIFT;
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if (rawTemp & 0x400)
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if (rawTemp & 0x400)
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@@ -800,7 +833,6 @@ radeon_get_temp()
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finalTemp = rawTemp & 0xff;
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finalTemp = rawTemp & 0xff;
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return (finalTemp * 1000) / 2;
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return (finalTemp * 1000) / 2;
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} else if (info.chipsetID >= RADEON_R600) {
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} else if (info.chipsetID >= RADEON_R600) {
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rawTemp = (Read32(OUT, R600_CG_THERMAL_STATUS) & R600_ASIC_T_MASK)
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rawTemp = (Read32(OUT, R600_CG_THERMAL_STATUS) & R600_ASIC_T_MASK)
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>> R600_ASIC_T_SHIFT;
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>> R600_ASIC_T_SHIFT;
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