sdhci: refactor, get CMD0 working
- Define a class for each register, allowing easier access to relevant values. This avoids dealing with bitshifts and magic constants all over the code. - Fix definition of CMD0 and the flags used to submit it. We now get a command completion interrupt, yay! - Make some changes to support v3 and v4 controllers: - Enable PLL (harmless for older versions) - Manage faster and more configurable clock settings Change-Id: I8a97edcb881acc1ac2a8b0a2593930f18e777594 Reviewed-on: https://review.haiku-os.org/c/1029 Reviewed-by: waddlesplash <[email protected]>
This commit is contained in:
Adrien Destugues
committed by
waddlesplash
waddlesplash
parent
f167d21adc
commit
cdc4a175ca
@@ -59,33 +59,38 @@ static pci_x86_module_info* sPCIx86Module;
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static void
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sdhci_register_dump(uint8_t slot, struct registers* regs)
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{
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#ifdef TRACE_SDHCI
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TRACE("Register values for slot %d:\n", slot);
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TRACE("system_address: %d\n", regs->system_address);
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TRACE("%d blocks of size %d\n", regs->block_count, regs->block_size);
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TRACE("argument: %d\n", regs->argument);
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TRACE("transfer_mode: %d\n", regs->transfer_mode);
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TRACE("command: %d\n", regs->command);
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TRACE("command: %d\n", regs->command.Bits());
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TRACE("response:");
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for (int i = 0; i < 8; i++)
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TRACE(" %d", regs->response[i]);
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TRACE("\nbuffer_data_port: %d\n", regs->buffer_data_port);
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TRACE("present_state: %d\n", regs->present_state);
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TRACE("power_control: %d\n", regs->power_control);
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dprintf(" %d", regs->response[i]);
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dprintf("\n");
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TRACE("buffer_data_port: %d\n", regs->buffer_data_port);
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TRACE("present_state: %x\n", regs->present_state.Bits());
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TRACE("power_control: %d\n", regs->power_control.Bits());
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TRACE("host_control: %d\n", regs->host_control);
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TRACE("wakeup_control: %d\n", regs->wakeup_control);
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TRACE("block_gap_control: %d\n", regs->block_gap_control);
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TRACE("clock_control: %d\n", regs->clock_control);
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TRACE("software_reset: %d\n", regs->software_reset);
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TRACE("clock_control: %x\n", regs->clock_control.Bits());
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TRACE("software_reset: %d\n", regs->software_reset.Bits());
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TRACE("timeout_control: %d\n", regs->timeout_control);
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TRACE("interrupt_status: %x enable: %x signal: %x\n",
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regs->interrupt_status, regs->interrupt_status_enable,
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regs->interrupt_signal_enable);
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TRACE("auto_cmd12_error_status: %d\n", regs->auto_cmd12_error_status);
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TRACE("capabilities: %lld\n", regs->capabilities);
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TRACE("capabilities: %lld\n", regs->capabilities.Bits());
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TRACE("max_current_capabilities: %lld\n",
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regs->max_current_capabilities);
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TRACE("slot_interrupt_status: %d\n", regs->slot_interrupt_status);
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TRACE("host_controller_version %x\n", regs->host_controller_version);
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TRACE("host_controller_version spec %x vendor %x\n",
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regs->host_controller_version.specVersion,
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regs->host_controller_version.vendorVersion);
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#endif
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}
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@@ -93,73 +98,85 @@ static void
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sdhci_reset(struct registers* regs)
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{
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// if card is not present then no point of reseting the registers
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if (!(regs->present_state & SDHCI_CARD_DETECT))
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if (!regs->present_state.IsCardInserted())
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return;
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// enabling software reset all
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regs->software_reset |= SDHCI_SOFTWARE_RESET_ALL;
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// waiting for clock and power to get off
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while (regs->clock_control != 0 && regs->power_control != 0);
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regs->software_reset.ResetAll();
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}
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static void
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sdhci_set_clock(struct registers* regs, uint16_t base_clock_div)
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sdhci_set_clock(struct registers* regs)
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{
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uint32_t clock_control = regs->clock_control;
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int base_clock = SDHCI_BASE_CLOCK_FREQ(regs->capabilities);
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int base_clock = regs->capabilities.BaseClockFrequency();
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// Try to get as close to 400kHz as possible, but not faster
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int divider = base_clock * 1000 / 400;
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TRACE("SDCLK frequency: %dMHz\n", base_clock);
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if (regs->host_controller_version.specVersion <= 1) {
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// Old controller only support power of two dividers up to 256,
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// round to next power of two up to 256
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if (divider > 256)
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divider = 256;
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// clearing previous frequency
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clock_control &= SDHCI_CLR_FREQ_SEL;
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clock_control |= base_clock_div;
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divider--;
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divider |= divider >> 1;
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divider |= divider >> 2;
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divider |= divider >> 4;
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divider++;
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}
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// enabling internal clock
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clock_control |= SDHCI_INTERNAL_CLOCK_ENABLE;
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regs->clock_control = clock_control;
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divider = regs->clock_control.SetDivider(divider);
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// waiting till internal clock gets stable
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while (!(regs->clock_control & SDHCI_INTERNAL_CLOCK_STABLE));
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// Log the value after possible rounding by SetDivider (only even values
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// are allowed).
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TRACE("SDCLK frequency: %dMHz / %d = %dkHz\n", base_clock, divider,
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base_clock * 1000 / divider);
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regs->clock_control |= SDHCI_SD_CLOCK_ENABLE; // enabling the SD clock
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// We have set the divider, now we can enable the internal clock.
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regs->clock_control.EnableInternal();
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// wait until internal clock is stabilized
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while (!(regs->clock_control.InternalStable()));
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regs->clock_control.EnablePLL();
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while (!(regs->clock_control.InternalStable()));
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// Finally, route the clock to the SD card
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regs->clock_control.EnableSD();
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}
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static void
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sdhci_stop_clock(struct registers* regs)
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{
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regs->clock_control &= SDHCI_SD_CLOCK_DISABLE;
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regs->clock_control.DisableSD();
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}
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static void
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sdhci_set_power(struct registers* _regs)
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{
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uint16_t command = _regs->command;
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uint8_t supportedVoltages = _regs->capabilities.SupportedVoltages();
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if ((supportedVoltages & Capabilities::k3v3) != 0)
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_regs->power_control.SetVoltage(PowerControl::k3v3);
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else if ((supportedVoltages & Capabilities::k3v0) != 0)
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_regs->power_control.SetVoltage(PowerControl::k3v0);
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else if ((supportedVoltages & Capabilities::k1v8) != 0)
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_regs->power_control.SetVoltage(PowerControl::k1v8);
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else {
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_regs->power_control.PowerOff();
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ERROR("No voltage is supported\n");
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return;
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}
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if (SDHCI_VOLTAGE_SUPPORTED(_regs->capabilities))
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if (SDHCI_VOLTAGE_SUPPORTED_33(_regs->capabilities))
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_regs->power_control |= SDHCI_VOLTAGE_SUPPORT_33;
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else if (SDHCI_VOLTAGE_SUPPORTED_30(_regs->capabilities))
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_regs->power_control |= SDHCI_VOLTAGE_SUPPORT_30;
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else
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_regs->power_control |= SDHCI_VOLTAGE_SUPPORT_18;
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else
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TRACE("No voltage is supported\n");
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if (SDHCI_CARD_INSERTED(_regs->present_state) == 0) {
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if (!_regs->present_state.IsCardInserted()) {
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TRACE("Card not inserted\n");
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return;
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}
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_regs->power_control |= SDHCI_BUS_POWER_ON;
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TRACE("Executed CMD0\n");
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command = SDHCI_RESPONSE_R1 | SDHCI_CMD_CRC_EN
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| SDHCI_CMD_INDEX_EN | SDHCI_CMD_0;
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_regs->command |= command;
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TRACE("Execute CMD0\n");
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_regs->command.SendCommand(0, false);
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DELAY(1000);
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}
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@@ -204,6 +221,8 @@ init_bus(device_node* node, void** bus_cookie)
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|| gDeviceManager->get_attr_uint8(node, BAR_INDEX, &bar, false) < B_OK)
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return -1;
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TRACE("Controller has %d slots, first bar is %d\n", slot + 1, bar);
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bus->node = node;
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bus->pci = pci;
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bus->device = device;
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@@ -272,9 +291,8 @@ init_bus(device_node* node, void** bus_cookie)
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| SDHCI_INT_BUS_POWER | SDHCI_INT_END_BIT;
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sdhci_register_dump(slot, _regs);
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sdhci_set_clock(_regs, SDHCI_BASE_CLOCK_DIV_128);
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sdhci_set_clock(_regs);
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sdhci_set_power(_regs);
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sdhci_register_dump(slot, _regs);
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*bus_cookie = bus;
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return status;
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@@ -287,10 +305,8 @@ sdhci_error_interrupt_recovery(struct registers* _regs)
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_regs->interrupt_signal_enable &= ~(SDHCI_INT_CMD_CMP
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| SDHCI_INT_TRANS_CMP | SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM);
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if (_regs->interrupt_status & 7) {
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_regs->software_reset |= 1 << 1;
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while (_regs->command);
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}
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if (_regs->interrupt_status & 7)
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_regs->software_reset.ResetTransaction();
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int16_t erorr_status = _regs->interrupt_status;
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_regs->interrupt_status &= ~(erorr_status);
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@@ -303,11 +319,11 @@ sdhci_generic_interrupt(void* data)
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TRACE("interrupt function called\n");
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sdhci_pci_mmc_bus_info* bus = (sdhci_pci_mmc_bus_info*)data;
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uint16_t intmask, card_present;
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uint32_t intmask, card_present;
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intmask = bus->_regs->slot_interrupt_status;
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if (intmask == 0 || intmask == 0xffffffff) {
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if ((intmask == 0) || (intmask == 0xffffffff)) {
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TRACE("invalid command interrupt\n");
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return B_UNHANDLED_INTERRUPT;
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@@ -335,8 +351,8 @@ sdhci_generic_interrupt(void* data)
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// handling command interrupt
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if (intmask & SDHCI_INT_CMD_MASK) {
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TRACE("interrupt status error: %d\n", bus->_regs->interrupt_status);
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bus->_regs->interrupt_status |= (intmask & SDHCI_INT_CMD_MASK);
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// TODO do something with the interrupt
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TRACE("Command interrupt handled\n");
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return B_HANDLED_INTERRUPT;
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@@ -20,37 +20,101 @@
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#define SDHCI_DEVICE_TYPE_ITEM "sdhci/type"
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#define SDHCI_BUS_TYPE_NAME "bus/sdhci/v1"
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#define SDHCI_CARD_DETECT 1 << 16
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#define SDHCI_SOFTWARE_RESET_ALL 1 << 0
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class Command {
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public:
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uint16_t Bits() { return fBits; }
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#define SDHCI_BASE_CLOCK_FREQ(x) ((x >> 8) & 63)
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#define SDHCI_VOLTAGE_SUPPORTED(x) ((x >> 24) & 7)
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#define SDHCI_VOLTAGE_SUPPORTED_33(x) ((x >> 24) & 1)
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#define SDHCI_VOLTAGE_SUPPORTED_30(x) ((x >> 24) & 3)
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#define SDHCI_VOLTAGE_SUPPORT_33 7 << 1
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#define SDHCI_VOLTAGE_SUPPORT_30 6 << 1
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#define SDHCI_VOLTAGE_SUPPORT_18 5 << 1
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#define SDHCI_CARD_INSERTED(x) ((x >> 16) & 1)
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#define SDHCI_BASE_CLOCK_DIV_1 0 << 8
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#define SDHCI_BASE_CLOCK_DIV_2 1 << 8
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#define SDHCI_BASE_CLOCK_DIV_4 2 << 8
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#define SDHCI_BASE_CLOCK_DIV_8 4 << 8
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#define SDHCI_BASE_CLOCK_DIV_16 8 << 8
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#define SDHCI_BASE_CLOCK_DIV_32 16 << 8
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#define SDHCI_BASE_CLOCK_DIV_64 32 << 8
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#define SDHCI_BASE_CLOCK_DIV_128 64 << 8
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#define SDHCI_BASE_CLOCK_DIV_256 128 << 8
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#define SDHCI_INTERNAL_CLOCK_ENABLE 1 << 0
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#define SDHCI_INTERNAL_CLOCK_STABLE 1 << 1
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#define SDHCI_SD_CLOCK_ENABLE 1 << 2
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#define SDHCI_SD_CLOCK_DISABLE ~(1 << 2)
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#define SDHCI_CLR_FREQ_SEL ~(255 << 8)
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#define SDHCI_BUS_POWER_ON 1
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void SendCommand(uint8_t command, bool data)
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{
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fBits = (command << 8) | (data << 5);
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}
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private:
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volatile uint16_t fBits;
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} __attribute__((packed));
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#define SDHCI_RESPONSE_R1 2
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#define SDHCI_CMD_CRC_EN 1 << 3
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#define SDHCI_CMD_INDEX_EN 1 << 4
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#define SDHCI_CMD_0 ~(63 << 8)
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class PresentState {
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public:
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uint32_t Bits() { return fBits; }
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bool IsCardInserted() { return fBits & (1 << 16); }
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private:
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volatile uint32_t fBits;
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} __attribute__((packed));
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class PowerControl {
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public:
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uint8_t Bits() { return fBits; }
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void SetVoltage(int voltage) {
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fBits |= voltage | kBusPowerOn;
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}
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void PowerOff() { fBits &= ~kBusPowerOn; }
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static const uint8_t k3v3 = 7 << 1;
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static const uint8_t k3v0 = 6 << 1;
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static const uint8_t k1v8 = 5 << 1;
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private:
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volatile uint8_t fBits;
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static const uint8_t kBusPowerOn = 1;
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} __attribute__((packed));
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class ClockControl
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{
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public:
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uint16_t Bits() { return fBits; }
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uint16_t SetDivider(uint16_t divider) {
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if (divider == 1)
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divider = 0;
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else
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divider /= 2;
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uint16_t bits = fBits & ~0xffc0;
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bits |= divider << 8;
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bits |= (divider >> 8) & 0xc0;
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fBits = bits;
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return divider == 0 ? 1 : divider * 2;
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}
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void EnableInternal() { fBits |= 1 << 0; }
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bool InternalStable() { return fBits & (1 << 1); }
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void EnableSD() { fBits |= 1 << 2; }
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void DisableSD() { fBits &= ~(1 << 2); }
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void EnablePLL() { fBits |= 1 << 3; }
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private:
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volatile uint16_t fBits;
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} __attribute__((packed));
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class SoftwareReset {
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public:
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uint8_t Bits() { return fBits; }
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void ResetAll() {
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fBits |= 1;
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while(fBits & 1);
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}
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void ResetTransaction() {
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fBits |= 2;
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while(fBits & 2);
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}
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private:
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volatile uint8_t fBits;
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} __attribute__((packed));
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/* Interrupt registers */
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#define SDHCI_INT_CMD_CMP 0x00000001 // command complete enable
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#define SDHCI_INT_TRANS_CMP 0x00000002 // transfer complete enable
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@@ -68,40 +132,87 @@
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#define SDHCI_INT_CMD_MASK (SDHCI_INT_CMD_CMP | SDHCI_INT_CMD_ERROR_MASK)
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class Capabilities
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{
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public:
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uint64_t Bits() { return fBits; }
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uint8_t SupportedVoltages() { return (fBits >> 24) & 7; }
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uint8_t BaseClockFrequency() { return (fBits >> 8) & 0xFF; }
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static const uint8_t k3v3 = 1;
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static const uint8_t k3v0 = 2;
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static const uint8_t k1v8 = 4;
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private:
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const uint64_t fBits;
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} __attribute__((packed));
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class HostControllerVersion {
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public:
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const uint8_t specVersion;
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const uint8_t vendorVersion;
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} __attribute__((packed));
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struct registers {
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// SD command generation
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volatile uint32_t system_address;
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volatile uint16_t block_size;
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volatile uint16_t block_count;
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volatile uint32_t argument;
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volatile uint16_t transfer_mode;
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volatile uint16_t command;
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Command command;
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// Response
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volatile uint16_t response[8];
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// Buffer Data Port
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volatile uint32_t buffer_data_port;
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volatile uint32_t present_state;
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// Host control 1
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PresentState present_state;
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volatile uint8_t host_control;
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volatile uint8_t power_control;
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PowerControl power_control;
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volatile uint8_t block_gap_control;
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volatile uint8_t wakeup_control;
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volatile uint16_t clock_control;
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ClockControl clock_control;
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volatile uint8_t timeout_control;
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volatile uint8_t software_reset;
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SoftwareReset software_reset;
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// Interrupt control
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volatile uint32_t interrupt_status;
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volatile uint32_t interrupt_status_enable;
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volatile uint32_t interrupt_signal_enable;
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volatile uint16_t auto_cmd12_error_status;
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// Host control 2
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volatile uint16_t host_control_2;
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volatile uint64_t capabilities;
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// Capabilities
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Capabilities capabilities;
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volatile uint64_t max_current_capabilities;
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// Force event
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volatile uint16_t force_event_acmd_status;
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volatile uint16_t force_event_error_status;
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// ADMA2
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volatile uint8_t adma_error_status;
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volatile uint8_t padding[3];
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volatile uint64_t adma_system_address;
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// Preset values
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volatile uint64_t preset_value[2];
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volatile uint32_t :32;
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volatile uint16_t uhs2_preset_value;
|
||||
volatile uint16_t :16;
|
||||
|
||||
// ADMA3
|
||||
volatile uint64_t adma3_id_address;
|
||||
|
||||
// UHS-II
|
||||
volatile uint16_t uhs2_block_size;
|
||||
volatile uint16_t :16;
|
||||
volatile uint32_t uhs2_block_count;
|
||||
@@ -121,6 +232,8 @@ struct registers {
|
||||
volatile uint32_t uhs2_error_interrupt_status_enable;
|
||||
volatile uint32_t uhs2_error_interrupt_signal_enable;
|
||||
volatile uint8_t padding3[16];
|
||||
|
||||
// Pointers
|
||||
volatile uint16_t uhs2_settings_pointer;
|
||||
volatile uint16_t uhs2_host_capabilities_pointer;
|
||||
volatile uint16_t uhs2_test_pointer;
|
||||
@@ -128,8 +241,10 @@ struct registers {
|
||||
volatile uint16_t vendor_specific_pointer;
|
||||
volatile uint16_t reserved_specific_pointer;
|
||||
volatile uint8_t padding4[16];
|
||||
|
||||
// Common area
|
||||
volatile uint16_t slot_interrupt_status;
|
||||
volatile uint16_t host_controller_version;
|
||||
HostControllerVersion host_controller_version;
|
||||
} __attribute__((packed));
|
||||
|
||||
typedef void* sdhci_mmc_bus;
|
||||
@@ -142,7 +257,7 @@ typedef void* sdhci_mmc_bus;
|
||||
|
||||
static void sdhci_register_dump(uint8_t, struct registers*);
|
||||
static void sdhci_reset(struct registers*);
|
||||
static void sdhci_set_clock(struct registers*, uint16_t);
|
||||
static void sdhci_set_clock(struct registers*);
|
||||
static void sdhci_set_power(struct registers*);
|
||||
static void sdhci_stop_clock(struct registers*);
|
||||
void sdhci_error_interrupt_recovery(struct registers*);
|
||||
|
||||
Reference in New Issue
Block a user