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boot/efi/arm: add debug logs for initial CPU state

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Change-Id: I08df563ef6967f5f9734bbe11ac643c3b68f504f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5151
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: Adrien Destugues <[email protected]>
This commit is contained in:
David Karoly
2022-03-29 07:09:14 +00:00
committed by Adrien Destugues
parent 7fdf6e8639
commit d232643ed8
2 changed files with 70 additions and 0 deletions
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headers/private/kernel/boot/arch/arm/arch_cpu.h
+55
View File
@@ -20,6 +20,61 @@ void arch_ucode_load(BootVolume& volume);
bigtime_t system_time();
void spin(bigtime_t microseconds);
static inline uint32
cpu_read_CPSR(void)
{
uint32 res;
asm volatile("MRS %0, CPSR": "=r" (res));
return res;
}
static inline uint32
mmu_read_SCTLR(void)
{
uint32 res;
asm volatile("MRC p15, 0, %0, c1, c0, 0": "=r" (res));
return res;
}
static inline uint32
mmu_read_TTBR0(void)
{
uint32 res;
asm volatile("MRC p15, 0, %0, c2, c0, 0": "=r" (res));
return res;
}
static inline uint32
mmu_read_TTBR1(void)
{
uint32 res;
asm volatile("MRC p15, 0, %0, c2, c0, 1": "=r" (res));
return res;
}
static inline uint32
mmu_read_TTBCR(void)
{
uint32 res;
asm volatile("MRC p15, 0, %0, c2, c0, 2": "=r" (res));
return res;
}
static inline uint32
mmu_read_DACR(void)
{
uint32 res;
asm volatile("MRC p15, 0, %0, c3, c0, 0": "=r" (res));
return res;
}
#ifdef __cplusplus
}
#endif
src/system/boot/platform/efi/arch/arm/arch_start.cpp
+15
View File
@@ -5,6 +5,7 @@
#include <kernel.h>
#include <boot/arch/arm/arch_cpu.h>
#include <boot/platform.h>
#include <boot/stage2.h>
#include <boot/stdio.h>
@@ -14,6 +15,13 @@
#include "serial.h"
#include "smp.h"
//#define TRACE_ARCH_START
#ifdef TRACE_ARCH_START
# define TRACE(x...) dprintf(x)
#else
# define TRACE(x...) ;
#endif
#define ALIGN_MEMORY_MAP 4
@@ -224,6 +232,13 @@ arch_start_kernel(addr_t kernelEntry)
//smp_boot_other_cpus(final_ttbr0, kernelEntry, (addr_t)&gKernelArgs);
TRACE("CPSR = 0x%08" B_PRIx32 "\n", cpu_read_CPSR());
TRACE("SCTLR = 0x%08" B_PRIx32 "\n", mmu_read_SCTLR());
TRACE("TTBR0 = 0x%08" B_PRIx32 ", TTBR1 = 0x%08" B_PRIx32 ", TTBCR = 0x%08" B_PRIx32 "\n",
mmu_read_TTBR0(), mmu_read_TTBR1(), mmu_read_TTBCR());
TRACE("DACR = 0x%08" B_PRIx32 "\n",
mmu_read_DACR());
// Enter the kernel!
dprintf("enter_kernel(ttbr0: 0x%08x, kernelArgs: 0x%08x, "
"kernelEntry: 0x%08x, sp: 0x%08x)\n",