Add legacy disabled bios read and add missing static types
* on RS600 > chips we now call avivo disabled bios read vs relying on shadow rom
This commit is contained in:
@@ -161,7 +161,7 @@ mapAtomBIOS(radeon_info &info, uint32 romBase, uint32 romSize)
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}
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status_t
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static status_t
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radeon_hd_getbios(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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@@ -240,7 +240,7 @@ radeon_hd_getbios(radeon_info &info)
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}
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status_t
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static status_t
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radeon_hd_getbios_ni(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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@@ -280,7 +280,7 @@ radeon_hd_getbios_ni(radeon_info &info)
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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ERROR("%s: No AtomBIOS location found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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@@ -308,7 +308,7 @@ radeon_hd_getbios_ni(radeon_info &info)
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}
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status_t
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static status_t
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radeon_hd_getbios_r700(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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@@ -352,7 +352,7 @@ radeon_hd_getbios_r700(radeon_info &info)
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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ERROR("%s: No AtomBIOS location found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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@@ -381,7 +381,7 @@ radeon_hd_getbios_r700(radeon_info &info)
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}
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status_t
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static status_t
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radeon_hd_getbios_r600(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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@@ -451,7 +451,7 @@ radeon_hd_getbios_r600(radeon_info &info)
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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ERROR("%s: No AtomBIOS location found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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@@ -490,6 +490,79 @@ radeon_hd_getbios_r600(radeon_info &info)
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}
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static status_t
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radeon_hd_getbios_avivo(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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uint32 sepromControl = read32(info.registers + RADEON_SEPROM_CNTL1);
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uint32 viphControl = read32(info.registers + RADEON_VIPH_CONTROL);
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uint32 busControl = read32(info.registers + RV370_BUS_CNTL);
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uint32 d1vgaControl = read32(info.registers + AVIVO_D1VGA_CONTROL);
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uint32 d2vgaControl = read32(info.registers + AVIVO_D2VGA_CONTROL);
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uint32 vgaRenderControl
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= read32(info.registers + AVIVO_VGA_RENDER_CONTROL);
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uint32 gpioPadA = read32(info.registers + RADEON_GPIOPAD_A);
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uint32 gpioPadEN = read32(info.registers + RADEON_GPIOPAD_EN);
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uint32 gpioPadMask = read32(info.registers + RADEON_GPIOPAD_MASK);
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write32(info.registers + RADEON_SEPROM_CNTL1,
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((sepromControl & ~RADEON_SCK_PRESCALE_MASK)
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| (0xc << RADEON_SCK_PRESCALE_SHIFT)));
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write32(info.registers + RADEON_GPIOPAD_A, 0);
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write32(info.registers + RADEON_GPIOPAD_EN, 0);
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write32(info.registers + RADEON_GPIOPAD_MASK, 0);
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// disable VIP
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write32(info.registers + RADEON_VIPH_CONTROL,
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(viphControl & ~RADEON_VIPH_EN));
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// enable the ROM
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write32(info.registers + RV370_BUS_CNTL,
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(busControl & ~RV370_BUS_BIOS_DIS_ROM));
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// disable VGA
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write32(info.registers + AVIVO_D1VGA_CONTROL,
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(d1vgaControl & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
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| AVIVO_DVGA_CONTROL_TIMING_SELECT)));
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write32(info.registers + AVIVO_D2VGA_CONTROL,
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(d2vgaControl & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
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| AVIVO_DVGA_CONTROL_TIMING_SELECT)));
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write32(info.registers + AVIVO_VGA_RENDER_CONTROL,
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(vgaRenderControl & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
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uint32 romBase = info.pci->u.h0.rom_base;
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uint32 romSize = info.pci->u.h0.rom_size;
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS location found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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}
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if (result == B_OK) {
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ERROR("%s: AtomBIOS found using disabled method at 0x%" B_PRIX32
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" [size: 0x%" B_PRIX32 "]\n", __func__, romBase, romSize);
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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}
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// restore registers
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write32(info.registers + RADEON_SEPROM_CNTL1, sepromControl);
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write32(info.registers + RADEON_VIPH_CONTROL, viphControl);
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write32(info.registers + RV370_BUS_CNTL, busControl);
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write32(info.registers + AVIVO_D1VGA_CONTROL, d1vgaControl);
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write32(info.registers + AVIVO_D2VGA_CONTROL, d2vgaControl);
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write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vgaRenderControl);
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write32(info.registers + RADEON_GPIOPAD_A, gpioPadA);
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write32(info.registers + RADEON_GPIOPAD_EN, gpioPadEN);
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write32(info.registers + RADEON_GPIOPAD_MASK, gpioPadMask);
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return result;
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}
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status_t
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radeon_hd_init(radeon_info &info)
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{
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@@ -621,7 +694,9 @@ radeon_hd_init(radeon_info &info)
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biosStatus = radeon_hd_getbios_r700(info);
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else if (info.chipsetID >= RADEON_R600)
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biosStatus = radeon_hd_getbios_r600(info);
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// else avivo_read_disabled_bios
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else if (info.chipsetID >= RADEON_RS600)
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biosStatus = radeon_hd_getbios_avivo(info);
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// else legacy_read_disabled_bios
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}
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if (biosStatus != B_OK) {
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