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* style fix

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ensure bitwise ands are compared to 0 or non 0 as per Axel


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42830 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-10-12 20:28:37 +00:00
parent 7934da0f09
commit dc223cc5a0
4 changed files with 44 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/accelerants/radeon_hd/bios.cpp
+3 -3
View File
@@ -73,7 +73,7 @@ radeon_bios_isposted()
+ EVERGREEN_CRTC0_REGISTER_OFFSET)
| Read32(OUT, EVERGREEN_CRTC_CONTROL
+ EVERGREEN_CRTC1_REGISTER_OFFSET);
if (reg & EVERGREEN_CRTC_MASTER_EN)
if ((reg & EVERGREEN_CRTC_MASTER_EN) != 0)
return true;
} else if (info.device_chipset >= RADEON_R1000) {
// evergreen or higher
@@ -89,13 +89,13 @@ radeon_bios_isposted()
+ EVERGREEN_CRTC4_REGISTER_OFFSET)
| Read32(OUT, EVERGREEN_CRTC_CONTROL
+ EVERGREEN_CRTC5_REGISTER_OFFSET);
if (reg & EVERGREEN_CRTC_MASTER_EN)
if ((reg & EVERGREEN_CRTC_MASTER_EN) != 0)
return true;
} else if (info.device_chipset > RADEON_R580) {
// avivio through r700
reg = Read32(OUT, AVIVO_D1CRTC_CONTROL) |
Read32(OUT, AVIVO_D2CRTC_CONTROL);
if (reg & AVIVO_CRTC_EN) {
if ((reg & AVIVO_CRTC_EN) != 0) {
return true;
}
}
src/add-ons/accelerants/radeon_hd/display.cpp
+12 -12
View File
@@ -260,7 +260,7 @@ detect_connectors_legacy()
gConnector[i]->valid = false;
// check if this connector is used
if (!(device_support & (1 << i)))
if ((device_support & (1 << i)) == 0)
continue;
if (i == ATOM_DEVICE_CV_INDEX) {
@@ -386,7 +386,7 @@ detect_connectors()
uint16 connector_object_id;
uint16 connector_flags = B_LENDIAN_TO_HOST_INT16(path->usDeviceTag);
if (device_support & connector_flags) {
if ((device_support & connector_flags) != 0) {
uint8 con_obj_id = (B_LENDIAN_TO_HOST_INT16(path->usConnObjectId)
& OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
@@ -472,8 +472,8 @@ detect_connectors()
case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
if (connector_flags
& ATOM_DEVICE_LCD_SUPPORT) {
if ((connector_flags
& ATOM_DEVICE_LCD_SUPPORT) != 0) {
encoder_type = VIDEO_ENCODER_LVDS;
// radeon_atombios_get_lvds_info
} else {
@@ -496,11 +496,11 @@ detect_connectors()
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
if (connector_flags
& ATOM_DEVICE_LCD_SUPPORT) {
if ((connector_flags
& ATOM_DEVICE_LCD_SUPPORT) != 0) {
encoder_type = VIDEO_ENCODER_LVDS;
} else if (connector_flags
& ATOM_DEVICE_CRT_SUPPORT) {
} else if ((connector_flags
& ATOM_DEVICE_CRT_SUPPORT) != 0) {
encoder_type = VIDEO_ENCODER_DAC;
} else {
encoder_type = VIDEO_ENCODER_TMDS;
@@ -516,11 +516,11 @@ detect_connectors()
case ENCODER_OBJECT_ID_HDMI_SI1930:
case ENCODER_OBJECT_ID_TRAVIS:
case ENCODER_OBJECT_ID_NUTMEG:
if (connector_flags
& ATOM_DEVICE_LCD_SUPPORT) {
if ((connector_flags
& ATOM_DEVICE_LCD_SUPPORT) != 0) {
encoder_type = VIDEO_ENCODER_LVDS;
} else if (connector_flags
& ATOM_DEVICE_CRT_SUPPORT) {
} else if ((connector_flags
& ATOM_DEVICE_CRT_SUPPORT) != 0) {
encoder_type = VIDEO_ENCODER_DAC;
} else {
encoder_type = VIDEO_ENCODER_TMDS;
src/add-ons/accelerants/radeon_hd/encoder.cpp
+26 -26
View File
@@ -66,8 +66,8 @@ encoder_assign_crtc(uint8 crtc_id)
break;
case ENCODER_OBJECT_ID_INTERNAL_LVDS:
case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
if (gConnector[connector_index]->flags
& ATOM_DEVICE_LCD1_SUPPORT)
if ((gConnector[connector_index]->flags
& ATOM_DEVICE_LCD1_SUPPORT) != 0)
args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX;
else
args.v1.ucDevice = ATOM_DEVICE_DFP3_INDEX;
@@ -237,7 +237,7 @@ encoder_digital_setup(uint8 id, uint32 pixelClock, int command)
index = GetIndexIntoMasterTable(COMMAND, TMDS1EncoderControl);
break;
case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
if (connector_flags & ATOM_DEVICE_LCD_SUPPORT)
if ((connector_flags & ATOM_DEVICE_LCD_SUPPORT) != 0)
index = GetIndexIntoMasterTable(COMMAND, LVDSEncoderControl);
else
index = GetIndexIntoMasterTable(COMMAND, TMDS2EncoderControl);
@@ -260,7 +260,7 @@ encoder_digital_setup(uint8 id, uint32 pixelClock, int command)
args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
args.v1.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
if (connector_flags & (ATOM_DEVICE_LCD_SUPPORT)) {
if ((connector_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
// TODO : laptop display support
//if (dig->lcd_misc & ATOM_PANEL_MISC_DUAL)
// args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
@@ -290,7 +290,7 @@ encoder_digital_setup(uint8 id, uint32 pixelClock, int command)
args.v2.ucSpatial = 0;
args.v2.ucTemporal = 0;
args.v2.ucFRC = 0;
if (connector_flags & ATOM_DEVICE_LCD_SUPPORT) {
if ((connector_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
// TODO : laptop display support
//if (dig->lcd_misc & ATOM_PANEL_MISC_DUAL)
// args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
@@ -377,35 +377,35 @@ encoder_crtc_scratch(uint8 crtc_id)
// TODO : r500
uint32 bios_3_scratch = Read32(OUT, R600_BIOS_3_SCRATCH);
if (encoder_flags & ATOM_DEVICE_TV1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 18);
}
if (encoder_flags & ATOM_DEVICE_CV_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CV_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 24);
}
if (encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 16);
}
if (encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 20);
}
if (encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 17);
}
if (encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 19);
}
if (encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 23);
}
if (encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE;
bios_3_scratch |= (crtc_id << 25);
}
@@ -426,61 +426,61 @@ encoder_dpms_scratch(uint8 crtc_id, bool power)
// TODO : r500
uint32 bios_2_scratch = Read32(OUT, R600_BIOS_2_SCRATCH);
if (encoder_flags & ATOM_DEVICE_TV1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_TV1_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_CV_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CV_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_CV_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CRT1_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_CRT2_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_LCD1_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP1_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP2_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP3_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_DFP4_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP4_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE;
else
bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE;
}
if (encoder_flags & ATOM_DEVICE_DFP5_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_DFP5_SUPPORT) != 0) {
if (power == true)
bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE;
else
@@ -527,7 +527,7 @@ encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
break;
case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
if (encoder_flags & ATOM_DEVICE_LCD_SUPPORT)
if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0)
index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
else
index = GetIndexIntoMasterTable(COMMAND, LVTMAOutputControl);
@@ -556,7 +556,7 @@ encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
case B_DPMS_ON:
args.ucAction = ATOM_ENABLE;
atom_execute_table(gAtomContext, index, (uint32*)&args);
if (encoder_flags & ATOM_DEVICE_LCD_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
args.ucAction = ATOM_LCD_BLON;
atom_execute_table(gAtomContext, index, (uint32*)&args);
}
@@ -567,7 +567,7 @@ encoder_dpms_set(uint8 crtc_id, uint8 encoder_id, int mode)
case B_DPMS_OFF:
args.ucAction = ATOM_DISABLE;
atom_execute_table(gAtomContext, index, (uint32*)&args);
if (encoder_flags & ATOM_DEVICE_LCD_SUPPORT) {
if ((encoder_flags & ATOM_DEVICE_LCD_SUPPORT) != 0) {
args.ucAction = ATOM_LCD_BLOFF;
atom_execute_table(gAtomContext, index, (uint32*)&args);
}
src/add-ons/accelerants/radeon_hd/gpu.cpp
+3 -3
View File
@@ -35,7 +35,7 @@ radeon_gpu_reset()
radeon_shared_info &info = *gInfo->shared_info;
// Read GRBM Command Processor status
if (!(Read32(OUT, GRBM_STATUS) & GUI_ACTIVE))
if ((Read32(OUT, GRBM_STATUS) & GUI_ACTIVE) == 0)
return B_ERROR;
TRACE("%s: GPU software reset in progress...\n", __func__);
@@ -95,8 +95,8 @@ radeon_gpu_reset()
uint32 tmp;
/* Check if any of the rendering block is busy and reset it */
if ((Read32(OUT, GRBM_STATUS) & grbm_busy_mask)
|| (Read32(OUT, GRBM_STATUS2) & grbm2_busy_mask)) {
if ((Read32(OUT, GRBM_STATUS) & grbm_busy_mask) != 0
|| (Read32(OUT, GRBM_STATUS2) & grbm2_busy_mask) != 0) {
tmp = SOFT_RESET_CR
| SOFT_RESET_DB
| SOFT_RESET_CB