PCI: moved IDE api flags to PCI.h
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@@ -327,6 +327,18 @@ struct pci_module_info {
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#define PCI_nvm 0x08 /* NVM Express controller */
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#define PCI_mass_storage_other 0x80 /* other mass storage controller */
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/* ---
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bit mask of the class_api field for
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class_base = 0x01 (mass storage)
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class_sub = 0x01 (IDE controller)
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--- */
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#define PCI_ide_primary_native 0x01 /* primary channel is in native mode */
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#define PCI_ide_primary_fixed 0x02 /* primary channel can be switched to native mode */
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#define PCI_ide_secondary_native 0x04 /* secondary channel is in native mode */
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#define PCI_ide_secondary_fixed 0x08 /* secondary channel can be switched to native mode */
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#define PCI_ide_master 0x80 /* master device */
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/* ---
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values of the class_api field for
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class_base = 0x01 (mass storage)
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@@ -55,15 +55,6 @@ enum {
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// offset of PRDT register; content must be dword-aligned
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};
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// bit mask in class_api of PCI configuration
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// (for adapters that can run in compatability mode)
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enum {
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ATA_API_PRIMARY_NATIVE = 1, // primary channel is in native mode
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ATA_API_PRIMARY_FIXED = 2, // primary channel can be switched to native mode
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ATA_API_SECONDARY_NATIVE = 4, // secondary channel is in native mode
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ATA_API_SECONDARY_FIXED = 8 // secondary channel can be switched to native mode
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};
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// (maximum) size of S/G table
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// there are so many restrictions that we want to keep it inside one page
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@@ -56,15 +56,6 @@ enum {
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// offset of PRDT register; content must be dword-aligned
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};
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// bit mask in class_api of PCI configuration
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// (for adapters that can run in compatability mode)
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enum {
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IDE_API_PRIMARY_NATIVE = 1, // primary channel is in native mode
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IDE_API_PRIMARY_FIXED = 2, // primary channel can be switched to native mode
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IDE_API_SECONDARY_NATIVE = 4, // secondary channel is in native mode
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IDE_API_SECONDARY_FIXED = 8 // secondary channel can be switched to native mode
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};
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// (maximum) size of S/G table
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// there are so many restrictions that we want to keep it inside one page
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@@ -538,14 +538,14 @@ ata_adapter_detect_channel(pci_device_module_info *pci, pci_device *pci_device,
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api = pci->read_pci_config(pci_device, PCI_class_api, 1);
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if (supports_compatibility_mode
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&& channel_index == 0 && (api & ATA_API_PRIMARY_NATIVE) == 0) {
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&& channel_index == 0 && (api & PCI_ide_primary_native) == 0) {
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command_block_base = 0x1f0;
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control_block_base = 0x3f6;
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intnum = 14;
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TRACE("PCI-ATA: Controller in legacy mode: cmd %#x, ctrl %#x, irq %d\n",
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command_block_base, control_block_base, intnum);
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} else if (supports_compatibility_mode
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&& channel_index == 1 && (api & ATA_API_SECONDARY_NATIVE) == 0) {
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&& channel_index == 1 && (api & PCI_ide_secondary_native) == 0) {
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command_block_base = 0x170;
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control_block_base = 0x376;
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intnum = 15;
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@@ -518,14 +518,14 @@ ide_adapter_detect_channel(pci_device_module_info *pci, pci_device *pci_device,
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api = pci->read_pci_config(pci_device, PCI_class_api, 1);
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if (supports_compatibility_mode
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&& channel_index == 0 && (api & IDE_API_PRIMARY_NATIVE) == 0) {
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&& channel_index == 0 && (api & PCI_ide_primary_native) == 0) {
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command_block_base = 0x1f0;
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control_block_base = 0x3f6;
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intnum = 14;
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TRACE("PCI-IDE: Controller in legacy mode: cmd %#x, ctrl %#x, irq %d\n",
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command_block_base, control_block_base, intnum);
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} else if (supports_compatibility_mode
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&& channel_index == 1 && (api & IDE_API_SECONDARY_NATIVE) == 0) {
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&& channel_index == 1 && (api & PCI_ide_secondary_native) == 0) {
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command_block_base = 0x170;
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control_block_base = 0x376;
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intnum = 15;
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