ahci: Disable tracing, make tracing more chatty
* AHCI has been shipping with tracing enabled which account for most of the chatty messages in #12634 * Instead of covering up a bunch of AHCI trace messages, lets disable tracing by default and make tracing more chatty overall. * Tracing now should give you a ton of insight into whats going on to an obnoxious degree. Disable tracing and things are silent (minus the nice link port speed)
This commit is contained in:
@@ -30,7 +30,7 @@
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#include "util.h"
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#define TRACE_AHCI
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//#define TRACE_AHCI
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#ifdef TRACE_AHCI
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# define TRACE(a...) dprintf("ahci: " a)
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#else
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@@ -284,19 +284,21 @@ AHCIPort::Probe()
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return B_ERROR;
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}
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switch (fRegs->ssts & HBA_PORT_SPD_MASK) {
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case 0x10:
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TRACE("%s: port %d link speed 1.5Gb/s\n", __func__, fIndex);
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break;
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case 0x20:
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TRACE("%s: port %d link speed 3.0Gb/s\n", __func__, fIndex);
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break;
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case 0x30:
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TRACE("%s: port %d link speed 6.0Gb/s\n", __func__, fIndex);
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break;
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default:
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TRACE("%s: port %d link speed unrestricted\n", __func__, fIndex);
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break;
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if (!fTestUnitReadyActive) {
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switch (fRegs->ssts & HBA_PORT_SPD_MASK) {
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case 0x10:
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ERROR("%s: port %d link speed 1.5Gb/s\n", __func__, fIndex);
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break;
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case 0x20:
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ERROR("%s: port %d link speed 3.0Gb/s\n", __func__, fIndex);
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break;
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case 0x30:
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ERROR("%s: port %d link speed 6.0Gb/s\n", __func__, fIndex);
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break;
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default:
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ERROR("%s: port %d link speed unrestricted\n", __func__, fIndex);
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break;
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}
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}
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wait_until_clear(&fRegs->tfd, ATA_STATUS_BUSY, 31000000);
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@@ -310,11 +312,9 @@ AHCIPort::Probe()
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fRegs->cmd &= ~PORT_CMD_ATAPI;
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FlushPostedWrites();
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if (!fTestUnitReadyActive) {
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TRACE("device signature 0x%08" B_PRIx32 " (%s)\n", fRegs->sig,
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fRegs->sig == SATA_SIG_ATAPI ? "ATAPI" : fRegs->sig == SATA_SIG_ATA
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? "ATA" : "unknown");
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}
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TRACE("device signature 0x%08" B_PRIx32 " (%s)\n", fRegs->sig,
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fRegs->sig == SATA_SIG_ATAPI ? "ATAPI" : fRegs->sig == SATA_SIG_ATA
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? "ATA" : "unknown");
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return B_OK;
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}
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@@ -381,40 +381,35 @@ AHCIPort::Interrupt()
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void
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AHCIPort::InterruptErrorHandler(uint32 is)
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{
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uint32 ci = fRegs->ci;
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if (!fTestUnitReadyActive) {
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TRACE("AHCIPort::InterruptErrorHandler port %d, fCommandsActive 0x%08"
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B_PRIx32 ", is 0x%08" B_PRIx32 ", ci 0x%08" B_PRIx32 "\n", fIndex,
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fCommandsActive, is, ci);
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TRACE("ssts 0x%08" B_PRIx32 "\n", fRegs->ssts);
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TRACE("sctl 0x%08" B_PRIx32 "\n", fRegs->sctl);
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TRACE("serr 0x%08" B_PRIx32 "\n", fRegs->serr);
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TRACE("sact 0x%08" B_PRIx32 "\n", fRegs->sact);
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}
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TRACE("AHCIPort::InterruptErrorHandler port %d, fCommandsActive 0x%08"
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B_PRIx32 ", is 0x%08" B_PRIx32 ", ci 0x%08" B_PRIx32 "\n", fIndex,
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fCommandsActive, is, fRegs->ci);
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TRACE("ssts 0x%08" B_PRIx32 "\n", fRegs->ssts);
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TRACE("sctl 0x%08" B_PRIx32 "\n", fRegs->sctl);
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TRACE("serr 0x%08" B_PRIx32 "\n", fRegs->serr);
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TRACE("sact 0x%08" B_PRIx32 "\n", fRegs->sact);
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// read and clear SError
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_ClearErrorRegister();
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if (is & PORT_INT_TFE) {
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if (!fTestUnitReadyActive)
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TRACE("Task File Error\n");
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TRACE("Task File Error\n");
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fPortReset = true;
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fError = true;
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}
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if (is & PORT_INT_HBF) {
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TRACE("Host Bus Fatal Error\n");
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ERROR("Host Bus Fatal Error\n");
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fPortReset = true;
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fError = true;
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}
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if (is & PORT_INT_HBD) {
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TRACE("Host Bus Data Error\n");
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ERROR("Host Bus Data Error\n");
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fPortReset = true;
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fError = true;
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}
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if (is & PORT_INT_IF) {
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TRACE("Interface Fatal Error\n");
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ERROR("Interface Fatal Error\n");
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fPortReset = true;
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fError = true;
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}
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@@ -468,7 +463,7 @@ AHCIPort::FillPrdTable(volatile prd* prdTable, int* prdCount, int prdMax,
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status_t status = get_memory_map_etc(B_CURRENT_TEAM, data, dataSize,
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entries, &entriesUsed);
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if (status != B_OK) {
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TRACE("%s: get_memory_map() failed: %s\n", __func__, strerror(status));
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ERROR("%s: get_memory_map() failed: %s\n", __func__, strerror(status));
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return B_ERROR;
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}
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@@ -489,14 +484,14 @@ AHCIPort::FillPrdTable(volatile prd* prdTable, int* prdCount, int prdMax,
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FLOW("FillPrdTable: sg-entry addr %#" B_PRIxPHYSADDR ", size %lu\n",
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address, size);
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if (address & 1) {
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TRACE("AHCIPort::FillPrdTable: data alignment error\n");
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ERROR("AHCIPort::FillPrdTable: data alignment error\n");
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return B_ERROR;
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}
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dataSize -= size;
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while (size > 0) {
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size_t bytes = min_c(size, PRD_MAX_DATA_LENGTH);
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if (*prdCount == prdMax) {
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TRACE("AHCIPort::FillPrdTable: prd table exhausted\n");
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ERROR("AHCIPort::FillPrdTable: prd table exhausted\n");
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return B_ERROR;
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}
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FLOW("FillPrdTable: prd-entry %u, addr %p, size %lu\n",
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@@ -515,11 +510,11 @@ AHCIPort::FillPrdTable(volatile prd* prdTable, int* prdCount, int prdMax,
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sgCount--;
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}
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if (*prdCount == 0) {
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TRACE("%s: count is 0\n", __func__);
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ERROR("%s: count is 0\n", __func__);
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return B_ERROR;
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}
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if (dataSize > 0) {
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TRACE("AHCIPort::FillPrdTable: sg table %ld bytes too small\n",
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ERROR("AHCIPort::FillPrdTable: sg table %ld bytes too small\n",
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dataSize);
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return B_ERROR;
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}
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@@ -734,12 +729,14 @@ AHCIPort::ScsiInquiry(scsi_ccb* request)
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if (fMaxTrimRangeBlocks == 0)
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fMaxTrimRangeBlocks = 1;
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#ifdef TRACE_AHCI
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bool deterministic = ataData.supports_deterministic_read_after_trim;
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TRACE("trim supported, %" B_PRIu32 " ranges blocks, reads are "
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"%sdeterministic%s.\n", fMaxTrimRangeBlocks,
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deterministic ? "" : "non-", deterministic
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? (ataData.supports_read_zero_after_trim
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? ", zero" : ", random") : "");
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#endif
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}
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}
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@@ -811,7 +808,7 @@ AHCIPort::ScsiSynchronizeCache(scsi_ccb* request)
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sata_request* sreq = new(std::nothrow) sata_request(request);
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if (sreq == NULL) {
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TRACE("out of memory when allocating sync request\n");
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ERROR("out of memory when allocating sync request\n");
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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return;
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@@ -981,7 +978,7 @@ for (uint32 i = 0; i < scsiRangeCount; i++) {
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uint32 lbaRangesSize = lbaRangeCount * sizeof(uint64);
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uint64* lbaRanges = (uint64*)malloc(lbaRangesSize);
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if (lbaRanges == NULL) {
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TRACE("out of memory when allocating %" B_PRIu32 " unmap ranges\n",
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ERROR("out of memory when allocating %" B_PRIu32 " unmap ranges\n",
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lbaRangeCount);
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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@@ -1037,7 +1034,7 @@ for (uint32 i = 0; i < lbaRangeCount; i++) {
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sreq.WaitForCompletion();
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if ((sreq.CompletionStatus() & ATA_STATUS_ERROR) != 0) {
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TRACE("trim failed (%" B_PRIu32 " ranges)!\n", lbaRangeCount);
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ERROR("trim failed (%" B_PRIu32 " ranges)!\n", lbaRangeCount);
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request->subsys_status = SCSI_REQ_CMP_ERR;
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} else
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request->subsys_status = SCSI_REQ_CMP;
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@@ -1093,7 +1090,7 @@ AHCIPort::ExecuteSataRequest(sata_request* request, bool isWrite)
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if (wait_until_clear(&fRegs->tfd, ATA_STATUS_BUSY | ATA_STATUS_DATA_REQUEST,
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1000000) < B_OK) {
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TRACE("ExecuteAtaRequest port %d: device is busy\n", fIndex);
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ERROR("ExecuteAtaRequest port %d: device is busy\n", fIndex);
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PortReset();
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FinishTransfer();
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request->Abort();
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@@ -1140,7 +1137,7 @@ AHCIPort::ExecuteSataRequest(sata_request* request, bool isWrite)
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FinishTransfer();
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if (status == B_TIMED_OUT) {
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TRACE("ExecuteAtaRequest port %d: device timeout\n", fIndex);
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ERROR("ExecuteAtaRequest port %d: device timeout\n", fIndex);
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request->Abort();
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return;
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}
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@@ -1175,7 +1172,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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sata_request* sreq = new(std::nothrow) sata_request(request);
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if (sreq == NULL) {
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TRACE("out of memory when allocating atapi request\n");
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ERROR("out of memory when allocating atapi request\n");
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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return;
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@@ -1246,7 +1243,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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if (length) {
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ScsiReadWrite(request, position, length, isWrite);
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} else {
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TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
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ERROR("AHCIPort::ScsiExecuteRequest error: transfer without "
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"data!\n");
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request->subsys_status = SCSI_REQ_INVALID;
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gSCSI->finished(request, 1);
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@@ -1263,7 +1260,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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if (length) {
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ScsiReadWrite(request, position, length, isWrite);
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} else {
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TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
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ERROR("AHCIPort::ScsiExecuteRequest error: transfer without "
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"data!\n");
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request->subsys_status = SCSI_REQ_INVALID;
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gSCSI->finished(request, 1);
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@@ -1280,7 +1277,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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if (length) {
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ScsiReadWrite(request, position, length, isWrite);
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} else {
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TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
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ERROR("AHCIPort::ScsiExecuteRequest error: transfer without "
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"data!\n");
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request->subsys_status = SCSI_REQ_INVALID;
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gSCSI->finished(request, 1);
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@@ -1292,7 +1289,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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const scsi_cmd_unmap* cmd = (const scsi_cmd_unmap*)request->cdb;
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if (!fTrimSupported) {
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TRACE("%s port %d: unsupported request opcode 0x%02x\n",
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ERROR("%s port %d: unsupported request opcode 0x%02x\n",
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__func__, fIndex, request->cdb[0]);
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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@@ -1305,7 +1302,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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|| B_BENDIAN_TO_HOST_INT16(cmd->length) != request->data_length
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|| B_BENDIAN_TO_HOST_INT16(unmapBlocks->data_length)
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!= request->data_length - 1) {
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TRACE("%s port %d: invalid unmap parameter data length\n",
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ERROR("%s port %d: invalid unmap parameter data length\n",
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__func__, fIndex);
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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@@ -1315,7 +1312,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb* request)
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break;
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}
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default:
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TRACE("AHCIPort::ScsiExecuteRequest port %d unsupported request "
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ERROR("AHCIPort::ScsiExecuteRequest port %d unsupported request "
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"opcode 0x%02x\n", fIndex, request->cdb[0]);
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request->subsys_status = SCSI_REQ_ABORTED;
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gSCSI->finished(request, 1);
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@@ -1362,19 +1359,20 @@ AHCIPort::Enable()
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{
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// Spec v1.3.1, §10.3.1 Start (PxCMD.ST)
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TRACE("%s: port %d\n", __func__, fIndex);
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if ((fRegs->cmd & PORT_CMD_ST) != 0) {
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TRACE("%s: Starting port already running!\n", __func__);
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ERROR("%s: Starting port already running!\n", __func__);
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return false;
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}
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if ((fRegs->cmd & PORT_CMD_FRE) == 0) {
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TRACE("%s: Unable to start port without FRE enabled!\n", __func__);
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ERROR("%s: Unable to start port without FRE enabled!\n", __func__);
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return false;
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}
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// Clear DMA engine and wait for completion
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if (wait_until_clear(&fRegs->cmd, PORT_CMD_CR, 500000) < B_OK) {
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TRACE("%s: port %d error DMA engine still running\n", __func__,
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ERROR("%s: port %d error DMA engine still running\n", __func__,
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fIndex);
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return false;
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}
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@@ -1403,7 +1401,7 @@ AHCIPort::Disable()
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// Spec v1.3.1, §10.4.2 Port Reset - assume hung after 500 mil.
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// Clear DMA engine and wait for completion
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if (wait_until_clear(&fRegs->cmd, PORT_CMD_CR, 500000) < B_OK) {
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TRACE("%s: port %d error DMA engine still running\n", __func__,
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ERROR("%s: port %d error DMA engine still running\n", __func__,
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fIndex);
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return false;
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}
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