Some enum definitions were also defining variables.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37197 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -222,14 +222,14 @@ enum {
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// packet
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ide_mask_byte_count = 0x18,
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// packet and dma queued result
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ide_mask_error = 0x01,
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ide_mask_ireason = 0x02,
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ide_mask_device_head = 0x20,
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ide_mask_command = 0x40,
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ide_mask_status = 0x40,
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// for 48 bits, the following flags tell which registers to load twice
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@@ -238,7 +238,7 @@ enum {
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ide_mask_LBA_low_48 = 0x200 | ide_mask_LBA_low,
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ide_mask_LBA_mid_48 = 0x400 | ide_mask_LBA_mid,
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ide_mask_LBA_high_48 = 0x800 | ide_mask_LBA_high,
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ide_mask_HOB = 0xf80
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}; // ide_reg_mask
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@@ -256,7 +256,7 @@ enum {
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ide_status_df = 0x20, // packet: disk failure
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ide_status_drdy = 0x40, // device ready
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ide_status_bsy = 0x80 // busy
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} ide_status_mask;
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}; // ide_status_mask
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// device control register
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enum {
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@@ -266,7 +266,7 @@ enum {
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ide_devctrl_bit3 = 0x08, // don't know, but must be set
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// bits inbetween are reserved
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ide_devctrl_hob = 0x80 // read high order byte (for 48-bit lba)
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} ide_devcntrl_mask;
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}; // ide_devcntrl_mask
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// error register - most bits are command specific
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enum {
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@@ -286,7 +286,7 @@ enum {
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ide_error_idnf = 0x10, // CHS translation not init./ invalid CHS address
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ide_error_mcr = 0x08, // media change requested
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ide_error_nm = 0x02, // no media (for removable media devices)
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} ide_error_mask;
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}; // ide_error_mask
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typedef struct ide_channel_info *ide_channel_cookie;
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