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Allocating additional memory should now work on the i965 as well (but bad things

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will happen on earlier i9xx chips for now...). Not yet tested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22589 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2007-10-16 16:52:34 +00:00
parent b24bb37c3b
commit e7e325508b
3 changed files with 24 additions and 4 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+4 -1
View File
@@ -158,7 +158,10 @@ struct intel_free_graphics_memory {
#define INTEL_PAGE_TABLE_CONTROL 0x02020
#define INTEL_PAGE_TABLE_ERROR 0x02024
#define INTEL_HARDWARE_STATUS_PAGE 0x02080
#define INTEL_GTT_BASE 0x10000 // (- 0x2ffff)
#define i830_GTT_BASE 0x10000 // (- 0x2ffff)
#define i830_GTT_SIZE 0x20000
#define i965_GTT_BASE 0x80000 // (- 0xfffff)
#define i965_GTT_SIZE 0x80000
#define GTT_ENTRY_VALID 0x01
#define GTT_ENTRY_LOCAL_MEMORY 0x02
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
+18 -3
View File
@@ -191,7 +191,7 @@ determine_stolen_memory_size(intel_info &info)
static void
set_gtt_entry(intel_info &info, uint32 offset, uint8 *physicalAddress)
{
write32(info.registers + INTEL_GTT_BASE + (offset >> 10),
write32(info.gtt_base + (offset >> 10),
(uint32)physicalAddress | GTT_ENTRY_VALID);
}
@@ -391,6 +391,21 @@ intel_extreme_init(intel_info &info)
if (info.memory_manager == NULL)
return B_NO_MEMORY;
if ((info.device_type & INTEL_TYPE_9xx) != 0) {
if ((info.device_type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_965) {
info.gtt_base = info.registers + i965_GTT_BASE;
info.gtt_size = i965_GTT_SIZE;
} else {
// TODO: map it in???
info.gtt_base = (uint8*)info.pci->u.h0.base_register_sizes[3];
info.gtt_size = i830_GTT_SIZE;
// TODO: for now...
}
} else {
info.gtt_base = info.registers + i830_GTT_BASE;
info.gtt_size = i830_GTT_SIZE;
}
// reserve ring buffer memory (currently, this memory is placed in
// the graphics memory), but this could bring us problems with
// write combining...
@@ -474,11 +489,11 @@ intel_extreme_init(intel_info &info)
physical_entry physicalEntry;
get_memory_map(additionalMemory + offset - stolenSize,
totalSize - offset, &physicalEntry, 1);
for (size_t i = 0; i < physicalEntry.size; i += B_PAGE_SIZE) {
set_gtt_entry(info, offset + i, (uint8 *)physicalEntry.address + i);
}
offset += physicalEntry.size;
}
}
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme_private.h
+2
View File
@@ -29,6 +29,8 @@ struct intel_info {
struct overlay_registers *overlay_registers;
// update buffer, shares an area with shared_info
uint8 *gtt_base;
size_t gtt_size;
uint8 *graphics_memory;
area_id graphics_memory_area;
area_id additional_memory_area;