MMU: Clean up arm L1 MMU types
* Include map for each page table type * Reduce MMU_TYPE define name length
This commit is contained in:
@@ -1,32 +1,48 @@
|
||||
/*
|
||||
* Copyright 2010-2012 Haiku, Inc. All rights reserved.
|
||||
* Distributed under the terms of the MIT License.
|
||||
*
|
||||
* Authors:
|
||||
* Francois Revol
|
||||
* Ithamar R. Adema, [email protected]
|
||||
* Alexander von Gluck, [email protected]
|
||||
*/
|
||||
#ifndef _ARCH_ARM_ARM_MMU_H
|
||||
#define _ARCH_ARM_ARM_MMU_H
|
||||
|
||||
|
||||
/*
|
||||
* generic arm mmu definitions
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* defines for the page directory (aka Master/Section Table)
|
||||
* L1 defines for the page directory (page table walk methods)
|
||||
*/
|
||||
#define MMU_L1_TYPE_FAULT 0x0
|
||||
// MMU Fault
|
||||
// 31 2 10
|
||||
// | |00|
|
||||
#define MMU_L1_TYPE_SECTION 0x2
|
||||
// Single step table walk, 4096 entries
|
||||
// 1024K pages, 16K consumed
|
||||
// 31 20 19 12 11 10 9 8 5 432 10
|
||||
// | page table address | 0? | AP |0| domain |1CB|10|
|
||||
#define MMU_L1_TYPE_FINE 0x3
|
||||
// Three(?) step table walk, 1024 entries
|
||||
// 1K, 4K, 64K pages, 4K consumed
|
||||
// 31 12 11 9 8 5 432 10
|
||||
// | page table address | 0? | domain |100|11|
|
||||
#define MMU_L1_TYPE_COARSE 0x1
|
||||
// Two step table walk, 256 entries
|
||||
// 4K(Haiku), 64K pages, 1K consumed
|
||||
// 31 10 9 8 5 432 10
|
||||
// | page table address |0| domain |000|01|
|
||||
|
||||
#define MMU_L1_TYPE_COARSEPAGETABLE 0x1
|
||||
//only type used in Haiku by now (4k pages)
|
||||
|
||||
// coarse pagetable entry :
|
||||
//
|
||||
// 31 10 9 8 5 432 10
|
||||
// | page table address |?| domain |000|01
|
||||
//
|
||||
// the domain is not used so and the ? is implementation specified... have not
|
||||
// found it in the cortex A8 reference... so I set t to 0
|
||||
// page table must obviously be on multiple of 1KB
|
||||
|
||||
#define MMU_L1_TYPE_SECTION 0x2
|
||||
//map 1MB directly instead of using a page table (not used)
|
||||
#define MMU_L1_TYPE_FINEEPAGETABLE 0x3
|
||||
//map 1kb pages (not used and not supported on newer ARMs)
|
||||
|
||||
/*
|
||||
* L2-Page descriptors... now things get really complicated...
|
||||
* there are three different types of pages large pages (64KB) and small(4KB)
|
||||
|
||||
@@ -246,10 +246,10 @@ get_next_page_table(uint32 type)
|
||||
|
||||
size_t size = 0;
|
||||
switch(type) {
|
||||
case MMU_L1_TYPE_COARSEPAGETABLE:
|
||||
case MMU_L1_TYPE_COARSE:
|
||||
size = 1024;
|
||||
break;
|
||||
case MMU_L1_TYPE_FINEEPAGETABLE:
|
||||
case MMU_L1_TYPE_FINE:
|
||||
size = 4096;
|
||||
break;
|
||||
}
|
||||
@@ -281,12 +281,12 @@ init_page_directory()
|
||||
|
||||
// clear out the pgdir
|
||||
for (uint32 i = 0; i < 4096; i++)
|
||||
sPageDirectory[i] = 0;
|
||||
sPageDirectory[i] = 0;
|
||||
|
||||
uint32 *pageTable = NULL;
|
||||
for (uint32 i = 0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++) {
|
||||
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
TRACE("BLOCK: %s START: %lx END %lx\n", LOADER_MEMORYMAP[i].name,
|
||||
LOADER_MEMORYMAP[i].start, LOADER_MEMORYMAP[i].end);
|
||||
addr_t pos = LOADER_MEMORYMAP[i].start;
|
||||
@@ -299,8 +299,8 @@ init_page_directory()
|
||||
if (c > 255) { // we filled a pagetable => we need a new one
|
||||
// there is 1MB per pagetable so:
|
||||
sPageDirectory[VADDR_TO_PDENT(pos)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
c = 0;
|
||||
}
|
||||
|
||||
@@ -309,7 +309,7 @@ init_page_directory()
|
||||
|
||||
if (c > 0) {
|
||||
sPageDirectory[VADDR_TO_PDENT(pos)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
}
|
||||
}
|
||||
TRACE("%s: Page table setup complete\n", __func__);
|
||||
@@ -340,7 +340,7 @@ add_page_table(addr_t base)
|
||||
TRACE("%s: base = %p\n", __func__, (void *)base);
|
||||
|
||||
// Get new page table and clear it out
|
||||
uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
/*
|
||||
if (pageTable > (uint32 *)(8 * 1024 * 1024)) {
|
||||
panic("tried to add page table beyond the indentity mapped 8 MB "
|
||||
@@ -352,7 +352,7 @@ add_page_table(addr_t base)
|
||||
|
||||
// put the new page table into the page directory
|
||||
sPageDirectory[VADDR_TO_PDENT(base)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -256,10 +256,10 @@ get_next_page_table(uint32 type)
|
||||
"%p, type 0x%lx\n", sNextPageTableAddress, kPageTableRegionEnd, type));
|
||||
size_t size = 0;
|
||||
switch(type) {
|
||||
case MMU_L1_TYPE_COARSEPAGETABLE:
|
||||
case MMU_L1_TYPE_COARSE:
|
||||
size = 1024;
|
||||
break;
|
||||
case MMU_L1_TYPE_FINEEPAGETABLE:
|
||||
case MMU_L1_TYPE_FINE:
|
||||
size = 4096;
|
||||
break;
|
||||
}
|
||||
@@ -296,7 +296,7 @@ init_page_directory()
|
||||
uint32 *pageTable = NULL;
|
||||
for (uint32 i = 0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++) {
|
||||
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
TRACE(("BLOCK: %s START: %lx END %lx\n", LOADER_MEMORYMAP[i].name,
|
||||
LOADER_MEMORYMAP[i].start, LOADER_MEMORYMAP[i].end));
|
||||
addr_t pos = LOADER_MEMORYMAP[i].start;
|
||||
@@ -309,8 +309,8 @@ init_page_directory()
|
||||
if (c > 255) { // we filled a pagetable => we need a new one
|
||||
// there is 1MB per pagetable so:
|
||||
sPageDirectory[VADDR_TO_PDENT(pos)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
c = 0;
|
||||
}
|
||||
|
||||
@@ -319,7 +319,7 @@ init_page_directory()
|
||||
|
||||
if (c > 0) {
|
||||
sPageDirectory[VADDR_TO_PDENT(pos)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -345,7 +345,7 @@ add_page_table(addr_t base)
|
||||
TRACE(("add_page_table(base = %p)\n", (void *)base));
|
||||
|
||||
// Get new page table and clear it out
|
||||
uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
|
||||
uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
|
||||
/*
|
||||
if (pageTable > (uint32 *)(8 * 1024 * 1024)) {
|
||||
panic("tried to add page table beyond the indentity mapped 8 MB "
|
||||
@@ -357,7 +357,7 @@ add_page_table(addr_t base)
|
||||
|
||||
// put the new page table into the page directory
|
||||
sPageDirectory[VADDR_TO_PDENT(base)]
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
|
||||
= (uint32)pageTable | MMU_L1_TYPE_COARSE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user