intel_extreme: Set FDI PLL RX lane count when enabling
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@@ -878,6 +878,10 @@ struct intel_free_graphics_memory {
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#define FDI_TX_ENHANCE_FRAME_ENABLE (1 << 18)
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#define FDI_TX_PLL_ENABLED (1 << 14)
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#define FDI_DP_PORT_WIDTH_SHIFT 19
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#define FDI_DP_PORT_WIDTH_MASK (7 << FDI_DP_PORT_WIDTH_SHIFT)
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#define FDI_DP_PORT_WIDTH(width) (((width) - 1) << FDI_DP_PORT_WIDTH_SHIFT)
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#define FDI_PLL_BIOS_0 0x46000
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#define FDI_PLL_FB_CLOCK_MASK 0xff
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#define FDI_PLL_BIOS_1 0x46004
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