arm64: Implement VMSAv8TranslationMap::Protect in terms of ProcessRange.
Change-Id: I2825d265fec69c2ae033ee09ff0ead9b098a7ca9 Reviewed-on: https://review.haiku-os.org/c/haiku/+/8160 Tested-by: Commit checker robot <[email protected]> Reviewed-by: Fredrik Holmqvist <[email protected]>
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waddlesplash
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@@ -801,7 +801,7 @@ status_t
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VMSAv8TranslationMap::Protect(addr_t start, addr_t end, uint32 attributes, uint32 memoryType)
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{
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ThreadCPUPinner pinner(thread_get_current_thread());
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uint64_t attr = GetMemoryAttr(attributes, memoryType, fIsKernel);
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size_t size = end - start + 1;
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uint64_t pageMask = (1UL << fPageBits) - 1;
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@@ -811,8 +811,23 @@ VMSAv8TranslationMap::Protect(addr_t start, addr_t end, uint32 attributes, uint3
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ASSERT((size & pageMask) == 0);
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ASSERT(ValidateVa(start));
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uint64_t attr = GetMemoryAttr(attributes, memoryType, fIsKernel);
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MapRange(fPageTable, fInitialLevel, start & vaMask, 0, size, VMAction::SET_ATTR, attr, NULL);
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ProcessRange(fPageTable, 0, start & vaMask, size, nullptr,
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[=](uint64_t* ptePtr, uint64_t effectiveVa) {
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// We need to use an atomic compare-swap loop because we must
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// need to clear somes bits while setting others.
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while (true) {
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uint64_t oldPte = atomic_get64((int64_t*)ptePtr);
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uint64_t newPte = oldPte & ~kPteAttrMask;
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newPte |= attr;
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if ((uint64_t)atomic_test_and_set64((int64_t*)ptePtr, newPte, oldPte) == oldPte) {
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asm("dsb ishst"); // Ensure PTE write completed
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if ((oldPte & kAttrAF) != 0)
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FlushVAFromTLBByASID(effectiveVa);
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break;
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}
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}
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});
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return B_OK;
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}
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