freebsd11_network: copy freebsd_network from 9.3.

This commit is contained in:
Jérôme Duval
2017-11-15 21:20:07 +01:00
parent 9a50e01ea6
commit f9a21cf8ba
126 changed files with 18673 additions and 0 deletions
@@ -0,0 +1,81 @@
/*
* Copyright 2009 Colin Günther, [email protected]
* All Rights Reserved. Distributed under the terms of the MIT License.
*/
extern "C" {
#include <compat/sys/condvar.h>
#include <compat/sys/kernel.h>
}
#include "Condvar.h"
void
conditionInit(struct cv* variable, const char* description)
{
variable->condition.Init(variable, description);
}
void
conditionPublish(struct cv* variable, const void* waitChannel,
const char* description)
{
variable->condition.Publish(waitChannel, description);
}
void
conditionUnpublish(struct cv* variable)
{
variable->condition.Unpublish();
}
int
conditionTimedWait(struct cv* variable, const int timeout)
{
status_t status = variable->condition.Wait(B_RELATIVE_TIMEOUT,
ticks_to_usecs(timeout));
if (status != B_OK)
status = EWOULDBLOCK;
return status;
}
void
conditionWait(struct cv* variable)
{
variable->condition.Wait();
}
void
conditionNotifyOne(struct cv* variable)
{
variable->condition.NotifyOne();
}
int
publishedConditionTimedWait(const void* waitChannel, const int timeout)
{
ConditionVariableEntry variableEntry;
status_t status = variableEntry.Wait(waitChannel, B_RELATIVE_TIMEOUT,
ticks_to_usecs(timeout));
if (status != B_OK)
status = EWOULDBLOCK;
return status;
}
void
publishedConditionNotifyAll(const void* waitChannel)
{
ConditionVariable::NotifyAll(waitChannel, B_OK);
}
@@ -0,0 +1,26 @@
/*
* Copyright 2009 Colin Günther, [email protected]
* All Rights Reserved. Distributed under the terms of the MIT License.
*/
#ifndef CONDVAR_H_
#define CONDVAR_H_
#ifdef __cplusplus
extern "C" {
#endif
void conditionInit(struct cv*, const char*);
void conditionPublish(struct cv*, const void*, const char*);
void conditionUnpublish(struct cv*);
int conditionTimedWait(struct cv*, const int);
void conditionWait(struct cv*);
void conditionNotifyOne(struct cv*);
int publishedConditionTimedWait(const void*, const int);
void publishedConditionNotifyAll(const void*);
#ifdef __cplusplus
}
#endif
#endif /* CONDVAR_H_ */
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SubDir HAIKU_TOP src libs compat freebsd_network ;
UseHeaders [ FDirName $(SUBDIR) ] : true ;
UseHeaders [ FDirName $(SUBDIR) compat ] : true ;
UsePrivateHeaders net ;
UsePrivateKernelHeaders ;
UseHeaders $(HAIKU_PRIVATE_KERNEL_HEADERS) : true ;
# Enabling C++ structures in C only code
Includes [ FGristFiles kernel_c++_structs.h ]
: <src!system!kernel>kernel_c++_struct_sizes.h ;
SubDirCcFlags [ FDefines _KERNEL=1 _XOPEN_SOURCE ] ;
KernelStaticLibrary libfreebsd_network.a :
bus.cpp
callout.cpp
clock.c
compat.c
compat_cpp.cpp
condvar.c
Condvar.cpp
device.c
driver.c
eventhandler.c
fbsd_busdma_x86.c
fbsd_ether.c
fbsd_if_media.c
fbsd_mbuf.c
fbsd_mbuf2.c
fbsd_mii.c
fbsd_mii_bitbang.c
fbsd_mii_physubr.c
fbsd_time.c
firmware.c
if.c
libkern.c
mbuf.c
mii.c
mutex.c
priv.cpp
synch.c
systm.c
taskqueue.c
unit.c
Unit.cpp
;
rule MIIHeaderGen
{
SEARCH on $(2) = [ FDirName $(SUBDIR) compat dev mii ] ;
SEARCH on $(3) = $(SEARCH_SOURCE) ;
Depends $(1) : $(2) $(3) ;
MakeLocateArch $(<) ;
MIIHeaderGen1 $(1) : $(2) $(3) ;
LocalClean clean : $(<) ;
}
actions MIIHeaderGen1
{
gawk -v HEADERFILE=$(1) -f $(2[2]) $(2[1])
}
MIIHeaderGen [ FGristFiles miidevs.h ] : miidevs : miidevs2h.awk ;
@@ -0,0 +1,59 @@
/*
* Copyright 2009 Colin Günther, [email protected]
* All Rights Reserved. Distributed under the terms of the MIT License.
*
*/
/*! Wrapper functions for accessing the number buffer.*/
#include "unit.h"
#include <util/RadixBitmap.h>
#define ID_STORE_FULL -1
status_t
_new_unrhdr_buffer(struct unrhdr* idStore, uint32 maxIdCount)
{
status_t status = B_OK;
idStore->idBuffer = radix_bitmap_create(maxIdCount);
if (idStore->idBuffer == NULL)
status = B_NO_MEMORY;
return status;
}
void
_delete_unrhdr_buffer_locked(struct unrhdr* idStore)
{
radix_bitmap_destroy(idStore->idBuffer);
}
int
_alloc_unr_locked(struct unrhdr* idStore)
{
radix_slot_t slotIndex;
int id = ID_STORE_FULL;
slotIndex = radix_bitmap_alloc(idStore->idBuffer, 1);
if (slotIndex != RADIX_SLOT_NONE)
id = slotIndex + idStore->idBias;
return id;
}
void
_free_unr_locked(struct unrhdr* idStore, u_int identity)
{
uint32 slotIndex = (int32)identity - idStore->idBias;
radix_bitmap_dealloc(idStore->idBuffer, slotIndex, 1);
}
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/*
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Copyright 2004, Marcus Overhagen. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
extern "C" {
#include "device.h"
}
#include <stdlib.h>
#include <algorithm>
#include <arch/cpu.h>
extern "C" {
#include <compat/dev/pci/pcireg.h>
#include <compat/dev/pci/pcivar.h>
#include <compat/machine/resource.h>
#include <compat/sys/mutex.h>
#include <compat/machine/bus.h>
#include <compat/sys/rman.h>
#include <compat/sys/bus.h>
}
// private kernel header to get B_NO_HANDLED_INFO
#include <int.h>
#include <PCI_x86.h>
//#define DEBUG_BUS_SPACE_RW
#ifdef DEBUG_BUS_SPACE_RW
# define TRACE_BUS_SPACE_RW(x) driver_printf x
#else
# define TRACE_BUS_SPACE_RW(x)
#endif
//#define DEBUG_PCI
#ifdef DEBUG_PCI
# define TRACE_PCI(dev, format, args...) device_printf(dev, format , ##args)
#else
# define TRACE_PCI(dev, format, args...) do { } while (0)
#endif
#define ROUNDUP(a, b) (((a) + ((b)-1)) & ~((b)-1))
struct internal_intr {
device_t dev;
driver_filter_t filter;
driver_intr_t *handler;
void *arg;
int irq;
uint32 flags;
thread_id thread;
sem_id sem;
int32 handling;
};
static int32 intr_wrapper(void *data);
static int
fls(int mask)
{
int bit;
if (mask == 0)
return (0);
for (bit = 1; mask != 1; bit++)
mask = (unsigned int)mask >> 1;
return (bit);
}
static area_id
map_mem(void **virtualAddr, phys_addr_t _phy, size_t size, uint32 protection,
const char *name)
{
uint32 offset = _phy & (B_PAGE_SIZE - 1);
phys_addr_t physicalAddr = _phy - offset;
area_id area;
size = ROUNDUP(size + offset, B_PAGE_SIZE);
area = map_physical_memory(name, physicalAddr, size, B_ANY_KERNEL_ADDRESS,
protection, virtualAddr);
if (area < B_OK)
return area;
*virtualAddr = (uint8 *)(*virtualAddr) + offset;
return area;
}
static int
bus_alloc_irq_resource(device_t dev, struct resource *res)
{
uint8 irq = pci_read_config(dev, PCI_interrupt_line, 1);
if (irq == 0 || irq == 0xff)
return -1;
/* TODO: IRQ resources! */
res->r_bustag = 0;
res->r_bushandle = irq;
return 0;
}
static int
bus_alloc_mem_resource(device_t dev, struct resource *res, int regid)
{
uint32 addr = pci_read_config(dev, regid, 4) & PCI_address_memory_32_mask;
uint32 size = 128 * 1024; /* XXX */
void *virtualAddr;
res->r_mapped_area = map_mem(&virtualAddr, addr, size, 0,
"bus_alloc_resource(MEMORY)");
if (res->r_mapped_area < B_OK)
return -1;
res->r_bustag = I386_BUS_SPACE_MEM;
res->r_bushandle = (bus_space_handle_t)virtualAddr;
return 0;
}
static int
bus_alloc_ioport_resource(device_t dev, struct resource *res, int regid)
{
res->r_bustag = I386_BUS_SPACE_IO;
res->r_bushandle = pci_read_config(dev, regid, 4) & PCI_address_io_mask;
return 0;
}
struct resource *
bus_alloc_resource(device_t dev, int type, int *rid, unsigned long start,
unsigned long end, unsigned long count, uint32 flags)
{
struct resource *res;
int result = -1;
if (type != SYS_RES_IRQ && type != SYS_RES_MEMORY
&& type != SYS_RES_IOPORT)
return NULL;
device_printf(dev, "bus_alloc_resource(%i, [%i], 0x%lx, 0x%lx, 0x%lx,"
"0x%" B_PRIx32 ")\n", type, *rid, start, end, count, flags);
// maybe a local array of resources is enough
res = (struct resource *)malloc(sizeof(struct resource));
if (res == NULL)
return NULL;
if (type == SYS_RES_IRQ) {
if (*rid == 0) {
// pinned interrupt
result = bus_alloc_irq_resource(dev, res);
} else {
// msi or msi-x interrupt at index *rid - 1
pci_info *info;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
res->r_bustag = 1;
res->r_bushandle = info->u.h0.interrupt_line + *rid - 1;
result = 0;
}
} else if (type == SYS_RES_MEMORY)
result = bus_alloc_mem_resource(dev, res, *rid);
else if (type == SYS_RES_IOPORT)
result = bus_alloc_ioport_resource(dev, res, *rid);
if (result < 0) {
free(res);
return NULL;
}
res->r_type = type;
return res;
}
int
bus_release_resource(device_t dev, int type, int rid, struct resource *res)
{
if (res->r_type != type)
panic("bus_release_resource: mismatch");
if (type == SYS_RES_MEMORY)
delete_area(res->r_mapped_area);
free(res);
return 0;
}
int
bus_alloc_resources(device_t dev, struct resource_spec *resourceSpec,
struct resource **resources)
{
int i;
for (i = 0; resourceSpec[i].type != -1; i++) {
resources[i] = bus_alloc_resource_any(dev,
resourceSpec[i].type, &resourceSpec[i].rid, resourceSpec[i].flags);
if (resources[i] == NULL
&& (resourceSpec[i].flags & RF_OPTIONAL) == 0) {
for (++i; resourceSpec[i].type != -1; i++) {
resources[i] = NULL;
}
bus_release_resources(dev, resourceSpec, resources);
return ENXIO;
}
}
return 0;
}
void
bus_release_resources(device_t dev, const struct resource_spec *resourceSpec,
struct resource **resources)
{
int i;
for (i = 0; resourceSpec[i].type != -1; i++) {
if (resources[i] == NULL)
continue;
bus_release_resource(dev, resourceSpec[i].type, resourceSpec[i].rid,
resources[i]);
resources[i] = NULL;
}
}
bus_space_handle_t
rman_get_bushandle(struct resource *res)
{
return res->r_bushandle;
}
bus_space_tag_t
rman_get_bustag(struct resource *res)
{
return res->r_bustag;
}
int
rman_get_rid(struct resource *res)
{
return 0;
}
// #pragma mark - Interrupt handling
static int32
intr_wrapper(void *data)
{
struct internal_intr *intr = (struct internal_intr *)data;
//device_printf(intr->dev, "in interrupt handler.\n");
if (!HAIKU_CHECK_DISABLE_INTERRUPTS(intr->dev))
return B_UNHANDLED_INTERRUPT;
release_sem_etc(intr->sem, 1, B_DO_NOT_RESCHEDULE);
return intr->handling ? B_HANDLED_INTERRUPT : B_INVOKE_SCHEDULER;
}
static int32
intr_fast_wrapper(void *data)
{
struct internal_intr *intr = (struct internal_intr *)data;
intr->handler(intr->arg);
// We don't know if the interrupt has been handled.
return B_UNHANDLED_INTERRUPT;
}
static int32
intr_handler(void *data)
{
struct internal_intr *intr = (struct internal_intr *)data;
status_t status;
while (1) {
status = acquire_sem(intr->sem);
if (status < B_OK)
break;
//device_printf(intr->dev, "in soft interrupt handler.\n");
atomic_or(&intr->handling, 1);
intr->handler(intr->arg);
atomic_and(&intr->handling, 0);
HAIKU_REENABLE_INTERRUPTS(intr->dev);
}
return 0;
}
static void
free_internal_intr(struct internal_intr *intr)
{
if (intr->sem >= B_OK) {
status_t status;
delete_sem(intr->sem);
wait_for_thread(intr->thread, &status);
}
free(intr);
}
int
bus_setup_intr(device_t dev, struct resource *res, int flags,
driver_filter_t filter, driver_intr_t handler, void *arg, void **_cookie)
{
/* TODO check MPSAFE etc */
struct internal_intr *intr = (struct internal_intr *)malloc(
sizeof(struct internal_intr));
char semName[64];
status_t status;
if (intr == NULL)
return B_NO_MEMORY;
intr->dev = dev;
intr->filter = filter;
intr->handler = handler;
intr->arg = arg;
intr->irq = res->r_bushandle;
intr->flags = flags;
intr->sem = -1;
intr->thread = -1;
if (filter != NULL) {
status = install_io_interrupt_handler(intr->irq,
(interrupt_handler)intr->filter, intr->arg, 0);
} else if ((flags & INTR_FAST) != 0) {
status = install_io_interrupt_handler(intr->irq,
intr_fast_wrapper, intr, B_NO_HANDLED_INFO);
} else {
snprintf(semName, sizeof(semName), "%s intr", dev->device_name);
intr->sem = create_sem(0, semName);
if (intr->sem < B_OK) {
free(intr);
return B_NO_MEMORY;
}
snprintf(semName, sizeof(semName), "%s intr handler", dev->device_name);
intr->thread = spawn_kernel_thread(intr_handler, semName,
B_REAL_TIME_DISPLAY_PRIORITY, intr);
if (intr->thread < B_OK) {
delete_sem(intr->sem);
free(intr);
return B_NO_MEMORY;
}
status = install_io_interrupt_handler(intr->irq,
intr_wrapper, intr, B_NO_HANDLED_INFO);
}
if (status == B_OK && res->r_bustag == 1 && gPCIx86 != NULL) {
// this is an msi, enable it
pci_info *info
= &((struct root_device_softc *)dev->root->softc)->pci_info;
if (((struct root_device_softc *)dev->root->softc)->is_msi) {
if (gPCIx86->enable_msi(info->bus, info->device,
info->function) != B_OK) {
device_printf(dev, "enabling msi failed\n");
bus_teardown_intr(dev, res, intr);
return ENODEV;
}
} else if (((struct root_device_softc *)dev->root->softc)->is_msix) {
if (gPCIx86->enable_msix(info->bus, info->device,
info->function) != B_OK) {
device_printf(dev, "enabling msix failed\n");
bus_teardown_intr(dev, res, intr);
return ENODEV;
}
}
}
if (status < B_OK) {
free_internal_intr(intr);
return status;
}
resume_thread(intr->thread);
*_cookie = intr;
return 0;
}
int
bus_teardown_intr(device_t dev, struct resource *res, void *arg)
{
struct internal_intr *intr = (struct internal_intr *)arg;
struct root_device_softc *root = (struct root_device_softc *)dev->root->softc;
if ((root->is_msi || root->is_msix) && gPCIx86 != NULL) {
// disable msi generation
pci_info *info = &root->pci_info;
gPCIx86->disable_msi(info->bus, info->device, info->function);
}
if (intr->filter != NULL) {
remove_io_interrupt_handler(intr->irq, (interrupt_handler)intr->filter,
intr->arg);
} else if (intr->flags & INTR_FAST) {
remove_io_interrupt_handler(intr->irq, intr_fast_wrapper, intr);
} else {
remove_io_interrupt_handler(intr->irq, intr_wrapper, intr);
}
free_internal_intr(intr);
return 0;
}
// #pragma mark - bus functions
bus_dma_tag_t
bus_get_dma_tag(device_t dev)
{
return NULL;
}
int
bus_generic_suspend(device_t dev)
{
UNIMPLEMENTED();
return B_ERROR;
}
int
bus_generic_resume(device_t dev)
{
UNIMPLEMENTED();
return B_ERROR;
}
void
bus_generic_shutdown(device_t dev)
{
UNIMPLEMENTED();
}
int
bus_print_child_header(device_t dev, device_t child)
{
UNIMPLEMENTED();
return B_ERROR;
}
int
bus_print_child_footer(device_t dev, device_t child)
{
UNIMPLEMENTED();
return B_ERROR;
}
int
bus_generic_print_child(device_t dev, device_t child)
{
UNIMPLEMENTED();
return B_ERROR;
}
void
bus_generic_driver_added(device_t dev, driver_t *driver)
{
UNIMPLEMENTED();
}
int
bus_child_present(device_t child)
{
device_t parent = device_get_parent(child);
if (parent == NULL)
return 0;
return bus_child_present(parent);
}
// #pragma mark - PCI functions
uint32_t
pci_read_config(device_t dev, int offset, int size)
{
pci_info *info = &((struct root_device_softc *)dev->root->softc)->pci_info;
uint32_t value = gPci->read_pci_config(info->bus, info->device,
info->function, offset, size);
TRACE_PCI(dev, "pci_read_config(%i, %i) = 0x%x\n", offset, size, value);
return value;
}
void
pci_write_config(device_t dev, int offset, uint32_t value, int size)
{
pci_info *info = &((struct root_device_softc *)dev->root->softc)->pci_info;
TRACE_PCI(dev, "pci_write_config(%i, 0x%x, %i)\n", offset, value, size);
gPci->write_pci_config(info->bus, info->device, info->function, offset,
size, value);
}
uint16_t
pci_get_vendor(device_t dev)
{
return pci_read_config(dev, PCI_vendor_id, 2);
}
uint16_t
pci_get_device(device_t dev)
{
return pci_read_config(dev, PCI_device_id, 2);
}
uint16_t
pci_get_subvendor(device_t dev)
{
return pci_read_config(dev, PCI_subsystem_vendor_id, 2);
}
uint16_t
pci_get_subdevice(device_t dev)
{
return pci_read_config(dev, PCI_subsystem_id, 2);
}
uint8_t
pci_get_revid(device_t dev)
{
return pci_read_config(dev, PCI_revision, 1);
}
uint32_t
pci_get_domain(device_t dev)
{
return 0;
}
uint32_t
pci_get_devid(device_t dev)
{
return pci_read_config(dev, PCI_device_id, 2) << 16 |
pci_read_config(dev, PCI_vendor_id, 2);
}
uint8_t
pci_get_cachelnsz(device_t dev)
{
return pci_read_config(dev, PCI_line_size, 1);
}
uint8_t *
pci_get_ether(device_t dev)
{
/* used in if_dc to get the MAC from CardBus CIS for Xircom card */
return NULL; /* NULL is handled in the caller correctly */
}
uint8_t
pci_get_bus(device_t dev)
{
pci_info *info
= &((struct root_device_softc *)dev->root->softc)->pci_info;
return info->bus;
}
uint8_t
pci_get_slot(device_t dev)
{
pci_info *info
= &((struct root_device_softc *)dev->root->softc)->pci_info;
return info->device;
}
uint8_t
pci_get_function(device_t dev)
{
pci_info *info
= &((struct root_device_softc *)dev->root->softc)->pci_info;
return info->function;
}
device_t
pci_find_dbsf(uint32_t domain, uint8_t bus, uint8_t slot, uint8_t func)
{
// We don't support that yet - if we want to support the multi port
// feature of the Broadcom BCM 570x driver, we would have to change
// that.
return NULL;
}
static void
pci_set_command_bit(device_t dev, uint16_t bit)
{
uint16_t command = pci_read_config(dev, PCI_command, 2);
pci_write_config(dev, PCI_command, command | bit, 2);
}
int
pci_enable_busmaster(device_t dev)
{
pci_set_command_bit(dev, PCI_command_master);
return 0;
}
int
pci_enable_io(device_t dev, int space)
{
/* adapted from FreeBSD's pci_enable_io_method */
int bit = 0;
switch (space) {
case SYS_RES_IOPORT:
bit = PCI_command_io;
break;
case SYS_RES_MEMORY:
bit = PCI_command_memory;
break;
default:
return EINVAL;
}
pci_set_command_bit(dev, bit);
if (pci_read_config(dev, PCI_command, 2) & bit)
return 0;
device_printf(dev, "pci_enable_io(%d) failed.\n", space);
return ENXIO;
}
int
pci_find_cap(device_t dev, int capability, int *capreg)
{
return pci_find_extcap(dev, capability, capreg);
}
int
pci_find_extcap(device_t child, int capability, int *_capabilityRegister)
{
uint8 capabilityPointer;
uint8 headerType;
uint16 status;
status = pci_read_config(child, PCIR_STATUS, 2);
if ((status & PCIM_STATUS_CAPPRESENT) == 0)
return ENXIO;
headerType = pci_read_config(child, PCI_header_type, 1);
switch (headerType & PCIM_HDRTYPE) {
case 0:
case 1:
capabilityPointer = PCIR_CAP_PTR;
break;
case 2:
capabilityPointer = PCIR_CAP_PTR_2;
break;
default:
return ENXIO;
}
capabilityPointer = pci_read_config(child, capabilityPointer, 1);
while (capabilityPointer != 0) {
if (pci_read_config(child, capabilityPointer + PCICAP_ID, 1)
== capability) {
if (_capabilityRegister != NULL)
*_capabilityRegister = capabilityPointer;
return 0;
}
capabilityPointer = pci_read_config(child,
capabilityPointer + PCICAP_NEXTPTR, 1);
}
return ENOENT;
}
int
pci_msi_count(device_t dev)
{
pci_info *info;
if (gPCIx86 == NULL)
return 0;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
return gPCIx86->get_msi_count(info->bus, info->device, info->function);
}
int
pci_alloc_msi(device_t dev, int *count)
{
pci_info *info;
uint8 startVector = 0;
if (gPCIx86 == NULL)
return ENODEV;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
if (gPCIx86->configure_msi(info->bus, info->device, info->function, *count,
&startVector) != B_OK) {
return ENODEV;
}
((struct root_device_softc *)dev->root->softc)->is_msi = true;
info->u.h0.interrupt_line = startVector;
return EOK;
}
int
pci_release_msi(device_t dev)
{
pci_info *info;
if (gPCIx86 == NULL)
return ENODEV;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
gPCIx86->unconfigure_msi(info->bus, info->device, info->function);
((struct root_device_softc *)dev->root->softc)->is_msi = false;
((struct root_device_softc *)dev->root->softc)->is_msix = false;
return EOK;
}
int
pci_msix_count(device_t dev)
{
pci_info *info;
if (gPCIx86 == NULL)
return 0;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
return gPCIx86->get_msix_count(info->bus, info->device, info->function);
}
int
pci_alloc_msix(device_t dev, int *count)
{
pci_info *info;
uint8 startVector = 0;
if (gPCIx86 == NULL)
return ENODEV;
info = &((struct root_device_softc *)dev->root->softc)->pci_info;
if (gPCIx86->configure_msix(info->bus, info->device, info->function, *count,
&startVector) != B_OK) {
return ENODEV;
}
((struct root_device_softc *)dev->root->softc)->is_msix = true;
info->u.h0.interrupt_line = startVector;
return EOK;
}
int
pci_get_max_read_req(device_t dev)
{
int cap;
uint16_t val;
if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) != 0)
return (0);
val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
val &= PCIM_EXP_CTL_MAX_READ_REQUEST;
val >>= 12;
return (1 << (val + 7));
}
int
pci_set_max_read_req(device_t dev, int size)
{
int cap;
uint16_t val;
if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) != 0)
return (0);
if (size < 128)
size = 128;
if (size > 4096)
size = 4096;
size = (1 << (fls(size) - 1));
val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
val &= ~PCIM_EXP_CTL_MAX_READ_REQUEST;
val |= (fls(size) - 8) << 12;
pci_write_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, val, 2);
return (size);
}
int
pci_get_powerstate(device_t dev)
{
int capabilityRegister;
uint16 status;
int powerState = PCI_POWERSTATE_D0;
if (pci_find_extcap(dev, PCIY_PMG, &capabilityRegister) != EOK)
return powerState;
status = pci_read_config(dev, capabilityRegister + PCIR_POWER_STATUS, 2);
switch (status & PCI_pm_mask) {
case PCI_pm_state_d0:
break;
case PCI_pm_state_d1:
powerState = PCI_POWERSTATE_D1;
break;
case PCI_pm_state_d2:
powerState = PCI_POWERSTATE_D2;
break;
case PCI_pm_state_d3:
powerState = PCI_POWERSTATE_D3;
break;
default:
powerState = PCI_POWERSTATE_UNKNOWN;
break;
}
TRACE_PCI(dev, "%s: D%i\n", __func__, powerState);
return powerState;
}
int
pci_set_powerstate(device_t dev, int newPowerState)
{
int capabilityRegister;
int oldPowerState;
uint8 currentPowerManagementStatus;
uint8 newPowerManagementStatus;
uint16 powerManagementCapabilities;
bigtime_t stateTransitionDelayInUs = 0;
if (pci_find_extcap(dev, PCIY_PMG, &capabilityRegister) != EOK)
return EOPNOTSUPP;
oldPowerState = pci_get_powerstate(dev);
if (oldPowerState == newPowerState)
return EOK;
switch (std::max(oldPowerState, newPowerState)) {
case PCI_POWERSTATE_D2:
stateTransitionDelayInUs = 200;
break;
case PCI_POWERSTATE_D3:
stateTransitionDelayInUs = 10000;
break;
}
currentPowerManagementStatus = pci_read_config(dev, capabilityRegister
+ PCIR_POWER_STATUS, 2);
newPowerManagementStatus = currentPowerManagementStatus & ~PCI_pm_mask;
powerManagementCapabilities = pci_read_config(dev, capabilityRegister
+ PCIR_POWER_CAP, 2);
switch (newPowerState) {
case PCI_POWERSTATE_D0:
newPowerManagementStatus |= PCIM_PSTAT_D0;
break;
case PCI_POWERSTATE_D1:
if ((powerManagementCapabilities & PCI_pm_d1supp) == 0)
return EOPNOTSUPP;
newPowerManagementStatus |= PCIM_PSTAT_D1;
break;
case PCI_POWERSTATE_D2:
if ((powerManagementCapabilities & PCI_pm_d2supp) == 0)
return EOPNOTSUPP;
newPowerManagementStatus |= PCIM_PSTAT_D2;
break;
case PCI_POWERSTATE_D3:
newPowerManagementStatus |= PCIM_PSTAT_D3;
break;
default:
return EINVAL;
}
TRACE_PCI(dev, "%s: D%i -> D%i\n", __func__, oldPowerState, newPowerState);
pci_write_config(dev, capabilityRegister + PCIR_POWER_STATUS, newPowerState,
2);
if (stateTransitionDelayInUs != 0)
snooze(stateTransitionDelayInUs);
return EOK;
}
@@ -0,0 +1,238 @@
/*
* Copyright 2010, Axel Dörfler, [email protected].
* Distributed under the terms of the MIT License.
*/
#include "device.h"
#include <lock.h>
#include <thread.h>
extern "C" {
# include <sys/callout.h>
# include <sys/mutex.h>
}
#include <util/AutoLock.h>
//#define TRACE_CALLOUT
#ifdef TRACE_CALLOUT
# define TRACE(x...) dprintf(x)
#else
# define TRACE(x...) ;
#endif
static struct list sTimers;
static mutex sLock;
static sem_id sWaitSem;
static callout* sCurrentCallout;
static thread_id sThread;
static bigtime_t sTimeout;
static status_t
callout_thread(void* /*data*/)
{
status_t status = B_OK;
do {
bigtime_t timeout = B_INFINITE_TIMEOUT;
if (status == B_TIMED_OUT || status == B_OK) {
// scan timers for new timeout and/or execute a timer
mutex_lock(&sLock);
struct callout* c = NULL;
while (true) {
c = (callout*)list_get_next_item(&sTimers, c);
if (c == NULL)
break;
if (c->due < system_time()) {
struct mtx *mutex = c->c_mtx;
// execute timer
list_remove_item(&sTimers, c);
c->due = -1;
sCurrentCallout = c;
mutex_unlock(&sLock);
if (mutex != NULL)
mtx_lock(mutex);
c->c_func(c->c_arg);
if (mutex != NULL)
mtx_unlock(mutex);
mutex_lock(&sLock);
sCurrentCallout = NULL;
c = NULL;
// restart scanning as we unlocked the list
} else {
// calculate new timeout
if (c->due < timeout)
timeout = c->due;
}
}
sTimeout = timeout;
mutex_unlock(&sLock);
}
status = acquire_sem_etc(sWaitSem, 1, B_ABSOLUTE_TIMEOUT, timeout);
// the wait sem normally can't be acquired, so we
// have to look at the status value the call returns:
//
// B_OK - a new timer has been added or canceled
// B_TIMED_OUT - look for timers to be executed
// B_BAD_SEM_ID - we are asked to quit
} while (status != B_BAD_SEM_ID);
return B_OK;
}
// #pragma mark - private API
status_t
init_callout(void)
{
list_init(&sTimers);
sTimeout = B_INFINITE_TIMEOUT;
status_t status = B_OK;
mutex_init(&sLock, "fbsd callout");
sWaitSem = create_sem(0, "fbsd callout wait");
if (sWaitSem < 0) {
status = sWaitSem;
goto err1;
}
sThread = spawn_kernel_thread(callout_thread, "fbsd callout",
B_DISPLAY_PRIORITY, NULL);
if (sThread < 0) {
status = sThread;
goto err2;
}
return resume_thread(sThread);
err1:
mutex_destroy(&sLock);
err2:
delete_sem(sWaitSem);
return status;
}
void
uninit_callout(void)
{
delete_sem(sWaitSem);
mutex_lock(&sLock);
mutex_destroy(&sLock);
status_t status;
wait_for_thread(sThread, &status);
}
// #pragma mark - public API
void
callout_init(struct callout *callout, int mpsafe)
{
if (mpsafe)
callout_init_mtx(callout, NULL, 0);
else
callout_init_mtx(callout, &Giant, 0);
}
void
callout_init_mtx(struct callout *c, struct mtx *mtx, int flags)
{
c->due = 0;
c->flags = 0;
c->c_arg = NULL;
c->c_func = NULL;
c->c_mtx = mtx;
c->c_flags = flags;
}
int
callout_reset(struct callout *c, int ticks, void (*func)(void *), void *arg)
{
int canceled = callout_stop(c);
MutexLocker locker(sLock);
c->c_func = func;
c->c_arg = arg;
TRACE("callout_reset %p, func %p, arg %p\n", c, c->c_func, c->c_arg);
if (ticks >= 0) {
// reschedule or add this timer
if (c->due <= 0)
list_add_item(&sTimers, c);
c->due = system_time() + ticks_to_usecs(ticks);
// notify timer about the change if necessary
if (sTimeout > c->due)
release_sem(sWaitSem);
}
return canceled;
}
int
callout_schedule(struct callout *callout, int ticks)
{
return callout_reset(callout, ticks, callout->c_func, callout->c_arg);
}
int
_callout_stop_safe(struct callout *c, int safe)
{
MutexLocker locker(sLock);
TRACE("_callout_stop_safe %p, func %p, arg %p\n", c, c->c_func, c->c_arg);
if (c->due <= 0)
return 0;
// this timer is scheduled, cancel it
list_remove_item(&sTimers, c);
c->due = 0;
return 1;
}
int
callout_pending(struct callout *c)
{
return c->due > 0;
}
int
callout_active(struct callout *c)
{
return c == sCurrentCallout;
}
+44
View File
@@ -0,0 +1,44 @@
/*
* Copyright 2009, Colin Günther, [email protected]
* All rights reserved. Distributed under the terms of the MIT License.
*/
#include "device.h"
#include <compat/sys/kernel.h>
int ticks;
static timer sHardClockTimer;
/*!
* Implementation of FreeBSD's hardclock timer.
*/
static status_t
hardClock(timer* hardClockTimer)
{
atomic_add((vint32*)&ticks, 1);
return B_OK;
}
/*!
* Initialization of the hardclock timer which ticks according to hz defined in
* compat/sys/kernel.h.
*/
status_t
init_hard_clock()
{
ticks = 0;
return add_timer(&sHardClockTimer, hardClock, ticks_to_usecs(1),
B_PERIODIC_TIMER);
}
void
uninit_hard_clock()
{
cancel_timer(&sHardClockTimer);
}
+659
View File
@@ -0,0 +1,659 @@
/*
* Copyright 2007, Hugo Santos, [email protected]. All Rights Reserved.
* Copyright 2007, Axel Dörfler, [email protected]. All Rights Reserved.
* Copyright 2004, Marcus Overhagen. All Rights Reserved.
*
* Distributed under the terms of the MIT License.
*/
#include "device.h"
#include <stdio.h>
#include <KernelExport.h>
#include <image.h>
#include <util/BitUtils.h>
#include <compat/machine/resource.h>
#include <compat/dev/mii/mii.h>
#include <compat/sys/bus.h>
#include <compat/sys/malloc.h>
#include <compat/net/if_media.h>
#include <compat/dev/mii/miivar.h>
#include "compat_cpp.h"
spinlock __haiku_intr_spinlock;
struct net_stack_module_info *gStack;
pci_module_info *gPci;
struct pci_x86_module_info *gPCIx86;
static struct list sRootDevices;
static int sNextUnit;
// #pragma mark - private functions
static device_t
init_device(device_t device, driver_t *driver)
{
list_init_etc(&device->children, offsetof(struct device, link));
device->unit = sNextUnit++;
if (driver != NULL && device_set_driver(device, driver) < 0)
return NULL;
return device;
}
static device_t
new_device(driver_t *driver)
{
device_t dev = malloc(sizeof(struct device));
if (dev == NULL)
return NULL;
memset(dev, 0, sizeof(struct device));
if (init_device(dev, driver) == NULL) {
free(dev);
return NULL;
}
return dev;
}
static image_id
find_own_image()
{
int32 cookie = 0;
image_info info;
while (get_next_image_info(B_SYSTEM_TEAM, &cookie, &info) == B_OK) {
if (((addr_t)info.text <= (addr_t)find_own_image
&& (addr_t)info.text + (addr_t)info.text_size
> (addr_t)find_own_image)) {
// found our own image
return info.id;
}
}
return B_ENTRY_NOT_FOUND;
}
static device_method_signature_t
resolve_method(driver_t *driver, const char *name)
{
device_method_signature_t method = NULL;
int i;
for (i = 0; method == NULL && driver->methods[i].name != NULL; i++) {
if (strcmp(driver->methods[i].name, name) == 0)
method = driver->methods[i].method;
}
return method;
}
// #pragma mark - Device
void
driver_printf(const char *format, ...)
{
va_list vl;
va_start(vl, format);
driver_vprintf(format, vl);
va_end(vl);
}
static void
driver_vprintf_etc(const char *extra, const char *format, va_list vl)
{
char buf[256];
vsnprintf(buf, sizeof(buf), format, vl);
if (extra)
dprintf("[%s] (%s) %s", gDriverName, extra, buf);
else
dprintf("[%s] %s", gDriverName, buf);
}
void
driver_vprintf(const char *format, va_list vl)
{
driver_vprintf_etc(NULL, format, vl);
}
int
device_printf(device_t dev, const char *format, ...)
{
va_list vl;
va_start(vl, format);
driver_vprintf_etc(dev->device_name, format, vl);
va_end(vl);
return 0;
}
void
device_set_desc(device_t dev, const char *desc)
{
dev->description = desc;
}
void
device_set_desc_copy(device_t dev, const char *desc)
{
dev->description = strdup(desc);
dev->flags |= DEVICE_DESC_ALLOCED;
}
const char *
device_get_desc(device_t dev)
{
return dev->description;
}
device_t
device_get_parent(device_t dev)
{
return dev->parent;
}
devclass_t
device_get_devclass(device_t dev)
{
// TODO find out what to do
return 0;
}
int
device_get_children(device_t dev, device_t **devlistp, int *devcountp)
{
int count;
device_t child = NULL;
device_t *list;
count = 0;
while ((child = list_get_next_item(&dev->children, child)) != NULL) {
count++;
}
list = malloc(count * sizeof(device_t));
if (!list)
return (ENOMEM);
count = 0;
while ((child = list_get_next_item(&dev->children, child)) != NULL) {
list[count] = child;
count++;
}
*devlistp = list;
*devcountp = count;
return (0);
}
void
device_set_ivars(device_t dev, void *ivars)
{
dev->ivars = ivars;
}
void *
device_get_ivars(device_t dev)
{
return dev->ivars;
}
const char *
device_get_name(device_t dev)
{
if (dev == NULL)
return NULL;
return dev->device_name;
}
int
device_get_unit(device_t dev)
{
return dev->unit;
}
const char *
device_get_nameunit(device_t dev)
{
return dev->nameunit;
}
void *
device_get_softc(device_t dev)
{
return dev->softc;
}
u_int32_t
device_get_flags(device_t dev)
{
return dev->flags;
}
int
device_set_driver(device_t dev, driver_t *driver)
{
device_method_signature_t method = NULL;
int i;
dev->softc = malloc(driver->softc_size);
if (dev->softc == NULL)
return -1;
memset(dev->softc, 0, driver->softc_size);
dev->driver = driver;
for (i = 0; method == NULL && driver->methods[i].name != NULL; i++) {
device_method_t *mth = &driver->methods[i];
if (strcmp(mth->name, "device_probe") == 0)
dev->methods.probe = (void *)mth->method;
else if (strcmp(mth->name, "device_attach") == 0)
dev->methods.attach = (void *)mth->method;
else if (strcmp(mth->name, "device_detach") == 0)
dev->methods.detach = (void *)mth->method;
else if (strcmp(mth->name, "device_suspend") == 0)
dev->methods.suspend = (void *)mth->method;
else if (strcmp(mth->name, "device_resume") == 0)
dev->methods.resume = (void *)mth->method;
else if (strcmp(mth->name, "device_shutdown") == 0)
dev->methods.shutdown = (void *)mth->method;
else if (strcmp(mth->name, "miibus_readreg") == 0)
dev->methods.miibus_readreg = (void *)mth->method;
else if (strcmp(mth->name, "miibus_writereg") == 0)
dev->methods.miibus_writereg = (void *)mth->method;
else if (strcmp(mth->name, "miibus_statchg") == 0)
dev->methods.miibus_statchg = (void *)mth->method;
else if (!strcmp(mth->name, "miibus_linkchg"))
dev->methods.miibus_linkchg = (void *)mth->method;
else if (!strcmp(mth->name, "miibus_mediainit"))
dev->methods.miibus_mediainit = (void *)mth->method;
}
return 0;
}
int
device_is_alive(device_t device)
{
return (device->flags & DEVICE_ATTACHED) != 0;
}
device_t
device_add_child(device_t parent, const char *name, int unit)
{
device_t child = NULL;
if (name != NULL) {
if (strcmp(name, "miibus") == 0)
child = new_device(&miibus_driver);
else {
// find matching driver structure
driver_t **driver;
char symbol[128];
snprintf(symbol, sizeof(symbol), "__fbsd_%s_%s", name,
parent->driver->name);
if (get_image_symbol(find_own_image(), symbol, B_SYMBOL_TYPE_DATA,
(void **)&driver) == B_OK) {
child = new_device(*driver);
} else
device_printf(parent, "couldn't find symbol %s\n", symbol);
}
} else
child = new_device(NULL);
if (child == NULL)
return NULL;
if (name != NULL)
strlcpy(child->device_name, name, sizeof(child->device_name));
child->parent = parent;
if (parent != NULL) {
list_add_item(&parent->children, child);
child->root = parent->root;
} else {
if (sRootDevices.link.next == NULL)
list_init_etc(&sRootDevices, offsetof(struct device, link));
list_add_item(&sRootDevices, child);
}
return child;
}
/*! Delete the child and all of its children. Detach as necessary.
*/
int
device_delete_child(device_t parent, device_t child)
{
int status;
if (child == NULL)
return 0;
if (parent != NULL)
list_remove_item(&parent->children, child);
else
list_remove_item(&sRootDevices, child);
// We differentiate from the FreeBSD logic here - it will first delete
// the children, and will then detach the device.
// This has the problem that you cannot safely call device_delete_child()
// as you don't know if one of the children deletes its own children this
// way when it is detached.
// Therefore, we'll detach first, and then delete whatever is left.
parent = child;
child = NULL;
// detach children
while ((child = list_get_next_item(&parent->children, child)) != NULL) {
device_detach(child);
}
// detach device
status = device_detach(parent);
if (status != 0)
return status;
// delete children
while ((child = list_get_first_item(&parent->children)) != NULL) {
device_delete_child(parent, child);
}
// delete device
if (parent->flags & DEVICE_DESC_ALLOCED)
free((char *)parent->description);
free(parent->softc);
free(parent);
return 0;
}
int
device_is_attached(device_t device)
{
return (device->flags & DEVICE_ATTACHED) != 0;
}
int
device_attach(device_t device)
{
int result;
if (device->driver == NULL
|| device->methods.attach == NULL)
return B_ERROR;
result = device->methods.attach(device);
if (result == 0)
atomic_or(&device->flags, DEVICE_ATTACHED);
if (result == 0)
result = start_wlan(device);
return result;
}
int
device_detach(device_t device)
{
if (device->driver == NULL)
return B_ERROR;
if ((atomic_and(&device->flags, ~DEVICE_ATTACHED) & DEVICE_ATTACHED) != 0
&& device->methods.detach != NULL) {
int result = B_OK;
result = stop_wlan(device);
if (result != 0) {
atomic_or(&device->flags, DEVICE_ATTACHED);
return result;
}
result = device->methods.detach(device);
if (result != 0) {
atomic_or(&device->flags, DEVICE_ATTACHED);
return result;
}
}
return 0;
}
int
bus_generic_attach(device_t dev)
{
device_t child = NULL;
while ((child = list_get_next_item(&dev->children, child)) != NULL) {
if (child->driver == NULL) {
driver_t *driver = __haiku_select_miibus_driver(child);
if (driver == NULL) {
struct mii_attach_args *ma = device_get_ivars(child);
device_printf(dev, "No PHY module found (%x/%x)!\n",
MII_OUI(ma->mii_id1, ma->mii_id2), MII_MODEL(ma->mii_id2));
} else
device_set_driver(child, driver);
} else
child->methods.probe(child);
if (child->driver != NULL) {
int result = device_attach(child);
if (result != 0)
return result;
}
}
return 0;
}
int
bus_generic_detach(device_t device)
{
device_t child = NULL;
if ((device->flags & DEVICE_ATTACHED) == 0)
return B_ERROR;
while (true) {
child = list_get_next_item(&device->children, child);
if (child == NULL)
break;
device_detach(child);
}
return 0;
}
// #pragma mark - Misc, Malloc
device_t
find_root_device(int unit)
{
device_t device = NULL;
while ((device = list_get_next_item(&sRootDevices, device)) != NULL) {
if (device->unit <= unit)
return device;
}
return NULL;
}
driver_t *
__haiku_probe_miibus(device_t dev, driver_t *drivers[])
{
driver_t *selected = NULL;
int i, selectedResult = 0;
if (drivers == NULL)
return NULL;
for (i = 0; drivers[i]; i++) {
device_probe_t *probe = (device_probe_t *)
resolve_method(drivers[i], "device_probe");
if (probe) {
int result = probe(dev);
if (result >= 0) {
if (selected == NULL || result < selectedResult) {
selected = drivers[i];
selectedResult = result;
device_printf(dev, "Found MII: %s\n", selected->name);
}
}
}
}
return selected;
}
int
printf(const char *format, ...)
{
char buf[256];
va_list vl;
va_start(vl, format);
vsnprintf(buf, sizeof(buf), format, vl);
va_end(vl);
dprintf(buf);
return 0;
}
int
ffs(int value)
{
int i = 1;
if (value == 0)
return 0;
for (; !(value & 1); i++)
value >>= 1;
return i;
}
int
resource_int_value(const char *name, int unit, const char *resname,
int *result)
{
/* no support for hints */
return -1;
}
void *
_kernel_malloc(size_t size, int flags)
{
// our kernel malloc() is insufficient, must handle M_WAIT
// According to the FreeBSD kernel malloc man page the allocator is expected
// to return power of two aligned addresses for allocations up to one page
// size. While it also states that this shouldn't be relied upon, at least
// bus_dmamem_alloc expects it and drivers may depend on it as well.
void *ptr
= memalign(size >= PAGESIZE ? PAGESIZE : next_power_of_2(size), size);
if (ptr == NULL)
return NULL;
if (flags & M_ZERO)
memset(ptr, 0, size);
return ptr;
}
void
_kernel_free(void *ptr)
{
free(ptr);
}
void *
_kernel_contigmalloc(const char *file, int line, size_t size, int flags,
vm_paddr_t low, vm_paddr_t high, unsigned long alignment,
unsigned long boundary)
{
return _kernel_contigmalloc_cpp(file, line, size, low, high,
alignment, boundary, (flags & M_ZERO) != 0, (flags & M_NOWAIT) != 0);
}
void
_kernel_contigfree(void *addr, size_t size)
{
delete_area(area_for(addr));
}
vm_paddr_t
pmap_kextract(vm_offset_t virtualAddress)
{
physical_entry entry;
status_t status = get_memory_map((void *)virtualAddress, 1, &entry, 1);
if (status < B_OK) {
panic("fbsd compat: get_memory_map failed for %p, error %08" B_PRIx32
"\n", (void *)virtualAddress, status);
}
return (vm_paddr_t)entry.address;
}
@@ -0,0 +1,43 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_ALTQ_IF_ALTQ_H_
#define _FBSD_COMPAT_ALTQ_IF_ALTQ_H_
#include <sys/mbuf.h>
#include <sys/mutex.h>
struct ifaltq {
struct mbuf* ifq_head;
struct mbuf* ifq_tail;
int ifq_len;
int ifq_maxlen;
int ifq_drops;
struct mtx ifq_mtx;
struct mbuf* ifq_drv_head;
struct mbuf* ifq_drv_tail;
int ifq_drv_len;
int ifq_drv_maxlen;
int altq_flags;
};
#define ALTQF_READY 0x1
#define ALTDQ_REMOVE 1
#define ALTQ_IS_ENABLED(ifq) 0
#define ALTQ_ENQUEUE(ifr, m, foo, error) \
do { m_freem(m); error = -1; } while (0)
#define ALTQ_DEQUEUE(ifr, m) (m) = NULL
#define TBR_IS_ENABLED(ifq) 0
#define tbr_dequeue_ptr(ifq, v) NULL
#endif
@@ -0,0 +1,202 @@
/* $NetBSD: mii.h,v 1.9 2001/05/31 03:07:14 thorpej Exp $ */
/*-
* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
*
* Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe,
* Numerical Aerospace Simulation Facility, NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_MII_MII_H_
#define _DEV_MII_MII_H_
/*
* Registers common to all PHYs.
*/
#define MII_NPHY 32 /* max # of PHYs per MII */
/*
* MII commands, used if a device must drive the MII lines
* manually.
*/
#define MII_COMMAND_START 0x01
#define MII_COMMAND_READ 0x02
#define MII_COMMAND_WRITE 0x01
#define MII_COMMAND_ACK 0x02
#define MII_BMCR 0x00 /* Basic mode control register (rw) */
#define BMCR_RESET 0x8000 /* reset */
#define BMCR_LOOP 0x4000 /* loopback */
#define BMCR_SPEED0 0x2000 /* speed selection (LSB) */
#define BMCR_AUTOEN 0x1000 /* autonegotiation enable */
#define BMCR_PDOWN 0x0800 /* power down */
#define BMCR_ISO 0x0400 /* isolate */
#define BMCR_STARTNEG 0x0200 /* restart autonegotiation */
#define BMCR_FDX 0x0100 /* Set duplex mode */
#define BMCR_CTEST 0x0080 /* collision test */
#define BMCR_SPEED1 0x0040 /* speed selection (MSB) */
#define BMCR_S10 0x0000 /* 10 Mb/s */
#define BMCR_S100 BMCR_SPEED0 /* 100 Mb/s */
#define BMCR_S1000 BMCR_SPEED1 /* 1000 Mb/s */
#define BMCR_SPEED(x) ((x) & (BMCR_SPEED0|BMCR_SPEED1))
#define MII_BMSR 0x01 /* Basic mode status register (ro) */
#define BMSR_100T4 0x8000 /* 100 base T4 capable */
#define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
#define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
#define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
#define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
#define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
#define BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */
#define BMSR_EXTSTAT 0x0100 /* Extended status in register 15 */
#define BMSR_MFPS 0x0040 /* MII Frame Preamble Suppression */
#define BMSR_ACOMP 0x0020 /* Autonegotiation complete */
#define BMSR_RFAULT 0x0010 /* Link partner fault */
#define BMSR_ANEG 0x0008 /* Autonegotiation capable */
#define BMSR_LINK 0x0004 /* Link status */
#define BMSR_JABBER 0x0002 /* Jabber detected */
#define BMSR_EXTCAP 0x0001 /* Extended capability */
#define BMSR_DEFCAPMASK 0xffffffff
/*
* Note that the EXTSTAT bit indicates that there is extended status
* info available in register 15, but 802.3 section 22.2.4.3 also
* states that that all 1000 Mb/s capable PHYs will set this bit to 1.
*/
#define BMSR_MEDIAMASK (BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \
BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX)
/*
* Convert BMSR media capabilities to ANAR bits for autonegotiation.
* Note the shift chopps off the BMSR_ANEG bit.
*/
#define BMSR_MEDIA_TO_ANAR(x) (((x) & BMSR_MEDIAMASK) >> 6)
#define MII_PHYIDR1 0x02 /* ID register 1 (ro) */
#define MII_PHYIDR2 0x03 /* ID register 2 (ro) */
#define IDR2_OUILSB 0xfc00 /* OUI LSB */
#define IDR2_MODEL 0x03f0 /* vendor model */
#define IDR2_REV 0x000f /* vendor revision */
#define MII_ANAR 0x04 /* Autonegotiation advertisement (rw) */
/* section 28.2.4.1 and 37.2.6.1 */
#define ANAR_NP 0x8000 /* Next page (ro) */
#define ANAR_ACK 0x4000 /* link partner abilities acknowledged (ro) */
#define ANAR_RF 0x2000 /* remote fault (ro) */
#define ANAR_FC 0x0400 /* local device supports PAUSE */
#define ANAR_T4 0x0200 /* local device supports 100bT4 */
#define ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */
#define ANAR_TX 0x0080 /* local device supports 100bTx */
#define ANAR_10_FD 0x0040 /* local device supports 10bT FD */
#define ANAR_10 0x0020 /* local device supports 10bT */
#define ANAR_CSMA 0x0001 /* protocol selector CSMA/CD */
#define ANAR_PAUSE_NONE (0 << 10)
#define ANAR_PAUSE_SYM (1 << 10)
#define ANAR_PAUSE_ASYM (2 << 10)
#define ANAR_PAUSE_TOWARDS (3 << 10)
#define ANAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */
#define ANAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */
#define ANAR_X_PAUSE_NONE (0 << 7)
#define ANAR_X_PAUSE_SYM (1 << 7)
#define ANAR_X_PAUSE_ASYM (2 << 7)
#define ANAR_X_PAUSE_TOWARDS (3 << 7)
#define MII_ANLPAR 0x05 /* Autonegotiation lnk partner abilities (rw) */
/* section 28.2.4.1 and 37.2.6.1 */
#define ANLPAR_NP 0x8000 /* Next page (ro) */
#define ANLPAR_ACK 0x4000 /* link partner accepted ACK (ro) */
#define ANLPAR_RF 0x2000 /* remote fault (ro) */
#define ANLPAR_FC 0x0400 /* link partner supports PAUSE */
#define ANLPAR_T4 0x0200 /* link partner supports 100bT4 */
#define ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */
#define ANLPAR_TX 0x0080 /* link partner supports 100bTx */
#define ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */
#define ANLPAR_10 0x0020 /* link partner supports 10bT */
#define ANLPAR_CSMA 0x0001 /* protocol selector CSMA/CD */
#define ANLPAR_PAUSE_MASK (3 << 10)
#define ANLPAR_PAUSE_NONE (0 << 10)
#define ANLPAR_PAUSE_SYM (1 << 10)
#define ANLPAR_PAUSE_ASYM (2 << 10)
#define ANLPAR_PAUSE_TOWARDS (3 << 10)
#define ANLPAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */
#define ANLPAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */
#define ANLPAR_X_PAUSE_MASK (3 << 7)
#define ANLPAR_X_PAUSE_NONE (0 << 7)
#define ANLPAR_X_PAUSE_SYM (1 << 7)
#define ANLPAR_X_PAUSE_ASYM (2 << 7)
#define ANLPAR_X_PAUSE_TOWARDS (3 << 7)
#define MII_ANER 0x06 /* Autonegotiation expansion (ro) */
/* section 28.2.4.1 and 37.2.6.1 */
#define ANER_MLF 0x0010 /* multiple link detection fault */
#define ANER_LPNP 0x0008 /* link parter next page-able */
#define ANER_NP 0x0004 /* next page-able */
#define ANER_PAGE_RX 0x0002 /* Page received */
#define ANER_LPAN 0x0001 /* link parter autoneg-able */
#define MII_ANNP 0x07 /* Autonegotiation next page */
/* section 28.2.4.1 and 37.2.6.1 */
#define MII_ANLPRNP 0x08 /* Autonegotiation link partner rx next page */
/* section 32.5.1 and 37.2.6.1 */
/* This is also the 1000baseT control register */
#define MII_100T2CR 0x09 /* 100base-T2 control register */
#define GTCR_TEST_MASK 0xe000 /* see 802.3ab ss. 40.6.1.1.2 */
#define GTCR_MAN_MS 0x1000 /* enable manual master/slave control */
#define GTCR_ADV_MS 0x0800 /* 1 = adv. master, 0 = adv. slave */
#define GTCR_PORT_TYPE 0x0400 /* 1 = DCE, 0 = DTE (NIC) */
#define GTCR_ADV_1000TFDX 0x0200 /* adv. 1000baseT FDX */
#define GTCR_ADV_1000THDX 0x0100 /* adv. 1000baseT HDX */
/* This is also the 1000baseT status register */
#define MII_100T2SR 0x0a /* 100base-T2 status register */
#define GTSR_MAN_MS_FLT 0x8000 /* master/slave config fault */
#define GTSR_MS_RES 0x4000 /* result: 1 = master, 0 = slave */
#define GTSR_LRS 0x2000 /* local rx status, 1 = ok */
#define GTSR_RRS 0x1000 /* remove rx status, 1 = ok */
#define GTSR_LP_1000TFDX 0x0800 /* link partner 1000baseT FDX capable */
#define GTSR_LP_1000THDX 0x0400 /* link partner 1000baseT HDX capable */
#define GTSR_LP_ASM_DIR 0x0200 /* link partner asym. pause dir. capable */
#define GTSR_IDLE_ERR 0x00ff /* IDLE error count */
#define MII_EXTSR 0x0f /* Extended status register */
#define EXTSR_1000XFDX 0x8000 /* 1000X full-duplex capable */
#define EXTSR_1000XHDX 0x4000 /* 1000X half-duplex capable */
#define EXTSR_1000TFDX 0x2000 /* 1000T full-duplex capable */
#define EXTSR_1000THDX 0x1000 /* 1000T half-duplex capable */
#define EXTSR_MEDIAMASK (EXTSR_1000XFDX|EXTSR_1000XHDX| \
EXTSR_1000TFDX|EXTSR_1000THDX)
#endif /* _DEV_MII_MII_H_ */
@@ -0,0 +1,54 @@
/* $NetBSD: mii_bitbang.h,v 1.6 2009/05/12 14:31:27 cegger Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#define MII_BIT_MDO 0 /* data out (host->PHY) */
#define MII_BIT_MDI 1 /* data in (PHY->host) */
#define MII_BIT_MDC 2 /* clock */
#define MII_BIT_DIR_HOST_PHY 3 /* set direction: host->PHY */
#define MII_BIT_DIR_PHY_HOST 4 /* set direction: PHY->host */
#define MII_NBITS 5
struct mii_bitbang_ops {
uint32_t (*mbo_read)(device_t);
void (*mbo_write)(device_t, uint32_t);
uint32_t mbo_bits[MII_NBITS];
};
typedef const struct mii_bitbang_ops *mii_bitbang_ops_t;
int mii_bitbang_readreg(device_t dev, mii_bitbang_ops_t ops,
int phy, int reg);
void mii_bitbang_sync(device_t dev, mii_bitbang_ops_t ops);
void mii_bitbang_writereg(device_t dev, mii_bitbang_ops_t ops,
int phy, int reg, int val);
@@ -0,0 +1,325 @@
$FreeBSD$
/*$NetBSD: miidevs,v 1.105 2011/11/25 23:28:14 jakllsch Exp $*/
/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* List of known MII OUIs.
* For a complete list see http://standards.ieee.org/regauth/oui/
*
* XXX Vendors do obviously not agree how OUIs (24 bit) are mapped
* to the 22 bits available in the id registers.
* IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right
* mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
* (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
* about this.)
* The MII_OUI() macro in "mii.h" reflects this.
* If a vendor uses a different mapping, an "xx" prefixed OUI is defined here
* which is mangled accordingly to compensate.
*/
oui AGERE 0x00053d Agere Systems
oui ALTIMA 0x0010a9 Altima Communications
oui AMD 0x00001a Advanced Micro Devices
oui BROADCOM 0x001018 Broadcom Corporation
oui BROADCOM2 0x000af7 Broadcom Corporation
oui BROADCOM3 0x001be9 Broadcom Corporation
oui BROADCOM4 0x18c086 Broadcom Corporation
oui CICADA 0x0003F1 Cicada Semiconductor
oui DAVICOM 0x00606e Davicom Semiconductor
oui ENABLESEMI 0x0010dd Enable Semiconductor
oui ICPLUS 0x0090c3 IC Plus Corp.
oui ICS 0x00a0be Integrated Circuit Systems
oui INTEL 0x00aa00 Intel Corporation
oui JMICRON 0x00d831 JMicron Technologies
oui LEVEL1 0x00207b Level 1
oui MARVELL 0x005043 Marvell Semiconductor
oui MYSON 0x00c0b4 Myson Technology
oui NATSEMI 0x080017 National Semiconductor
oui PMCSIERRA 0x00e004 PMC-Sierra
oui QUALSEMI 0x006051 Quality Semiconductor
oui RDC 0x00d02d RDC Semiconductor
oui REALTEK 0x00e04c RealTek Semicondctor
oui SEEQ 0x00a07d Seeq Technology
oui SIS 0x00e006 Silicon Integrated Systems
oui TI 0x080028 Texas Instruments
oui TSC 0x00c039 TDK Semiconductor
oui XAQTI 0x00e0ae XaQti Corp.
/* Some Intel 82553's use an alternative OUI. */
oui xxINTEL 0x001f00 Intel Corporation
/* Some VIA 6122's use an alternative OUI. */
oui xxCICADA 0x00c08f Cicada Semiconductor
/* bad bitorder (bits "g" and "h" (= MSBs byte 1) lost) */
oui yyAMD 0x000058 Advanced Micro Devices
oui xxATHEROS 0x00c82e Atheros Communications
oui xxBROADCOM 0x000818 Broadcom Corporation
oui xxBROADCOM_ALT1 0x0050ef Broadcom Corporation
oui xxDAVICOM 0x000676 Davicom Semiconductor
oui yyINTEL 0x005500 Intel Corporation
oui xxJATO 0x0007c1 Jato Technologies
oui xxMARVELL 0x000ac2 Marvell Semiconductor
oui xxMYSON 0x00032d Myson Technology
oui xxNATSEMI 0x1000e8 National Semiconductor
oui xxQUALSEMI 0x00068a Quality Semiconductor
oui xxTSC 0x00039c TDK Semiconductor
oui xxVITESSE 0x008083 Vitesse Semiconductor
/* bad byteorder (bits "q" and "r" (= LSBs byte 3) lost) */
oui xxLEVEL1 0x782000 Level 1
oui xxXAQTI 0xace000 XaQti Corp.
/* Don't know what's going on here. */
oui xxASIX 0x000674 Asix Semiconductor
oui yyDAVICOM 0x000602 Davicom Semiconductor
oui xxICPLUS 0x0009c3 IC Plus Corp.
oui xxPMCSIERRA 0x0009c0 PMC-Sierra
oui xxPMCSIERRA2 0x009057 PMC-Sierra
oui xxREALTEK 0x000732 RealTek Semicondctor
oui yyREALTEK 0x000004 RealTek Semicondctor
/*
* List of known models. Grouped by oui.
*/
/* Agere Systems PHYs */
model AGERE ET1011 0x0001 ET1011 10/100/1000baseT PHY
model AGERE ET1011C 0x0004 ET1011C 10/100/1000baseT PHY
/* Altima Communications PHYs */
model ALTIMA ACXXX 0x0001 ACXXX 10/100 media interface
model ALTIMA AC101L 0x0012 AC101L 10/100 media interface
model ALTIMA AC101 0x0021 AC101 10/100 media interface
/* AMD Am79C87[45] have ALTIMA OUI */
model ALTIMA Am79C875 0x0014 Am79C875 10/100 media interface
model ALTIMA Am79C874 0x0021 Am79C874 10/100 media interface
/* Advanced Micro Devices PHYs */
/* see Davicom DM9101 for Am79C873 */
model yyAMD 79C972_10T 0x0001 Am79C972 internal 10BASE-T interface
model yyAMD 79c973phy 0x0036 Am79C973 internal 10/100 media interface
model yyAMD 79c901 0x0037 Am79C901 10BASE-T interface
model yyAMD 79c901home 0x0039 Am79C901 HomePNA 1.0 interface
/* Atheros Communications/Attansic PHYs */
model xxATHEROS F1 0x0001 Atheros F1 10/100/1000 PHY
model xxATHEROS F2 0x0002 Atheros F2 10/100 PHY
model xxATHEROS F1_7 0x0007 Atheros F1 10/100/1000 PHY
/* Asix semiconductor PHYs */
model xxASIX AX88X9X 0x0031 Ax88x9x internal PHY
/* Broadcom Corp. PHYs */
model xxBROADCOM 3C905B 0x0012 Broadcom 3c905B internal PHY
model xxBROADCOM 3C905C 0x0017 Broadcom 3c905C internal PHY
model xxBROADCOM BCM5201 0x0021 BCM5201 10/100 media interface
model xxBROADCOM BCM5214 0x0028 BCM5214 Quad 10/100 media interface
model xxBROADCOM BCM5221 0x001e BCM5221 10/100 media interface
model xxBROADCOM BCM5222 0x0032 BCM5222 Dual 10/100 media interface
model xxBROADCOM BCM4401 0x0036 BCM4401 10/100 media interface
model xxBROADCOM BCM5365 0x0037 BCM5365 10/100 5-port PHY switch
model BROADCOM BCM5400 0x0004 BCM5400 1000BASE-T media interface
model BROADCOM BCM5401 0x0005 BCM5401 1000BASE-T media interface
model BROADCOM BCM5411 0x0007 BCM5411 1000BASE-T media interface
model BROADCOM BCM5464 0x000b BCM5464 1000BASE-T media interface
model BROADCOM BCM5461 0x000c BCM5461 1000BASE-T media interface
model BROADCOM BCM5462 0x000d BCM5462 1000BASE-T media interface
model BROADCOM BCM5421 0x000e BCM5421 1000BASE-T media interface
model BROADCOM BCM5752 0x0010 BCM5752 1000BASE-T media interface
model BROADCOM BCM5701 0x0011 BCM5701 1000BASE-T media interface
model BROADCOM BCM5706 0x0015 BCM5706 1000BASE-T/SX media interface
model BROADCOM BCM5703 0x0016 BCM5703 1000BASE-T media interface
model BROADCOM BCM5750 0x0018 BCM5750 1000BASE-T media interface
model BROADCOM BCM5704 0x0019 BCM5704 1000BASE-T media interface
model BROADCOM BCM5705 0x001a BCM5705 1000BASE-T media interface
model BROADCOM BCM54K2 0x002e BCM54K2 1000BASE-T media interface
model BROADCOM BCM5714 0x0034 BCM5714 1000BASE-T media interface
model BROADCOM BCM5780 0x0035 BCM5780 1000BASE-T media interface
model BROADCOM BCM5708C 0x0036 BCM5708C 1000BASE-T media interface
model BROADCOM2 BCM5325 0x0003 BCM5325 10/100 5-port PHY switch
model BROADCOM2 BCM5906 0x0004 BCM5906 10/100baseTX media interface
model BROADCOM2 BCM5481 0x000a BCM5481 1000BASE-T media interface
model BROADCOM2 BCM5482 0x000b BCM5482 1000BASE-T media interface
model BROADCOM2 BCM5755 0x000c BCM5755 1000BASE-T media interface
model BROADCOM2 BCM5754 0x000e BCM5754/5787 1000BASE-T media interface
model BROADCOM2 BCM5708S 0x0015 BCM5708S 1000/2500baseSX PHY
model BROADCOM2 BCM5785 0x0016 BCM5785 1000BASE-T media interface
model BROADCOM2 BCM5709CAX 0x002c BCM5709CAX 10/100/1000baseT PHY
model BROADCOM2 BCM5722 0x002d BCM5722 1000BASE-T media interface
model BROADCOM2 BCM5784 0x003a BCM5784 10/100/1000baseT PHY
model BROADCOM2 BCM5709C 0x003c BCM5709 10/100/1000baseT PHY
model BROADCOM2 BCM5761 0x003d BCM5761 10/100/1000baseT PHY
model BROADCOM2 BCM5709S 0x003f BCM5709S/5720S 1000/2500baseSX PHY
model BROADCOM3 BCM57780 0x0019 BCM57780 1000BASE-T media interface
model BROADCOM3 BCM5717C 0x0020 BCM5717C 1000BASE-T media interface
model BROADCOM3 BCM5719C 0x0022 BCM5719C 1000BASE-T media interface
model BROADCOM3 BCM57765 0x0024 BCM57765 1000BASE-T media interface
model BROADCOM3 BCM5720C 0x0036 BCM5720C 1000BASE-T media interface
model BROADCOM4 BCM5725C 0x0038 BCM5725C 1000BASE-T media interface
model xxBROADCOM_ALT1 BCM5906 0x0004 BCM5906 10/100baseTX media interface
/* Cicada Semiconductor PHYs (now owned by Vitesse?) */
model xxCICADA CS8201 0x0001 Cicada CS8201 10/100/1000TX PHY
model xxCICADA CS8204 0x0004 Cicada CS8204 10/100/1000TX PHY
model xxCICADA VSC8211 0x000b Cicada VSC8211 10/100/1000TX PHY
model xxCICADA CS8201A 0x0020 Cicada CS8201 10/100/1000TX PHY
model xxCICADA CS8201B 0x0021 Cicada CS8201 10/100/1000TX PHY
model xxCICADA CS8244 0x002c Cicada CS8244 10/100/1000TX PHY
model xxVITESSE VSC8601 0x0002 Vitesse VSC8601 10/100/1000TX PHY
/* Davicom Semiconductor PHYs */
/* AMD Am79C873 seems to be a relabeled DM9101 */
model xxDAVICOM DM9101 0x0000 DM9101 (AMD Am79C873) 10/100 media interface
model xxDAVICOM DM9102 0x0004 DM9102 10/100 media interface
model yyDAVICOM DM9101 0x0000 DM9101 10/100 media interface
/* IC Plus Corp. PHYs */
model xxICPLUS IP101 0x0005 IP101 10/100 PHY
model xxICPLUS IP1000A 0x0008 IP100A 10/100/1000 media interface
model xxICPLUS IP1001 0x0019 IP1001 10/100/1000 media interface
/* Integrated Circuit Systems PHYs */
model ICS 1889 0x0001 ICS1889 10/100 media interface
model ICS 1890 0x0002 ICS1890 10/100 media interface
model ICS 1892 0x0003 ICS1892 10/100 media interface
model ICS 1893 0x0004 ICS1893 10/100 media interface
/* Intel Corporation PHYs */
model xxINTEL I82553 0x0000 i82553 10/100 media interface
model yyINTEL I82555 0x0015 i82555 10/100 media interface
model yyINTEL I82562EH 0x0017 i82562EH HomePNA interface
model yyINTEL I82562G 0x0031 i82562G 10/100 media interface
model yyINTEL I82562EM 0x0032 i82562EM 10/100 media interface
model yyINTEL I82562ET 0x0033 i82562ET 10/100 media interface
model yyINTEL I82553 0x0035 i82553 10/100 media interface
model yyINTEL I82566 0x0039 i82566 10/100/1000 media interface
model INTEL I82577 0x0005 i82577 10/100/1000 media interface
model INTEL I82579 0x0009 i82579 10/100/1000 media interface
model xxMARVELL I82563 0x000a i82563 10/100/1000 media interface
model yyINTEL IGP01E1000 0x0038 Intel IGP01E1000 Gigabit PHY
/* Jato Technologies PHYs */
model xxJATO BASEX 0x0000 Jato 1000baseX media interface
/* JMicron Technologies PHYs */
model JMICRON JMP211 0x0021 JMP211 10/100/1000 media interface
model JMICRON JMP202 0x0022 JMP202 10/100 media interface
/* Level 1 PHYs */
model xxLEVEL1 LXT970 0x0000 LXT970 10/100 media interface
model LEVEL1 LXT971 0x000e LXT971/2 10/100 media interface
model LEVEL1 LXT973 0x0021 LXT973 10/100 Dual PHY
model LEVEL1 LXT974 0x0004 LXT974 10/100 Quad PHY
model LEVEL1 LXT975 0x0005 LXT975 10/100 Quad PHY
model LEVEL1 LXT1000_OLD 0x0003 LXT1000 1000BASE-T media interface
model LEVEL1 LXT1000 0x000c LXT1000 1000BASE-T media interface
/* Marvell Semiconductor PHYs */
model xxMARVELL E1000 0x0000 Marvell 88E1000 Gigabit PHY
model xxMARVELL E1011 0x0002 Marvell 88E1011 Gigabit PHY
model xxMARVELL E1000_3 0x0003 Marvell 88E1000 Gigabit PHY
model xxMARVELL E1000S 0x0004 Marvell 88E1000S Gigabit PHY
model xxMARVELL E1000_5 0x0005 Marvell 88E1000 Gigabit PHY
model xxMARVELL E1101 0x0006 Marvell 88E1101 Gigabit PHY
model xxMARVELL E3082 0x0008 Marvell 88E3082 10/100 Fast Ethernet PHY
model xxMARVELL E1112 0x0009 Marvell 88E1112 Gigabit PHY
model xxMARVELL E1149 0x000b Marvell 88E1149 Gigabit PHY
model xxMARVELL E1111 0x000c Marvell 88E1111 Gigabit PHY
model xxMARVELL E1145 0x000d Marvell 88E1145 Quad Gigabit PHY
model xxMARVELL E1116 0x0021 Marvell 88E1116 Gigabit PHY
model xxMARVELL E1116R 0x0024 Marvell 88E1116R Gigabit PHY
model xxMARVELL E1118 0x0022 Marvell 88E1118 Gigabit PHY
model xxMARVELL E1149R 0x0025 Marvell 88E1149R Quad Gigabit PHY
model xxMARVELL E3016 0x0026 Marvell 88E3016 10/100 Fast Ethernet PHY
model xxMARVELL PHYG65G 0x0027 Marvell PHYG65G Gigabit PHY
model xxMARVELL E1116R_29 0x0029 Marvell 88E1116R Gigabit PHY
model MARVELL E1000 0x0005 Marvell 88E1000 Gigabit PHY
model MARVELL E1011 0x0002 Marvell 88E1011 Gigabit PHY
model MARVELL E1000_3 0x0003 Marvell 88E1000 Gigabit PHY
model MARVELL E1000_5 0x0005 Marvell 88E1000 Gigabit PHY
model MARVELL E1111 0x000c Marvell 88E1111 Gigabit PHY
/* Myson Technology PHYs */
model xxMYSON MTD972 0x0000 MTD972 10/100 media interface
model MYSON MTD803 0x0000 MTD803 3-in-1 media interface
/* National Semiconductor PHYs */
model xxNATSEMI DP83840 0x0000 DP83840 10/100 media interface
model xxNATSEMI DP83843 0x0001 DP83843 10/100 media interface
model xxNATSEMI DP83815 0x0002 DP83815 10/100 media interface
model xxNATSEMI DP83847 0x0003 DP83847 10/100 media interface
model xxNATSEMI DP83891 0x0005 DP83891 1000BASE-T media interface
model xxNATSEMI DP83861 0x0006 DP83861 1000BASE-T media interface
model xxNATSEMI DP83865 0x0007 DP83865 1000BASE-T media interface
model xxNATSEMI DP83849 0x000a DP83849 10/100 media interface
/* PMC Sierra PHYs */
model xxPMCSIERRA PM8351 0x0000 PM8351 OctalPHY Gigabit interface
model xxPMCSIERRA2 PM8352 0x0002 PM8352 OctalPHY Gigabit interface
model xxPMCSIERRA2 PM8353 0x0003 PM8353 QuadPHY Gigabit interface
model PMCSIERRA PM8354 0x0004 PM8354 QuadPHY Gigabit interface
/* Quality Semiconductor PHYs */
model xxQUALSEMI QS6612 0x0000 QS6612 10/100 media interface
/* RDC Semiconductor PHYs */
model RDC R6040 0x0003 R6040 10/100 media interface
/* RealTek Semicondctor PHYs */
model yyREALTEK RTL8201L 0x0020 RTL8201L 10/100 media interface
model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface
model REALTEK RTL8305SC 0x0005 RTL8305SC 10/100 802.1q switch
model REALTEK RTL8201E 0x0008 RTL8201E 10/100 media interface
model REALTEK RTL8251 0x0000 RTL8251 1000BASE-T media interface
model REALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface
/* Seeq Seeq PHYs */
model SEEQ 80220 0x0003 Seeq 80220 10/100 media interface
model SEEQ 84220 0x0004 Seeq 84220 10/100 media interface
model SEEQ 80225 0x0008 Seeq 80225 10/100 media interface
/* Silicon Integrated Systems PHYs */
model SIS 900 0x0000 SiS 900 10/100 media interface
/* Texas Instruments PHYs */
model TI TLAN10T 0x0001 ThunderLAN 10BASE-T media interface
model TI 100VGPMI 0x0002 ThunderLAN 100VG-AnyLan media interface
model TI TNETE2101 0x0003 TNETE2101 media interface
/* TDK Semiconductor PHYs */
model xxTSC 78Q2120 0x0014 78Q2120 10/100 media interface
model xxTSC 78Q2121 0x0015 78Q2121 100BASE-TX media interface
/* XaQti Corp. PHYs */
model xxXAQTI XMACII 0x0000 XaQti Corp. XMAC II gigabit interface
@@ -0,0 +1,315 @@
/* $NetBSD: miivar.h,v 1.8 1999/04/23 04:24:32 thorpej Exp $ */
/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_MII_MIIVAR_H_
#define _DEV_MII_MIIVAR_H_
#include <sys/queue.h>
/*
* Media Independent Interface data structure defintions
*/
struct mii_softc;
/*
* Callbacks from MII layer into network interface device driver.
*/
typedef int (*mii_readreg_t)(struct device *, int, int);
typedef void (*mii_writereg_t)(struct device *, int, int, int);
typedef void (*mii_statchg_t)(struct device *);
/*
* A network interface driver has one of these structures in its softc.
* It is the interface from the network interface driver to the MII
* layer.
*/
struct mii_data {
struct ifmedia mii_media; /* media information */
struct ifnet *mii_ifp; /* pointer back to network interface */
/*
* For network interfaces with multiple PHYs, a list of all
* PHYs is required so they can all be notified when a media
* request is made.
*/
LIST_HEAD(mii_listhead, mii_softc) mii_phys;
u_int mii_instance;
/*
* PHY driver fills this in with active media status.
*/
u_int mii_media_status;
u_int mii_media_active;
/*
* Calls from MII layer into network interface driver.
*/
mii_readreg_t mii_readreg;
mii_writereg_t mii_writereg;
mii_statchg_t mii_statchg;
};
typedef struct mii_data mii_data_t;
/*
* Functions provided by the PHY to perform various functions.
*/
struct mii_phy_funcs {
int (*pf_service)(struct mii_softc *, struct mii_data *, int);
void (*pf_status)(struct mii_softc *);
void (*pf_reset)(struct mii_softc *);
};
/*
* Requests that can be made to the downcall.
*/
#define MII_TICK 1 /* once-per-second tick */
#define MII_MEDIACHG 2 /* user changed media; perform the switch */
#define MII_POLLSTAT 3 /* user requested media status; fill it in */
/*
* Each PHY driver's softc has one of these as the first member.
* XXX This would be better named "phy_softc", but this is the name
* XXX BSDI used, and we would like to have the same interface.
*/
struct mii_softc {
device_t mii_dev; /* generic device glue */
LIST_ENTRY(mii_softc) mii_list; /* entry on parent's PHY list */
uint32_t mii_mpd_oui; /* the PHY's OUI (MII_OUI())*/
uint32_t mii_mpd_model; /* the PHY's model (MII_MODEL())*/
uint32_t mii_mpd_rev; /* the PHY's revision (MII_REV())*/
u_int mii_capmask; /* capability mask for BMSR */
u_int mii_phy; /* our MII address */
u_int mii_offset; /* first PHY, second PHY, etc. */
u_int mii_inst; /* instance for ifmedia */
/* Our PHY functions. */
const struct mii_phy_funcs *mii_funcs;
struct mii_data *mii_pdata; /* pointer to parent's mii_data */
u_int mii_flags; /* misc. flags; see below */
u_int mii_capabilities; /* capabilities from BMSR */
u_int mii_extcapabilities; /* extended capabilities */
u_int mii_ticks; /* MII_TICK counter */
u_int mii_anegticks; /* ticks before retrying aneg */
u_int mii_media_active; /* last active media */
u_int mii_media_status; /* last active status */
};
typedef struct mii_softc mii_softc_t;
/* mii_flags */
#define MIIF_INITDONE 0x00000001 /* has been initialized (mii_data) */
#define MIIF_NOISOLATE 0x00000002 /* do not isolate the PHY */
#if 0
#define MIIF_NOLOOP 0x00000004 /* no loopback capability */
#endif
#define MIIF_DOINGAUTO 0x00000008 /* doing autonegotiation (mii_softc) */
#define MIIF_AUTOTSLEEP 0x00000010 /* use tsleep(), not callout() */
#define MIIF_HAVEFIBER 0x00000020 /* from parent: has fiber interface */
#define MIIF_HAVE_GTCR 0x00000040 /* has 100base-T2/1000base-T CR */
#define MIIF_IS_1000X 0x00000080 /* is a 1000BASE-X device */
#define MIIF_DOPAUSE 0x00000100 /* advertise PAUSE capability */
#define MIIF_IS_HPNA 0x00000200 /* is a HomePNA device */
#define MIIF_FORCEANEG 0x00000400 /* force auto-negotiation */
#define MIIF_NOMANPAUSE 0x00100000 /* no manual PAUSE selection */
#define MIIF_FORCEPAUSE 0x00200000 /* force PAUSE advertisement */
#define MIIF_MACPRIV0 0x01000000 /* private to the MAC driver */
#define MIIF_MACPRIV1 0x02000000 /* private to the MAC driver */
#define MIIF_MACPRIV2 0x04000000 /* private to the MAC driver */
#define MIIF_PHYPRIV0 0x10000000 /* private to the PHY driver */
#define MIIF_PHYPRIV1 0x20000000 /* private to the PHY driver */
#define MIIF_PHYPRIV2 0x40000000 /* private to the PHY driver */
/* Default mii_anegticks values */
#define MII_ANEGTICKS 5
#define MII_ANEGTICKS_GIGE 17
#define MIIF_INHERIT_MASK (MIIF_NOISOLATE|MIIF_NOLOOP|MIIF_AUTOTSLEEP)
/*
* Special `locators' passed to mii_attach(). If one of these is not
* an `any' value, we look for *that* PHY and configure it. If both
* are not `any', that is an error, and mii_attach() will fail.
*/
#define MII_OFFSET_ANY -1
#define MII_PHY_ANY -1
/*
* Used to attach a PHY to a parent.
*/
struct mii_attach_args {
struct mii_data *mii_data; /* pointer to parent data */
u_int mii_phyno; /* MII address */
u_int mii_offset; /* first PHY, second PHY, etc. */
uint32_t mii_id1; /* PHY ID register 1 */
uint32_t mii_id2; /* PHY ID register 2 */
u_int mii_capmask; /* capability mask for BMSR */
};
typedef struct mii_attach_args mii_attach_args_t;
/*
* Used to match a PHY.
*/
struct mii_phydesc {
uint32_t mpd_oui; /* the PHY's OUI */
uint32_t mpd_model; /* the PHY's model */
const char *mpd_name; /* the PHY's name */
};
#define MII_PHY_DESC(a, b) { MII_OUI_ ## a, MII_MODEL_ ## a ## _ ## b, \
MII_STR_ ## a ## _ ## b }
#define MII_PHY_END { 0, 0, NULL }
/*
* An array of these structures map MII media types to BMCR/ANAR settings.
*/
struct mii_media {
u_int mm_bmcr; /* BMCR settings for this media */
u_int mm_anar; /* ANAR settings for this media */
u_int mm_gtcr; /* 100base-T2 or 1000base-T CR */
};
#define MII_MEDIA_NONE 0
#define MII_MEDIA_10_T 1
#define MII_MEDIA_10_T_FDX 2
#define MII_MEDIA_100_T4 3
#define MII_MEDIA_100_TX 4
#define MII_MEDIA_100_TX_FDX 5
#define MII_MEDIA_1000_X 6
#define MII_MEDIA_1000_X_FDX 7
#define MII_MEDIA_1000_T 8
#define MII_MEDIA_1000_T_FDX 9
#define MII_NMEDIA 10
#ifdef _KERNEL
#ifdef __HAIKU__
int __haiku_miibus_readreg(device_t dev, int phy, int reg);
int __haiku_miibus_writereg(device_t dev, int phy, int reg, int data);
void __haiku_miibus_statchg(device_t dev);
void __haiku_miibus_linkchg(device_t dev);
void __haiku_miibus_mediainit(device_t dev);
#define MIIBUS_READREG(dev, phy, reg) \
__haiku_miibus_readreg((dev), (phy), (reg))
#define MIIBUS_WRITEREG(dev, phy, reg, value) \
__haiku_miibus_writereg((dev), (phy), (reg), (value))
#define MIIBUS_STATCHG(dev) \
__haiku_miibus_statchg(dev)
#define MIIBUS_LINKCHG(dev) \
__haiku_miibus_linkchg(dev)
#define MIIBUS_MEDIAINIT(dev) \
__haiku_miibus_mediainit(dev)
#endif
#define PHY_READ(p, r) \
MIIBUS_READREG((p)->mii_dev, (p)->mii_phy, (r))
#define PHY_WRITE(p, r, v) \
MIIBUS_WRITEREG((p)->mii_dev, (p)->mii_phy, (r), (v))
#define PHY_SERVICE(p, d, o) \
(*(p)->mii_funcs->pf_service)((p), (d), (o))
#define PHY_STATUS(p) \
(*(p)->mii_funcs->pf_status)(p)
#define PHY_RESET(p) \
(*(p)->mii_funcs->pf_reset)(p)
enum miibus_device_ivars {
MIIBUS_IVAR_FLAGS
};
/*
* Simplified accessors for miibus
*/
#define MIIBUS_ACCESSOR(var, ivar, type) \
__BUS_ACCESSOR(miibus, var, MIIBUS, ivar, type)
MIIBUS_ACCESSOR(flags, FLAGS, u_int)
extern devclass_t miibus_devclass;
extern driver_t miibus_driver;
int miibus_probe(device_t);
int miibus_attach(device_t);
int miibus_detach(device_t);
int mii_attach(device_t, device_t *, struct ifnet *, ifm_change_cb_t,
ifm_stat_cb_t, int, int, int, int);
void mii_down(struct mii_data *);
int mii_mediachg(struct mii_data *);
void mii_tick(struct mii_data *);
void mii_pollstat(struct mii_data *);
void mii_phy_add_media(struct mii_softc *);
#ifdef __HAIKU__
int mii_media_from_bmcr(int);
#endif
int mii_phy_auto(struct mii_softc *);
int mii_phy_detach(device_t dev);
void mii_phy_down(struct mii_softc *);
u_int mii_phy_flowstatus(struct mii_softc *);
void mii_phy_reset(struct mii_softc *);
void mii_phy_setmedia(struct mii_softc *sc);
void mii_phy_update(struct mii_softc *, int);
int mii_phy_tick(struct mii_softc *);
const struct mii_phydesc * mii_phy_match(const struct mii_attach_args *ma,
const struct mii_phydesc *mpd);
const struct mii_phydesc * mii_phy_match_gen(const struct mii_attach_args *ma,
const struct mii_phydesc *mpd, size_t endlen);
int mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv);
void mii_phy_dev_attach(device_t dev, u_int flags,
const struct mii_phy_funcs *mpf, int add_media);
void ukphy_status(struct mii_softc *);
u_int mii_oui(u_int, u_int);
#define MII_OUI(id1, id2) mii_oui(id1, id2)
#define MII_MODEL(id2) (((id2) & IDR2_MODEL) >> 4)
#define MII_REV(id2) ((id2) & IDR2_REV)
#endif /* _KERNEL */
#endif /* _DEV_MII_MIIVAR_H_ */
@@ -0,0 +1,988 @@
/*-
* Copyright (c) 1997, Stefan Esser <[email protected]>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*
*/
/*
* PCIM_xxx: mask to locate subfield in register
* PCIR_xxx: config register offset
* PCIC_xxx: device class
* PCIS_xxx: device subclass
* PCIP_xxx: device programming interface
* PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
* PCID_xxx: device ID
* PCIY_xxx: capability identification number
* PCIZ_xxx: extended capability identification number
*/
/* some PCI bus constants */
#define PCI_DOMAINMAX 65535 /* highest supported domain number */
#define PCI_BUSMAX 255 /* highest supported bus number */
#define PCI_SLOTMAX 31 /* highest supported slot number */
#define PCI_FUNCMAX 7 /* highest supported function number */
#define PCI_REGMAX 255 /* highest supported config register addr. */
#define PCIE_REGMAX 4095 /* highest supported config register addr. */
#define PCI_MAXHDRTYPE 2
/* PCI config header registers for all devices */
#define PCIR_DEVVENDOR 0x00
#define PCIR_VENDOR 0x00
#define PCIR_DEVICE 0x02
#define PCIR_COMMAND 0x04
#define PCIM_CMD_PORTEN 0x0001
#define PCIM_CMD_MEMEN 0x0002
#define PCIM_CMD_BUSMASTEREN 0x0004
#define PCIM_CMD_SPECIALEN 0x0008
#define PCIM_CMD_MWRICEN 0x0010
#define PCIM_CMD_PERRESPEN 0x0040
#define PCIM_CMD_SERRESPEN 0x0100
#define PCIM_CMD_BACKTOBACK 0x0200
#define PCIM_CMD_INTxDIS 0x0400
#define PCIR_STATUS 0x06
#define PCIM_STATUS_INTxSTATE 0x0008
#define PCIM_STATUS_CAPPRESENT 0x0010
#define PCIM_STATUS_66CAPABLE 0x0020
#define PCIM_STATUS_BACKTOBACK 0x0080
#define PCIM_STATUS_MDPERR 0x0100
#define PCIM_STATUS_SEL_FAST 0x0000
#define PCIM_STATUS_SEL_MEDIMUM 0x0200
#define PCIM_STATUS_SEL_SLOW 0x0400
#define PCIM_STATUS_SEL_MASK 0x0600
#define PCIM_STATUS_STABORT 0x0800
#define PCIM_STATUS_RTABORT 0x1000
#define PCIM_STATUS_RMABORT 0x2000
#define PCIM_STATUS_SERR 0x4000
#define PCIM_STATUS_PERR 0x8000
#define PCIR_REVID 0x08
#define PCIR_PROGIF 0x09
#define PCIR_SUBCLASS 0x0a
#define PCIR_CLASS 0x0b
#define PCIR_CACHELNSZ 0x0c
#define PCIR_LATTIMER 0x0d
#define PCIR_HDRTYPE 0x0e
#define PCIM_HDRTYPE 0x7f
#define PCIM_HDRTYPE_NORMAL 0x00
#define PCIM_HDRTYPE_BRIDGE 0x01
#define PCIM_HDRTYPE_CARDBUS 0x02
#define PCIM_MFDEV 0x80
#define PCIR_BIST 0x0f
/* Capability Register Offsets */
#define PCICAP_ID 0x0
#define PCICAP_NEXTPTR 0x1
/* Capability Identification Numbers */
#define PCIY_PMG 0x01 /* PCI Power Management */
#define PCIY_AGP 0x02 /* AGP */
#define PCIY_VPD 0x03 /* Vital Product Data */
#define PCIY_SLOTID 0x04 /* Slot Identification */
#define PCIY_MSI 0x05 /* Message Signaled Interrupts */
#define PCIY_CHSWP 0x06 /* CompactPCI Hot Swap */
#define PCIY_PCIX 0x07 /* PCI-X */
#define PCIY_HT 0x08 /* HyperTransport */
#define PCIY_VENDOR 0x09 /* Vendor Unique */
#define PCIY_DEBUG 0x0a /* Debug port */
#define PCIY_CRES 0x0b /* CompactPCI central resource control */
#define PCIY_HOTPLUG 0x0c /* PCI Hot-Plug */
#define PCIY_SUBVENDOR 0x0d /* PCI-PCI bridge subvendor ID */
#define PCIY_AGP8X 0x0e /* AGP 8x */
#define PCIY_SECDEV 0x0f /* Secure Device */
#define PCIY_EXPRESS 0x10 /* PCI Express */
#define PCIY_MSIX 0x11 /* MSI-X */
#define PCIY_SATA 0x12 /* SATA */
#define PCIY_PCIAF 0x13 /* PCI Advanced Features */
/* Extended Capability Register Fields */
#define PCIR_EXTCAP 0x100
#define PCIM_EXTCAP_ID 0x0000ffff
#define PCIM_EXTCAP_VER 0x000f0000
#define PCIM_EXTCAP_NEXTPTR 0xfff00000
#define PCI_EXTCAP_ID(ecap) ((ecap) & PCIM_EXTCAP_ID)
#define PCI_EXTCAP_VER(ecap) (((ecap) & PCIM_EXTCAP_VER) >> 16)
#define PCI_EXTCAP_NEXTPTR(ecap) (((ecap) & PCIM_EXTCAP_NEXTPTR) >> 20)
/* Extended Capability Identification Numbers */
#define PCIZ_AER 0x0001 /* Advanced Error Reporting */
#define PCIZ_VC 0x0002 /* Virtual Channel */
#define PCIZ_SERNUM 0x0003 /* Device Serial Number */
#define PCIZ_PWRBDGT 0x0004 /* Power Budgeting */
#define PCIZ_RCLINK_DCL 0x0005 /* Root Complex Link Declaration */
#define PCIZ_RCLINK_CTL 0x0006 /* Root Complex Internal Link Control */
#define PCIZ_RCEC_ASSOC 0x0007 /* Root Complex Event Collector Association */
#define PCIZ_MFVC 0x0008 /* Multi-Function Virtual Channel */
#define PCIZ_RCRB 0x000a /* RCRB Header */
#define PCIZ_VENDOR 0x000b /* Vendor Unique */
#define PCIZ_ACS 0x000d /* Access Control Services */
#define PCIZ_ARI 0x000e /* Alternative Routing-ID Interpretation */
#define PCIZ_ATS 0x000f /* Address Translation Services */
#define PCIZ_SRIOV 0x0010 /* Single Root IO Virtualization */
#define PCIZ_MULTICAST 0x0012 /* Multicast */
#define PCIZ_RESIZE_BAR 0x0015 /* Resizable BAR */
#define PCIZ_DPA 0x0016 /* Dynamic Power Allocation */
#define PCIZ_TPH_REQ 0x0017 /* TPH Requester */
#define PCIZ_LTR 0x0018 /* Latency Tolerance Reporting */
#define PCIZ_SEC_PCIE 0x0019 /* Secondary PCI Express */
/* config registers for header type 0 devices */
#define PCIR_BARS 0x10
#define PCIR_BAR(x) (PCIR_BARS + (x) * 4)
#define PCIR_MAX_BAR_0 5
#define PCI_RID2BAR(rid) (((rid) - PCIR_BARS) / 4)
#define PCI_BAR_IO(x) (((x) & PCIM_BAR_SPACE) == PCIM_BAR_IO_SPACE)
#define PCI_BAR_MEM(x) (((x) & PCIM_BAR_SPACE) == PCIM_BAR_MEM_SPACE)
#define PCIM_BAR_SPACE 0x00000001
#define PCIM_BAR_MEM_SPACE 0
#define PCIM_BAR_IO_SPACE 1
#define PCIM_BAR_MEM_TYPE 0x00000006
#define PCIM_BAR_MEM_32 0
#define PCIM_BAR_MEM_1MB 2 /* Locate below 1MB in PCI <= 2.1 */
#define PCIM_BAR_MEM_64 4
#define PCIM_BAR_MEM_PREFETCH 0x00000008
#define PCIM_BAR_MEM_BASE 0xfffffffffffffff0ULL
#define PCIM_BAR_IO_RESERVED 0x00000002
#define PCIM_BAR_IO_BASE 0xfffffffc
#define PCIR_CIS 0x28
#define PCIM_CIS_ASI_MASK 0x00000007
#define PCIM_CIS_ASI_CONFIG 0
#define PCIM_CIS_ASI_BAR0 1
#define PCIM_CIS_ASI_BAR1 2
#define PCIM_CIS_ASI_BAR2 3
#define PCIM_CIS_ASI_BAR3 4
#define PCIM_CIS_ASI_BAR4 5
#define PCIM_CIS_ASI_BAR5 6
#define PCIM_CIS_ASI_ROM 7
#define PCIM_CIS_ADDR_MASK 0x0ffffff8
#define PCIM_CIS_ROM_MASK 0xf0000000
#define PCIM_CIS_CONFIG_MASK 0xff
#define PCIR_SUBVEND_0 0x2c
#define PCIR_SUBDEV_0 0x2e
#define PCIR_BIOS 0x30
#define PCIM_BIOS_ENABLE 0x01
#define PCIM_BIOS_ADDR_MASK 0xfffff800
#define PCIR_CAP_PTR 0x34
#define PCIR_INTLINE 0x3c
#define PCIR_INTPIN 0x3d
#define PCIR_MINGNT 0x3e
#define PCIR_MAXLAT 0x3f
/* config registers for header type 1 (PCI-to-PCI bridge) devices */
#define PCIR_MAX_BAR_1 1
#define PCIR_SECSTAT_1 0x1e
#define PCIR_PRIBUS_1 0x18
#define PCIR_SECBUS_1 0x19
#define PCIR_SUBBUS_1 0x1a
#define PCIR_SECLAT_1 0x1b
#define PCIR_IOBASEL_1 0x1c
#define PCIR_IOLIMITL_1 0x1d
#define PCIR_IOBASEH_1 0x30
#define PCIR_IOLIMITH_1 0x32
#define PCIM_BRIO_16 0x0
#define PCIM_BRIO_32 0x1
#define PCIM_BRIO_MASK 0xf
#define PCIR_MEMBASE_1 0x20
#define PCIR_MEMLIMIT_1 0x22
#define PCIR_PMBASEL_1 0x24
#define PCIR_PMLIMITL_1 0x26
#define PCIR_PMBASEH_1 0x28
#define PCIR_PMLIMITH_1 0x2c
#define PCIM_BRPM_32 0x0
#define PCIM_BRPM_64 0x1
#define PCIM_BRPM_MASK 0xf
#define PCIR_BIOS_1 0x38
#define PCIR_BRIDGECTL_1 0x3e
/* config registers for header type 2 (CardBus) devices */
#define PCIR_MAX_BAR_2 0
#define PCIR_CAP_PTR_2 0x14
#define PCIR_SECSTAT_2 0x16
#define PCIR_PRIBUS_2 0x18
#define PCIR_SECBUS_2 0x19
#define PCIR_SUBBUS_2 0x1a
#define PCIR_SECLAT_2 0x1b
#define PCIR_MEMBASE0_2 0x1c
#define PCIR_MEMLIMIT0_2 0x20
#define PCIR_MEMBASE1_2 0x24
#define PCIR_MEMLIMIT1_2 0x28
#define PCIR_IOBASE0_2 0x2c
#define PCIR_IOLIMIT0_2 0x30
#define PCIR_IOBASE1_2 0x34
#define PCIR_IOLIMIT1_2 0x38
#define PCIR_BRIDGECTL_2 0x3e
#define PCIR_SUBVEND_2 0x40
#define PCIR_SUBDEV_2 0x42
#define PCIR_PCCARDIF_2 0x44
/* PCI device class, subclass and programming interface definitions */
#define PCIC_OLD 0x00
#define PCIS_OLD_NONVGA 0x00
#define PCIS_OLD_VGA 0x01
#define PCIC_STORAGE 0x01
#define PCIS_STORAGE_SCSI 0x00
#define PCIS_STORAGE_IDE 0x01
#define PCIP_STORAGE_IDE_MODEPRIM 0x01
#define PCIP_STORAGE_IDE_PROGINDPRIM 0x02
#define PCIP_STORAGE_IDE_MODESEC 0x04
#define PCIP_STORAGE_IDE_PROGINDSEC 0x08
#define PCIP_STORAGE_IDE_MASTERDEV 0x80
#define PCIS_STORAGE_FLOPPY 0x02
#define PCIS_STORAGE_IPI 0x03
#define PCIS_STORAGE_RAID 0x04
#define PCIS_STORAGE_ATA_ADMA 0x05
#define PCIS_STORAGE_SATA 0x06
#define PCIP_STORAGE_SATA_AHCI_1_0 0x01
#define PCIS_STORAGE_SAS 0x07
#define PCIS_STORAGE_NVM 0x08
#define PCIP_STORAGE_NVM_NVMHCI_1_0 0x01
#define PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0 0x02
#define PCIS_STORAGE_OTHER 0x80
#define PCIC_NETWORK 0x02
#define PCIS_NETWORK_ETHERNET 0x00
#define PCIS_NETWORK_TOKENRING 0x01
#define PCIS_NETWORK_FDDI 0x02
#define PCIS_NETWORK_ATM 0x03
#define PCIS_NETWORK_ISDN 0x04
#define PCIS_NETWORK_WORLDFIP 0x05
#define PCIS_NETWORK_PICMG 0x06
#define PCIS_NETWORK_OTHER 0x80
#define PCIC_DISPLAY 0x03
#define PCIS_DISPLAY_VGA 0x00
#define PCIS_DISPLAY_XGA 0x01
#define PCIS_DISPLAY_3D 0x02
#define PCIS_DISPLAY_OTHER 0x80
#define PCIC_MULTIMEDIA 0x04
#define PCIS_MULTIMEDIA_VIDEO 0x00
#define PCIS_MULTIMEDIA_AUDIO 0x01
#define PCIS_MULTIMEDIA_TELE 0x02
#define PCIS_MULTIMEDIA_HDA 0x03
#define PCIS_MULTIMEDIA_OTHER 0x80
#define PCIC_MEMORY 0x05
#define PCIS_MEMORY_RAM 0x00
#define PCIS_MEMORY_FLASH 0x01
#define PCIS_MEMORY_OTHER 0x80
#define PCIC_BRIDGE 0x06
#define PCIS_BRIDGE_HOST 0x00
#define PCIS_BRIDGE_ISA 0x01
#define PCIS_BRIDGE_EISA 0x02
#define PCIS_BRIDGE_MCA 0x03
#define PCIS_BRIDGE_PCI 0x04
#define PCIP_BRIDGE_PCI_SUBTRACTIVE 0x01
#define PCIS_BRIDGE_PCMCIA 0x05
#define PCIS_BRIDGE_NUBUS 0x06
#define PCIS_BRIDGE_CARDBUS 0x07
#define PCIS_BRIDGE_RACEWAY 0x08
#define PCIS_BRIDGE_PCI_TRANSPARENT 0x09
#define PCIS_BRIDGE_INFINIBAND 0x0a
#define PCIS_BRIDGE_OTHER 0x80
#define PCIC_SIMPLECOMM 0x07
#define PCIS_SIMPLECOMM_UART 0x00
#define PCIP_SIMPLECOMM_UART_8250 0x00
#define PCIP_SIMPLECOMM_UART_16450A 0x01
#define PCIP_SIMPLECOMM_UART_16550A 0x02
#define PCIP_SIMPLECOMM_UART_16650A 0x03
#define PCIP_SIMPLECOMM_UART_16750A 0x04
#define PCIP_SIMPLECOMM_UART_16850A 0x05
#define PCIP_SIMPLECOMM_UART_16950A 0x06
#define PCIS_SIMPLECOMM_PAR 0x01
#define PCIS_SIMPLECOMM_MULSER 0x02
#define PCIS_SIMPLECOMM_MODEM 0x03
#define PCIS_SIMPLECOMM_GPIB 0x04
#define PCIS_SIMPLECOMM_SMART_CARD 0x05
#define PCIS_SIMPLECOMM_OTHER 0x80
#define PCIC_BASEPERIPH 0x08
#define PCIS_BASEPERIPH_PIC 0x00
#define PCIP_BASEPERIPH_PIC_8259A 0x00
#define PCIP_BASEPERIPH_PIC_ISA 0x01
#define PCIP_BASEPERIPH_PIC_EISA 0x02
#define PCIP_BASEPERIPH_PIC_IO_APIC 0x10
#define PCIP_BASEPERIPH_PIC_IOX_APIC 0x20
#define PCIS_BASEPERIPH_DMA 0x01
#define PCIS_BASEPERIPH_TIMER 0x02
#define PCIS_BASEPERIPH_RTC 0x03
#define PCIS_BASEPERIPH_PCIHOT 0x04
#define PCIS_BASEPERIPH_SDHC 0x05
#define PCIS_BASEPERIPH_OTHER 0x80
#define PCIC_INPUTDEV 0x09
#define PCIS_INPUTDEV_KEYBOARD 0x00
#define PCIS_INPUTDEV_DIGITIZER 0x01
#define PCIS_INPUTDEV_MOUSE 0x02
#define PCIS_INPUTDEV_SCANNER 0x03
#define PCIS_INPUTDEV_GAMEPORT 0x04
#define PCIS_INPUTDEV_OTHER 0x80
#define PCIC_DOCKING 0x0a
#define PCIS_DOCKING_GENERIC 0x00
#define PCIS_DOCKING_OTHER 0x80
#define PCIC_PROCESSOR 0x0b
#define PCIS_PROCESSOR_386 0x00
#define PCIS_PROCESSOR_486 0x01
#define PCIS_PROCESSOR_PENTIUM 0x02
#define PCIS_PROCESSOR_ALPHA 0x10
#define PCIS_PROCESSOR_POWERPC 0x20
#define PCIS_PROCESSOR_MIPS 0x30
#define PCIS_PROCESSOR_COPROC 0x40
#define PCIC_SERIALBUS 0x0c
#define PCIS_SERIALBUS_FW 0x00
#define PCIS_SERIALBUS_ACCESS 0x01
#define PCIS_SERIALBUS_SSA 0x02
#define PCIS_SERIALBUS_USB 0x03
#define PCIP_SERIALBUS_USB_UHCI 0x00
#define PCIP_SERIALBUS_USB_OHCI 0x10
#define PCIP_SERIALBUS_USB_EHCI 0x20
#define PCIP_SERIALBUS_USB_XHCI 0x30
#define PCIP_SERIALBUS_USB_DEVICE 0xfe
#define PCIS_SERIALBUS_FC 0x04
#define PCIS_SERIALBUS_SMBUS 0x05
#define PCIS_SERIALBUS_INFINIBAND 0x06
#define PCIS_SERIALBUS_IPMI 0x07
#define PCIP_SERIALBUS_IPMI_SMIC 0x00
#define PCIP_SERIALBUS_IPMI_KCS 0x01
#define PCIP_SERIALBUS_IPMI_BT 0x02
#define PCIS_SERIALBUS_SERCOS 0x08
#define PCIS_SERIALBUS_CANBUS 0x09
#define PCIC_WIRELESS 0x0d
#define PCIS_WIRELESS_IRDA 0x00
#define PCIS_WIRELESS_IR 0x01
#define PCIS_WIRELESS_RF 0x10
#define PCIS_WIRELESS_BLUETOOTH 0x11
#define PCIS_WIRELESS_BROADBAND 0x12
#define PCIS_WIRELESS_80211A 0x20
#define PCIS_WIRELESS_80211B 0x21
#define PCIS_WIRELESS_OTHER 0x80
#define PCIC_INTELLIIO 0x0e
#define PCIS_INTELLIIO_I2O 0x00
#define PCIC_SATCOM 0x0f
#define PCIS_SATCOM_TV 0x01
#define PCIS_SATCOM_AUDIO 0x02
#define PCIS_SATCOM_VOICE 0x03
#define PCIS_SATCOM_DATA 0x04
#define PCIC_CRYPTO 0x10
#define PCIS_CRYPTO_NETCOMP 0x00
#define PCIS_CRYPTO_ENTERTAIN 0x10
#define PCIS_CRYPTO_OTHER 0x80
#define PCIC_DASP 0x11
#define PCIS_DASP_DPIO 0x00
#define PCIS_DASP_PERFCNTRS 0x01
#define PCIS_DASP_COMM_SYNC 0x10
#define PCIS_DASP_MGMT_CARD 0x20
#define PCIS_DASP_OTHER 0x80
#define PCIC_OTHER 0xff
/* Bridge Control Values. */
#define PCIB_BCR_PERR_ENABLE 0x0001
#define PCIB_BCR_SERR_ENABLE 0x0002
#define PCIB_BCR_ISA_ENABLE 0x0004
#define PCIB_BCR_VGA_ENABLE 0x0008
#define PCIB_BCR_MASTER_ABORT_MODE 0x0020
#define PCIB_BCR_SECBUS_RESET 0x0040
#define PCIB_BCR_SECBUS_BACKTOBACK 0x0080
#define PCIB_BCR_PRI_DISCARD_TIMEOUT 0x0100
#define PCIB_BCR_SEC_DISCARD_TIMEOUT 0x0200
#define PCIB_BCR_DISCARD_TIMER_STATUS 0x0400
#define PCIB_BCR_DISCARD_TIMER_SERREN 0x0800
/* PCI power manangement */
#define PCIR_POWER_CAP 0x2
#define PCIM_PCAP_SPEC 0x0007
#define PCIM_PCAP_PMEREQCLK 0x0008
#define PCIM_PCAP_DEVSPECINIT 0x0020
#define PCIM_PCAP_AUXPWR_0 0x0000
#define PCIM_PCAP_AUXPWR_55 0x0040
#define PCIM_PCAP_AUXPWR_100 0x0080
#define PCIM_PCAP_AUXPWR_160 0x00c0
#define PCIM_PCAP_AUXPWR_220 0x0100
#define PCIM_PCAP_AUXPWR_270 0x0140
#define PCIM_PCAP_AUXPWR_320 0x0180
#define PCIM_PCAP_AUXPWR_375 0x01c0
#define PCIM_PCAP_AUXPWRMASK 0x01c0
#define PCIM_PCAP_D1SUPP 0x0200
#define PCIM_PCAP_D2SUPP 0x0400
#define PCIM_PCAP_D0PME 0x0800
#define PCIM_PCAP_D1PME 0x1000
#define PCIM_PCAP_D2PME 0x2000
#define PCIM_PCAP_D3PME_HOT 0x4000
#define PCIM_PCAP_D3PME_COLD 0x8000
#define PCIR_POWER_STATUS 0x4
#define PCIM_PSTAT_D0 0x0000
#define PCIM_PSTAT_D1 0x0001
#define PCIM_PSTAT_D2 0x0002
#define PCIM_PSTAT_D3 0x0003
#define PCIM_PSTAT_DMASK 0x0003
#define PCIM_PSTAT_NOSOFTRESET 0x0008
#define PCIM_PSTAT_PMEENABLE 0x0100
#define PCIM_PSTAT_D0POWER 0x0000
#define PCIM_PSTAT_D1POWER 0x0200
#define PCIM_PSTAT_D2POWER 0x0400
#define PCIM_PSTAT_D3POWER 0x0600
#define PCIM_PSTAT_D0HEAT 0x0800
#define PCIM_PSTAT_D1HEAT 0x0a00
#define PCIM_PSTAT_D2HEAT 0x0c00
#define PCIM_PSTAT_D3HEAT 0x0e00
#define PCIM_PSTAT_DATASELMASK 0x1e00
#define PCIM_PSTAT_DATAUNKN 0x0000
#define PCIM_PSTAT_DATADIV10 0x2000
#define PCIM_PSTAT_DATADIV100 0x4000
#define PCIM_PSTAT_DATADIV1000 0x6000
#define PCIM_PSTAT_DATADIVMASK 0x6000
#define PCIM_PSTAT_PME 0x8000
#define PCIR_POWER_BSE 0x6
#define PCIM_PMCSR_BSE_D3B3 0x00
#define PCIM_PMCSR_BSE_D3B2 0x40
#define PCIM_PMCSR_BSE_BPCCE 0x80
#define PCIR_POWER_DATA 0x7
/* VPD capability registers */
#define PCIR_VPD_ADDR 0x2
#define PCIR_VPD_DATA 0x4
/* PCI Message Signalled Interrupts (MSI) */
#define PCIR_MSI_CTRL 0x2
#define PCIM_MSICTRL_VECTOR 0x0100
#define PCIM_MSICTRL_64BIT 0x0080
#define PCIM_MSICTRL_MME_MASK 0x0070
#define PCIM_MSICTRL_MME_1 0x0000
#define PCIM_MSICTRL_MME_2 0x0010
#define PCIM_MSICTRL_MME_4 0x0020
#define PCIM_MSICTRL_MME_8 0x0030
#define PCIM_MSICTRL_MME_16 0x0040
#define PCIM_MSICTRL_MME_32 0x0050
#define PCIM_MSICTRL_MMC_MASK 0x000E
#define PCIM_MSICTRL_MMC_1 0x0000
#define PCIM_MSICTRL_MMC_2 0x0002
#define PCIM_MSICTRL_MMC_4 0x0004
#define PCIM_MSICTRL_MMC_8 0x0006
#define PCIM_MSICTRL_MMC_16 0x0008
#define PCIM_MSICTRL_MMC_32 0x000A
#define PCIM_MSICTRL_MSI_ENABLE 0x0001
#define PCIR_MSI_ADDR 0x4
#define PCIR_MSI_ADDR_HIGH 0x8
#define PCIR_MSI_DATA 0x8
#define PCIR_MSI_DATA_64BIT 0xc
#define PCIR_MSI_MASK 0x10
#define PCIR_MSI_PENDING 0x14
/* PCI-X definitions */
/* For header type 0 devices */
#define PCIXR_COMMAND 0x2
#define PCIXM_COMMAND_DPERR_E 0x0001 /* Data Parity Error Recovery */
#define PCIXM_COMMAND_ERO 0x0002 /* Enable Relaxed Ordering */
#define PCIXM_COMMAND_MAX_READ 0x000c /* Maximum Burst Read Count */
#define PCIXM_COMMAND_MAX_READ_512 0x0000
#define PCIXM_COMMAND_MAX_READ_1024 0x0004
#define PCIXM_COMMAND_MAX_READ_2048 0x0008
#define PCIXM_COMMAND_MAX_READ_4096 0x000c
#define PCIXM_COMMAND_MAX_SPLITS 0x0070 /* Maximum Split Transactions */
#define PCIXM_COMMAND_MAX_SPLITS_1 0x0000
#define PCIXM_COMMAND_MAX_SPLITS_2 0x0010
#define PCIXM_COMMAND_MAX_SPLITS_3 0x0020
#define PCIXM_COMMAND_MAX_SPLITS_4 0x0030
#define PCIXM_COMMAND_MAX_SPLITS_8 0x0040
#define PCIXM_COMMAND_MAX_SPLITS_12 0x0050
#define PCIXM_COMMAND_MAX_SPLITS_16 0x0060
#define PCIXM_COMMAND_MAX_SPLITS_32 0x0070
#define PCIXM_COMMAND_VERSION 0x3000
#define PCIXR_STATUS 0x4
#define PCIXM_STATUS_DEVFN 0x000000FF
#define PCIXM_STATUS_BUS 0x0000FF00
#define PCIXM_STATUS_64BIT 0x00010000
#define PCIXM_STATUS_133CAP 0x00020000
#define PCIXM_STATUS_SC_DISCARDED 0x00040000
#define PCIXM_STATUS_UNEXP_SC 0x00080000
#define PCIXM_STATUS_COMPLEX_DEV 0x00100000
#define PCIXM_STATUS_MAX_READ 0x00600000
#define PCIXM_STATUS_MAX_READ_512 0x00000000
#define PCIXM_STATUS_MAX_READ_1024 0x00200000
#define PCIXM_STATUS_MAX_READ_2048 0x00400000
#define PCIXM_STATUS_MAX_READ_4096 0x00600000
#define PCIXM_STATUS_MAX_SPLITS 0x03800000
#define PCIXM_STATUS_MAX_SPLITS_1 0x00000000
#define PCIXM_STATUS_MAX_SPLITS_2 0x00800000
#define PCIXM_STATUS_MAX_SPLITS_3 0x01000000
#define PCIXM_STATUS_MAX_SPLITS_4 0x01800000
#define PCIXM_STATUS_MAX_SPLITS_8 0x02000000
#define PCIXM_STATUS_MAX_SPLITS_12 0x02800000
#define PCIXM_STATUS_MAX_SPLITS_16 0x03000000
#define PCIXM_STATUS_MAX_SPLITS_32 0x03800000
#define PCIXM_STATUS_MAX_CUM_READ 0x1C000000
#define PCIXM_STATUS_RCVD_SC_ERR 0x20000000
#define PCIXM_STATUS_266CAP 0x40000000
#define PCIXM_STATUS_533CAP 0x80000000
/* For header type 1 devices (PCI-X bridges) */
#define PCIXR_SEC_STATUS 0x2
#define PCIXM_SEC_STATUS_64BIT 0x0001
#define PCIXM_SEC_STATUS_133CAP 0x0002
#define PCIXM_SEC_STATUS_SC_DISC 0x0004
#define PCIXM_SEC_STATUS_UNEXP_SC 0x0008
#define PCIXM_SEC_STATUS_SC_OVERRUN 0x0010
#define PCIXM_SEC_STATUS_SR_DELAYED 0x0020
#define PCIXM_SEC_STATUS_BUS_MODE 0x03c0
#define PCIXM_SEC_STATUS_VERSION 0x3000
#define PCIXM_SEC_STATUS_266CAP 0x4000
#define PCIXM_SEC_STATUS_533CAP 0x8000
#define PCIXR_BRIDGE_STATUS 0x4
#define PCIXM_BRIDGE_STATUS_DEVFN 0x000000FF
#define PCIXM_BRIDGE_STATUS_BUS 0x0000FF00
#define PCIXM_BRIDGE_STATUS_64BIT 0x00010000
#define PCIXM_BRIDGE_STATUS_133CAP 0x00020000
#define PCIXM_BRIDGE_STATUS_SC_DISCARDED 0x00040000
#define PCIXM_BRIDGE_STATUS_UNEXP_SC 0x00080000
#define PCIXM_BRIDGE_STATUS_SC_OVERRUN 0x00100000
#define PCIXM_BRIDGE_STATUS_SR_DELAYED 0x00200000
#define PCIXM_BRIDGE_STATUS_DEVID_MSGCAP 0x20000000
#define PCIXM_BRIDGE_STATUS_266CAP 0x40000000
#define PCIXM_BRIDGE_STATUS_533CAP 0x80000000
/* HT (HyperTransport) Capability definitions */
#define PCIR_HT_COMMAND 0x2
#define PCIM_HTCMD_CAP_MASK 0xf800 /* Capability type. */
#define PCIM_HTCAP_SLAVE 0x0000 /* 000xx */
#define PCIM_HTCAP_HOST 0x2000 /* 001xx */
#define PCIM_HTCAP_SWITCH 0x4000 /* 01000 */
#define PCIM_HTCAP_INTERRUPT 0x8000 /* 10000 */
#define PCIM_HTCAP_REVISION_ID 0x8800 /* 10001 */
#define PCIM_HTCAP_UNITID_CLUMPING 0x9000 /* 10010 */
#define PCIM_HTCAP_EXT_CONFIG_SPACE 0x9800 /* 10011 */
#define PCIM_HTCAP_ADDRESS_MAPPING 0xa000 /* 10100 */
#define PCIM_HTCAP_MSI_MAPPING 0xa800 /* 10101 */
#define PCIM_HTCAP_DIRECT_ROUTE 0xb000 /* 10110 */
#define PCIM_HTCAP_VCSET 0xb800 /* 10111 */
#define PCIM_HTCAP_RETRY_MODE 0xc000 /* 11000 */
#define PCIM_HTCAP_X86_ENCODING 0xc800 /* 11001 */
#define PCIM_HTCAP_GEN3 0xd000 /* 11010 */
#define PCIM_HTCAP_FLE 0xd800 /* 11011 */
#define PCIM_HTCAP_PM 0xe000 /* 11100 */
#define PCIM_HTCAP_HIGH_NODE_COUNT 0xe800 /* 11101 */
/* HT MSI Mapping Capability definitions. */
#define PCIM_HTCMD_MSI_ENABLE 0x0001
#define PCIM_HTCMD_MSI_FIXED 0x0002
#define PCIR_HTMSI_ADDRESS_LO 0x4
#define PCIR_HTMSI_ADDRESS_HI 0x8
/* PCI Vendor capability definitions */
#define PCIR_VENDOR_LENGTH 0x2
#define PCIR_VENDOR_DATA 0x3
/* PCI EHCI Debug Port definitions */
#define PCIR_DEBUG_PORT 0x2
#define PCIM_DEBUG_PORT_OFFSET 0x1FFF
#define PCIM_DEBUG_PORT_BAR 0xe000
/* PCI-PCI Bridge Subvendor definitions */
#define PCIR_SUBVENDCAP_ID 0x4
/* PCI Express definitions */
#define PCIER_FLAGS 0x2
#define PCIEM_FLAGS_VERSION 0x000F
#define PCIEM_FLAGS_TYPE 0x00F0
#define PCIEM_TYPE_ENDPOINT 0x0000
#define PCIEM_TYPE_LEGACY_ENDPOINT 0x0010
#define PCIEM_TYPE_ROOT_PORT 0x0040
#define PCIEM_TYPE_UPSTREAM_PORT 0x0050
#define PCIEM_TYPE_DOWNSTREAM_PORT 0x0060
#define PCIEM_TYPE_PCI_BRIDGE 0x0070
#define PCIEM_TYPE_PCIE_BRIDGE 0x0080
#define PCIEM_TYPE_ROOT_INT_EP 0x0090
#define PCIEM_TYPE_ROOT_EC 0x00a0
#define PCIEM_FLAGS_SLOT 0x0100
#define PCIEM_FLAGS_IRQ 0x3e00
#define PCIER_DEVICE_CAP 0x4
#define PCIEM_CAP_MAX_PAYLOAD 0x00000007
#define PCIEM_CAP_PHANTHOM_FUNCS 0x00000018
#define PCIEM_CAP_EXT_TAG_FIELD 0x00000020
#define PCIEM_CAP_L0S_LATENCY 0x000001c0
#define PCIEM_CAP_L1_LATENCY 0x00000e00
#define PCIEM_CAP_ROLE_ERR_RPT 0x00008000
#define PCIEM_CAP_SLOT_PWR_LIM_VAL 0x03fc0000
#define PCIEM_CAP_SLOT_PWR_LIM_SCALE 0x0c000000
#define PCIEM_CAP_FLR 0x10000000
#define PCIER_DEVICE_CTL 0x8
#define PCIEM_CTL_COR_ENABLE 0x0001
#define PCIEM_CTL_NFER_ENABLE 0x0002
#define PCIEM_CTL_FER_ENABLE 0x0004
#define PCIEM_CTL_URR_ENABLE 0x0008
#define PCIEM_CTL_RELAXED_ORD_ENABLE 0x0010
#define PCIEM_CTL_MAX_PAYLOAD 0x00e0
#define PCIEM_CTL_EXT_TAG_FIELD 0x0100
#define PCIEM_CTL_PHANTHOM_FUNCS 0x0200
#define PCIEM_CTL_AUX_POWER_PM 0x0400
#define PCIEM_CTL_NOSNOOP_ENABLE 0x0800
#define PCIEM_CTL_MAX_READ_REQUEST 0x7000
#define PCIEM_CTL_BRDG_CFG_RETRY 0x8000 /* PCI-E - PCI/PCI-X bridges */
#define PCIEM_CTL_INITIATE_FLR 0x8000 /* FLR capable endpoints */
#define PCIER_DEVICE_STA 0xa
#define PCIEM_STA_CORRECTABLE_ERROR 0x0001
#define PCIEM_STA_NON_FATAL_ERROR 0x0002
#define PCIEM_STA_FATAL_ERROR 0x0004
#define PCIEM_STA_UNSUPPORTED_REQ 0x0008
#define PCIEM_STA_AUX_POWER 0x0010
#define PCIEM_STA_TRANSACTION_PND 0x0020
#define PCIER_LINK_CAP 0xc
#define PCIEM_LINK_CAP_MAX_SPEED 0x0000000f
#define PCIEM_LINK_CAP_MAX_WIDTH 0x000003f0
#define PCIEM_LINK_CAP_ASPM 0x00000c00
#define PCIEM_LINK_CAP_L0S_EXIT 0x00007000
#define PCIEM_LINK_CAP_L1_EXIT 0x00038000
#define PCIEM_LINK_CAP_CLOCK_PM 0x00040000
#define PCIEM_LINK_CAP_SURPRISE_DOWN 0x00080000
#define PCIEM_LINK_CAP_DL_ACTIVE 0x00100000
#define PCIEM_LINK_CAP_LINK_BW_NOTIFY 0x00200000
#define PCIEM_LINK_CAP_ASPM_COMPLIANCE 0x00400000
#define PCIEM_LINK_CAP_PORT 0xff000000
#define PCIER_LINK_CTL 0x10
#define PCIEM_LINK_CTL_ASPMC_DIS 0x0000
#define PCIEM_LINK_CTL_ASPMC_L0S 0x0001
#define PCIEM_LINK_CTL_ASPMC_L1 0x0002
#define PCIEM_LINK_CTL_ASPMC 0x0003
#define PCIEM_LINK_CTL_RCB 0x0008
#define PCIEM_LINK_CTL_LINK_DIS 0x0010
#define PCIEM_LINK_CTL_RETRAIN_LINK 0x0020
#define PCIEM_LINK_CTL_COMMON_CLOCK 0x0040
#define PCIEM_LINK_CTL_EXTENDED_SYNC 0x0080
#define PCIEM_LINK_CTL_ECPM 0x0100
#define PCIEM_LINK_CTL_HAWD 0x0200
#define PCIEM_LINK_CTL_LBMIE 0x0400
#define PCIEM_LINK_CTL_LABIE 0x0800
#define PCIER_LINK_STA 0x12
#define PCIEM_LINK_STA_SPEED 0x000f
#define PCIEM_LINK_STA_WIDTH 0x03f0
#define PCIEM_LINK_STA_TRAINING_ERROR 0x0400
#define PCIEM_LINK_STA_TRAINING 0x0800
#define PCIEM_LINK_STA_SLOT_CLOCK 0x1000
#define PCIEM_LINK_STA_DL_ACTIVE 0x2000
#define PCIEM_LINK_STA_LINK_BW_MGMT 0x4000
#define PCIEM_LINK_STA_LINK_AUTO_BW 0x8000
#define PCIER_SLOT_CAP 0x14
#define PCIEM_SLOT_CAP_APB 0x00000001
#define PCIEM_SLOT_CAP_PCP 0x00000002
#define PCIEM_SLOT_CAP_MRLSP 0x00000004
#define PCIEM_SLOT_CAP_AIP 0x00000008
#define PCIEM_SLOT_CAP_PIP 0x00000010
#define PCIEM_SLOT_CAP_HPS 0x00000020
#define PCIEM_SLOT_CAP_HPC 0x00000040
#define PCIEM_SLOT_CAP_SPLV 0x00007f80
#define PCIEM_SLOT_CAP_SPLS 0x00018000
#define PCIEM_SLOT_CAP_EIP 0x00020000
#define PCIEM_SLOT_CAP_NCCS 0x00040000
#define PCIEM_SLOT_CAP_PSN 0xfff80000
#define PCIER_SLOT_CTL 0x18
#define PCIEM_SLOT_CTL_ABPE 0x0001
#define PCIEM_SLOT_CTL_PFDE 0x0002
#define PCIEM_SLOT_CTL_MRLSCE 0x0004
#define PCIEM_SLOT_CTL_PDCE 0x0008
#define PCIEM_SLOT_CTL_CCIE 0x0010
#define PCIEM_SLOT_CTL_HPIE 0x0020
#define PCIEM_SLOT_CTL_AIC 0x00c0
#define PCIEM_SLOT_CTL_PIC 0x0300
#define PCIEM_SLOT_CTL_PCC 0x0400
#define PCIEM_SLOT_CTL_EIC 0x0800
#define PCIEM_SLOT_CTL_DLLSCE 0x1000
#define PCIER_SLOT_STA 0x1a
#define PCIEM_SLOT_STA_ABP 0x0001
#define PCIEM_SLOT_STA_PFD 0x0002
#define PCIEM_SLOT_STA_MRLSC 0x0004
#define PCIEM_SLOT_STA_PDC 0x0008
#define PCIEM_SLOT_STA_CC 0x0010
#define PCIEM_SLOT_STA_MRLSS 0x0020
#define PCIEM_SLOT_STA_PDS 0x0040
#define PCIEM_SLOT_STA_EIS 0x0080
#define PCIEM_SLOT_STA_DLLSC 0x0100
#define PCIER_ROOT_CTL 0x1c
#define PCIER_ROOT_CAP 0x1e
#define PCIER_ROOT_STA 0x20
#define PCIER_DEVICE_CAP2 0x24
#define PCIER_DEVICE_CTL2 0x28
#define PCIEM_CTL2_COMP_TIMEOUT_VAL 0x000f
#define PCIEM_CTL2_COMP_TIMEOUT_DIS 0x0010
#define PCIEM_CTL2_ARI 0x0020
#define PCIEM_CTL2_ATOMIC_REQ_ENABLE 0x0040
#define PCIEM_CTL2_ATOMIC_EGR_BLOCK 0x0080
#define PCIEM_CTL2_ID_ORDERED_REQ_EN 0x0100
#define PCIEM_CTL2_ID_ORDERED_CMP_EN 0x0200
#define PCIEM_CTL2_LTR_ENABLE 0x0400
#define PCIEM_CTL2_OBFF 0x6000
#define PCIEM_OBFF_DISABLE 0x0000
#define PCIEM_OBFF_MSGA_ENABLE 0x2000
#define PCIEM_OBFF_MSGB_ENABLE 0x4000
#define PCIEM_OBFF_WAKE_ENABLE 0x6000
#define PCIEM_CTL2_END2END_TLP 0x8000
#define PCIER_DEVICE_STA2 0x2a
#define PCIER_LINK_CAP2 0x2c
#define PCIER_LINK_CTL2 0x30
#define PCIER_LINK_STA2 0x32
#define PCIER_SLOT_CAP2 0x34
#define PCIER_SLOT_CTL2 0x38
#define PCIER_SLOT_STA2 0x3a
/* Old compatibility definitions for PCI Express registers */
#define PCIR_EXPRESS_FLAGS PCIER_FLAGS
#define PCIM_EXP_FLAGS_VERSION PCIEM_FLAGS_VERSION
#define PCIM_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE
#define PCIM_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT
#define PCIM_EXP_TYPE_LEGACY_ENDPOINT PCIEM_TYPE_LEGACY_ENDPOINT
#define PCIM_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT
#define PCIM_EXP_TYPE_UPSTREAM_PORT PCIEM_TYPE_UPSTREAM_PORT
#define PCIM_EXP_TYPE_DOWNSTREAM_PORT PCIEM_TYPE_DOWNSTREAM_PORT
#define PCIM_EXP_TYPE_PCI_BRIDGE PCIEM_TYPE_PCI_BRIDGE
#define PCIM_EXP_TYPE_PCIE_BRIDGE PCIEM_TYPE_PCIE_BRIDGE
#define PCIM_EXP_TYPE_ROOT_INT_EP PCIEM_TYPE_ROOT_INT_EP
#define PCIM_EXP_TYPE_ROOT_EC PCIEM_TYPE_ROOT_EC
#define PCIM_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT
#define PCIM_EXP_FLAGS_IRQ PCIEM_FLAGS_IRQ
#define PCIR_EXPRESS_DEVICE_CAP PCIER_DEVICE_CAP
#define PCIM_EXP_CAP_MAX_PAYLOAD PCIEM_CAP_MAX_PAYLOAD
#define PCIM_EXP_CAP_PHANTHOM_FUNCS PCIEM_CAP_PHANTHOM_FUNCS
#define PCIM_EXP_CAP_EXT_TAG_FIELD PCIEM_CAP_EXT_TAG_FIELD
#define PCIM_EXP_CAP_L0S_LATENCY PCIEM_CAP_L0S_LATENCY
#define PCIM_EXP_CAP_L1_LATENCY PCIEM_CAP_L1_LATENCY
#define PCIM_EXP_CAP_ROLE_ERR_RPT PCIEM_CAP_ROLE_ERR_RPT
#define PCIM_EXP_CAP_SLOT_PWR_LIM_VAL PCIEM_CAP_SLOT_PWR_LIM_VAL
#define PCIM_EXP_CAP_SLOT_PWR_LIM_SCALE PCIEM_CAP_SLOT_PWR_LIM_SCALE
#define PCIM_EXP_CAP_FLR PCIEM_CAP_FLR
#define PCIR_EXPRESS_DEVICE_CTL PCIER_DEVICE_CTL
#define PCIM_EXP_CTL_COR_ENABLE PCIEM_CTL_COR_ENABLE
#define PCIM_EXP_CTL_NFER_ENABLE PCIEM_CTL_NFER_ENABLE
#define PCIM_EXP_CTL_FER_ENABLE PCIEM_CTL_FER_ENABLE
#define PCIM_EXP_CTL_URR_ENABLE PCIEM_CTL_URR_ENABLE
#define PCIM_EXP_CTL_RELAXED_ORD_ENABLE PCIEM_CTL_RELAXED_ORD_ENABLE
#define PCIM_EXP_CTL_MAX_PAYLOAD PCIEM_CTL_MAX_PAYLOAD
#define PCIM_EXP_CTL_EXT_TAG_FIELD PCIEM_CTL_EXT_TAG_FIELD
#define PCIM_EXP_CTL_PHANTHOM_FUNCS PCIEM_CTL_PHANTHOM_FUNCS
#define PCIM_EXP_CTL_AUX_POWER_PM PCIEM_CTL_AUX_POWER_PM
#define PCIM_EXP_CTL_NOSNOOP_ENABLE PCIEM_CTL_NOSNOOP_ENABLE
#define PCIM_EXP_CTL_MAX_READ_REQUEST PCIEM_CTL_MAX_READ_REQUEST
#define PCIM_EXP_CTL_BRDG_CFG_RETRY PCIEM_CTL_BRDG_CFG_RETRY
#define PCIM_EXP_CTL_INITIATE_FLR PCIEM_CTL_INITIATE_FLR
#define PCIR_EXPRESS_DEVICE_STA PCIER_DEVICE_STA
#define PCIM_EXP_STA_CORRECTABLE_ERROR PCIEM_STA_CORRECTABLE_ERROR
#define PCIM_EXP_STA_NON_FATAL_ERROR PCIEM_STA_NON_FATAL_ERROR
#define PCIM_EXP_STA_FATAL_ERROR PCIEM_STA_FATAL_ERROR
#define PCIM_EXP_STA_UNSUPPORTED_REQ PCIEM_STA_UNSUPPORTED_REQ
#define PCIM_EXP_STA_AUX_POWER PCIEM_STA_AUX_POWER
#define PCIM_EXP_STA_TRANSACTION_PND PCIEM_STA_TRANSACTION_PND
#define PCIR_EXPRESS_LINK_CAP PCIER_LINK_CAP
#define PCIM_LINK_CAP_MAX_SPEED PCIEM_LINK_CAP_MAX_SPEED
#define PCIM_LINK_CAP_MAX_WIDTH PCIEM_LINK_CAP_MAX_WIDTH
#define PCIM_LINK_CAP_ASPM PCIEM_LINK_CAP_ASPM
#define PCIM_LINK_CAP_L0S_EXIT PCIEM_LINK_CAP_L0S_EXIT
#define PCIM_LINK_CAP_L1_EXIT PCIEM_LINK_CAP_L1_EXIT
#define PCIM_LINK_CAP_CLOCK_PM PCIEM_LINK_CAP_CLOCK_PM
#define PCIM_LINK_CAP_SURPRISE_DOWN PCIEM_LINK_CAP_SURPRISE_DOWN
#define PCIM_LINK_CAP_DL_ACTIVE PCIEM_LINK_CAP_DL_ACTIVE
#define PCIM_LINK_CAP_LINK_BW_NOTIFY PCIEM_LINK_CAP_LINK_BW_NOTIFY
#define PCIM_LINK_CAP_ASPM_COMPLIANCE PCIEM_LINK_CAP_ASPM_COMPLIANCE
#define PCIM_LINK_CAP_PORT PCIEM_LINK_CAP_PORT
#define PCIR_EXPRESS_LINK_CTL PCIER_LINK_CTL
#define PCIM_EXP_LINK_CTL_ASPMC_DIS PCIEM_LINK_CTL_ASPMC_DIS
#define PCIM_EXP_LINK_CTL_ASPMC_L0S PCIEM_LINK_CTL_ASPMC_L0S
#define PCIM_EXP_LINK_CTL_ASPMC_L1 PCIEM_LINK_CTL_ASPMC_L1
#define PCIM_EXP_LINK_CTL_ASPMC PCIEM_LINK_CTL_ASPMC
#define PCIM_EXP_LINK_CTL_RCB PCIEM_LINK_CTL_RCB
#define PCIM_EXP_LINK_CTL_LINK_DIS PCIEM_LINK_CTL_LINK_DIS
#define PCIM_EXP_LINK_CTL_RETRAIN_LINK PCIEM_LINK_CTL_RETRAIN_LINK
#define PCIM_EXP_LINK_CTL_COMMON_CLOCK PCIEM_LINK_CTL_COMMON_CLOCK
#define PCIM_EXP_LINK_CTL_EXTENDED_SYNC PCIEM_LINK_CTL_EXTENDED_SYNC
#define PCIM_EXP_LINK_CTL_ECPM PCIEM_LINK_CTL_ECPM
#define PCIM_EXP_LINK_CTL_HAWD PCIEM_LINK_CTL_HAWD
#define PCIM_EXP_LINK_CTL_LBMIE PCIEM_LINK_CTL_LBMIE
#define PCIM_EXP_LINK_CTL_LABIE PCIEM_LINK_CTL_LABIE
#define PCIR_EXPRESS_LINK_STA PCIER_LINK_STA
#define PCIM_LINK_STA_SPEED PCIEM_LINK_STA_SPEED
#define PCIM_LINK_STA_WIDTH PCIEM_LINK_STA_WIDTH
#define PCIM_LINK_STA_TRAINING_ERROR PCIEM_LINK_STA_TRAINING_ERROR
#define PCIM_LINK_STA_TRAINING PCIEM_LINK_STA_TRAINING
#define PCIM_LINK_STA_SLOT_CLOCK PCIEM_LINK_STA_SLOT_CLOCK
#define PCIM_LINK_STA_DL_ACTIVE PCIEM_LINK_STA_DL_ACTIVE
#define PCIM_LINK_STA_LINK_BW_MGMT PCIEM_LINK_STA_LINK_BW_MGMT
#define PCIM_LINK_STA_LINK_AUTO_BW PCIEM_LINK_STA_LINK_AUTO_BW
#define PCIR_EXPRESS_SLOT_CAP PCIER_SLOT_CAP
#define PCIR_EXPRESS_SLOT_CTL PCIER_SLOT_CTL
#define PCIR_EXPRESS_SLOT_STA PCIER_SLOT_STA
#define PCIR_EXPRESS_ROOT_CTL PCIER_ROOT_CTL
#define PCIR_EXPRESS_ROOT_CAP PCIER_ROOT_CAP
#define PCIR_EXPRESS_ROOT_STA PCIER_ROOT_STA
#define PCIR_EXPRESS_DEVICE_CAP2 PCIER_DEVICE_CAP2
#define PCIR_EXPRESS_DEVICE_CTL2 PCIER_DEVICE_CTL2
#define PCIM_EXP_CTL2_COMP_TIMEOUT_VAL PCIEM_CTL2_COMP_TIMEOUT_VAL
#define PCIM_EXP_CTL2_COMP_TIMEOUT_DIS PCIEM_CTL2_COMP_TIMEOUT_DIS
#define PCIM_EXP_CTL2_ARI PCIEM_CTL2_ARI
#define PCIM_EXP_CTL2_ATOMIC_REQ_ENABLE PCIEM_CTL2_ATOMIC_REQ_ENABLE
#define PCIM_EXP_CTL2_ATOMIC_EGR_BLOCK PCIEM_CTL2_ATOMIC_EGR_BLOCK
#define PCIM_EXP_CTL2_ID_ORDERED_REQ_EN PCIEM_CTL2_ID_ORDERED_REQ_EN
#define PCIM_EXP_CTL2_ID_ORDERED_CMP_EN PCIEM_CTL2_ID_ORDERED_CMP_EN
#define PCIM_EXP_CTL2_LTR_ENABLE PCIEM_CTL2_LTR_ENABLE
#define PCIM_EXP_CTL2_OBFF PCIEM_CTL2_OBFF
#define PCIM_EXP_OBFF_DISABLE PCIEM_OBFF_DISABLE
#define PCIM_EXP_OBFF_MSGA_ENABLE PCIEM_OBFF_MSGA_ENABLE
#define PCIM_EXP_OBFF_MSGB_ENABLE PCIEM_OBFF_MSGB_ENABLE
#define PCIM_EXP_OBFF_WAKE_ENABLE PCIEM_OBFF_WAKE_ENABLE
#define PCIM_EXP_CTL2_END2END_TLP PCIEM_CTL2_END2END_TLP
#define PCIR_EXPRESS_DEVICE_STA2 PCIER_DEVICE_STA2
#define PCIR_EXPRESS_LINK_CAP2 PCIER_LINK_CAP2
#define PCIR_EXPRESS_LINK_CTL2 PCIER_LINK_CTL2
#define PCIR_EXPRESS_LINK_STA2 PCIER_LINK_STA2
#define PCIR_EXPRESS_SLOT_CAP2 PCIER_SLOT_CAP2
#define PCIR_EXPRESS_SLOT_CTL2 PCIER_SLOT_CTL2
#define PCIR_EXPRESS_SLOT_STA2 PCIER_SLOT_STA2
/* MSI-X definitions */
#define PCIR_MSIX_CTRL 0x2
#define PCIM_MSIXCTRL_MSIX_ENABLE 0x8000
#define PCIM_MSIXCTRL_FUNCTION_MASK 0x4000
#define PCIM_MSIXCTRL_TABLE_SIZE 0x07FF
#define PCIR_MSIX_TABLE 0x4
#define PCIR_MSIX_PBA 0x8
#define PCIM_MSIX_BIR_MASK 0x7
#define PCIM_MSIX_BIR_BAR_10 0
#define PCIM_MSIX_BIR_BAR_14 1
#define PCIM_MSIX_BIR_BAR_18 2
#define PCIM_MSIX_BIR_BAR_1C 3
#define PCIM_MSIX_BIR_BAR_20 4
#define PCIM_MSIX_BIR_BAR_24 5
#define PCIM_MSIX_VCTRL_MASK 0x1
/* PCI Advanced Features definitions */
#define PCIR_PCIAF_CAP 0x3
#define PCIM_PCIAFCAP_TP 0x01
#define PCIM_PCIAFCAP_FLR 0x02
#define PCIR_PCIAF_CTRL 0x4
#define PCIR_PCIAFCTRL_FLR 0x01
#define PCIR_PCIAF_STATUS 0x5
#define PCIR_PCIAFSTATUS_TP 0x01
/* Advanced Error Reporting */
#define PCIR_AER_UC_STATUS 0x04
#define PCIM_AER_UC_TRAINING_ERROR 0x00000001
#define PCIM_AER_UC_DL_PROTOCOL_ERROR 0x00000010
#define PCIM_AER_UC_SURPRISE_LINK_DOWN 0x00000020
#define PCIM_AER_UC_POISONED_TLP 0x00001000
#define PCIM_AER_UC_FC_PROTOCOL_ERROR 0x00002000
#define PCIM_AER_UC_COMPLETION_TIMEOUT 0x00004000
#define PCIM_AER_UC_COMPLETER_ABORT 0x00008000
#define PCIM_AER_UC_UNEXPECTED_COMPLETION 0x00010000
#define PCIM_AER_UC_RECEIVER_OVERFLOW 0x00020000
#define PCIM_AER_UC_MALFORMED_TLP 0x00040000
#define PCIM_AER_UC_ECRC_ERROR 0x00080000
#define PCIM_AER_UC_UNSUPPORTED_REQUEST 0x00100000
#define PCIM_AER_UC_ACS_VIOLATION 0x00200000
#define PCIM_AER_UC_INTERNAL_ERROR 0x00400000
#define PCIM_AER_UC_MC_BLOCKED_TLP 0x00800000
#define PCIM_AER_UC_ATOMIC_EGRESS_BLK 0x01000000
#define PCIM_AER_UC_TLP_PREFIX_BLOCKED 0x02000000
#define PCIR_AER_UC_MASK 0x08 /* Shares bits with UC_STATUS */
#define PCIR_AER_UC_SEVERITY 0x0c /* Shares bits with UC_STATUS */
#define PCIR_AER_COR_STATUS 0x10
#define PCIM_AER_COR_RECEIVER_ERROR 0x00000001
#define PCIM_AER_COR_BAD_TLP 0x00000040
#define PCIM_AER_COR_BAD_DLLP 0x00000080
#define PCIM_AER_COR_REPLAY_ROLLOVER 0x00000100
#define PCIM_AER_COR_REPLAY_TIMEOUT 0x00001000
#define PCIM_AER_COR_ADVISORY_NF_ERROR 0x00002000
#define PCIM_AER_COR_INTERNAL_ERROR 0x00004000
#define PCIM_AER_COR_HEADER_LOG_OVFLOW 0x00008000
#define PCIR_AER_COR_MASK 0x14 /* Shares bits with COR_STATUS */
#define PCIR_AER_CAP_CONTROL 0x18
#define PCIM_AER_FIRST_ERROR_PTR 0x0000001f
#define PCIM_AER_ECRC_GEN_CAPABLE 0x00000020
#define PCIM_AER_ECRC_GEN_ENABLE 0x00000040
#define PCIM_AER_ECRC_CHECK_CAPABLE 0x00000080
#define PCIM_AER_ECRC_CHECK_ENABLE 0x00000100
#define PCIM_AER_MULT_HDR_CAPABLE 0x00000200
#define PCIM_AER_MULT_HDR_ENABLE 0x00000400
#define PCIM_AER_TLP_PREFIX_LOG_PRESENT 0x00000800
#define PCIR_AER_HEADER_LOG 0x1c
#define PCIR_AER_ROOTERR_CMD 0x2c /* Only for root complex ports */
#define PCIM_AER_ROOTERR_COR_ENABLE 0x00000001
#define PCIM_AER_ROOTERR_NF_ENABLE 0x00000002
#define PCIM_AER_ROOTERR_F_ENABLE 0x00000004
#define PCIR_AER_ROOTERR_STATUS 0x30 /* Only for root complex ports */
#define PCIM_AER_ROOTERR_COR_ERR 0x00000001
#define PCIM_AER_ROOTERR_MULTI_COR_ERR 0x00000002
#define PCIM_AER_ROOTERR_UC_ERR 0x00000004
#define PCIM_AER_ROOTERR_MULTI_UC_ERR 0x00000008
#define PCIM_AER_ROOTERR_FIRST_UC_FATAL 0x00000010
#define PCIM_AER_ROOTERR_NF_ERR 0x00000020
#define PCIM_AER_ROOTERR_F_ERR 0x00000040
#define PCIM_AER_ROOTERR_INT_MESSAGE 0xf8000000
#define PCIR_AER_COR_SOURCE_ID 0x34 /* Only for root complex ports */
#define PCIR_AER_ERR_SOURCE_ID 0x36 /* Only for root complex ports */
#define PCIR_AER_TLP_PREFIX_LOG 0x38 /* Only for TLP prefix functions */
/* Virtual Channel definitions */
#define PCIR_VC_CAP1 0x04
#define PCIM_VC_CAP1_EXT_COUNT 0x00000007
#define PCIM_VC_CAP1_LOWPRI_EXT_COUNT 0x00000070
#define PCIR_VC_CAP2 0x08
#define PCIR_VC_CONTROL 0x0C
#define PCIR_VC_STATUS 0x0E
#define PCIR_VC_RESOURCE_CAP(n) (0x10 + (n) * 0x0C)
#define PCIR_VC_RESOURCE_CTL(n) (0x14 + (n) * 0x0C)
#define PCIR_VC_RESOURCE_STA(n) (0x18 + (n) * 0x0C)
/* Serial Number definitions */
#define PCIR_SERIAL_LOW 0x04
#define PCIR_SERIAL_HIGH 0x08
@@ -0,0 +1,69 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_DEV_PCI_PCIVAR_H_
#define _FBSD_COMPAT_DEV_PCI_PCIVAR_H_
#include <sys/bus.h>
#define PCI_RF_DENSE 0x10000
// ignored on x86
#define PCI_POWERSTATE_D0 0
#define PCI_POWERSTATE_D1 1
#define PCI_POWERSTATE_D2 2
#define PCI_POWERSTATE_D3 3
#define PCI_POWERSTATE_UNKNOWN -1
int pci_enable_busmaster(device_t dev);
int pci_enable_io(device_t dev, int reg);
uint32_t pci_get_devid(device_t dev);
void pci_set_intpin(device_t dev, uint8_t pin);
uint8_t pci_get_intpin(device_t dev);
uint16_t pci_get_vendor(device_t dev);
uint16_t pci_get_device(device_t dev);
uint16_t pci_get_subvendor(device_t dev);
uint16_t pci_get_subdevice(device_t dev);
uint8_t pci_get_revid(device_t dev);
uint8_t pci_get_cachelnsz(device_t dev);
uint8_t *pci_get_ether(device_t dev);
uint32_t pci_read_config(device_t dev, int reg, int width);
void pci_write_config(device_t dev, int reg, uint32_t val, int width);
uint32_t pci_get_domain(device_t dev);
uint8_t pci_get_bus(device_t dev);
uint8_t pci_get_slot(device_t dev);
uint8_t pci_get_function(device_t dev);
device_t pci_find_dbsf(uint32_t domain, uint8_t bus, uint8_t slot,
uint8_t func);
int pci_find_cap(device_t dev, int capability, int *capreg);
int pci_find_extcap(device_t dev, int capability, int *capreg);
int pci_msi_count(device_t dev);
int pci_alloc_msi(device_t dev, int *count);
int pci_release_msi(device_t dev);
int pci_msix_count(device_t dev);
int pci_alloc_msix(device_t dev, int *count);
int pci_get_max_read_req(device_t dev);
int pci_set_max_read_req(device_t dev, int size);
int pci_get_powerstate(device_t dev);
int pci_set_powerstate(device_t dev, int newPowerState);
static inline int
pci_get_vpd_ident(device_t dev, const char **identptr)
{
return -1;
}
#endif /* _FBSD_COMPAT_DEV_PCI_PCIVAR_H_ */
@@ -0,0 +1,32 @@
/*
* Copyright 2009, Colin Günther. All Rights Reserved.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE__BUS_H_
#define _FBSD_COMPAT_MACHINE__BUS_H_
#ifdef B_HAIKU_64_BIT
typedef uint64_t bus_addr_t;
typedef uint64_t bus_size_t;
typedef uint64_t bus_space_tag_t;
typedef uint64_t bus_space_handle_t;
#else
typedef uint32_t bus_addr_t;
typedef uint32_t bus_size_t;
typedef int bus_space_tag_t;
typedef unsigned int bus_space_handle_t;
#endif
#endif /* _FBSD_COMPAT_MACHINE__BUS_H_ */
@@ -0,0 +1,27 @@
/*
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_ATOMIC_H_
#define _FBSD_COMPAT_MACHINE_ATOMIC_H_
#include <KernelExport.h>
#define atomic_add_int(ptr, value) \
atomic_add((int32 *)(ptr), value)
#define atomic_subtract_int(ptr, value) \
atomic_add((int32 *)(ptr), -value)
#define atomic_set_acq_32(ptr, value) \
atomic_set_int(ptr, value)
#define atomic_set_int(ptr, value) \
atomic_or((int32 *)(ptr), value)
#define atomic_readandclear_int(ptr) \
atomic_set((int32 *)(ptr), 0)
#endif /* _FBSD_COMPAT_MACHINE_ATOMIC_H_ */
@@ -0,0 +1,349 @@
/*
* Copyright 2009, Colin Günther. All Rights Reserved.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
/*-
* Copyright (c) KATO Takenori, 1999.
*
* All rights reserved. Unpublished rights reserved under the copyright
* laws of Japan.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _FBSD_COMPAT_MACHINE_BUS_H_
#define _FBSD_COMPAT_MACHINE_BUS_H_
#include <machine/_bus.h>
#include <machine/cpufunc.h>
struct resource;
// TODO: x86 specific!
#define I386_BUS_SPACE_IO 0
#define I386_BUS_SPACE_MEM 1
#define BUS_SPACE_MAXADDR_32BIT 0xffffffff
#ifdef __x86_64__
# define BUS_SPACE_MAXADDR 0xffffffffffffffffull
#else
# define BUS_SPACE_MAXADDR 0xffffffff
#endif
#define BUS_SPACE_MAXSIZE_32BIT 0xffffffff
#define BUS_SPACE_MAXSIZE 0xffffffff
#define BUS_SPACE_UNRESTRICTED (~0)
#define BUS_SPACE_BARRIER_READ 1
#define BUS_SPACE_BARRIER_WRITE 2
// Copied from arch/x86/arch_cpu.h
// Can't use the header as it indirectly includes arch/x86/arch_thread_types.h
// Which has a namespace, so can't be used in FreeBSD's C-code atm.
#define out8(value,port) \
__asm__ ("outb %%al,%%dx" : : "a" (value), "d" (port))
#define out16(value,port) \
__asm__ ("outw %%ax,%%dx" : : "a" (value), "d" (port))
#define out32(value,port) \
__asm__ ("outl %%eax,%%dx" : : "a" (value), "d" (port))
#define in8(port) ({ \
uint8 _v; \
__asm__ volatile ("inb %%dx,%%al" : "=a" (_v) : "d" (port)); \
_v; \
})
#define in16(port) ({ \
uint16 _v; \
__asm__ volatile ("inw %%dx,%%ax":"=a" (_v) : "d" (port)); \
_v; \
})
#define in32(port) ({ \
uint32 _v; \
__asm__ volatile ("inl %%dx,%%eax":"=a" (_v) : "d" (port)); \
_v; \
})
static inline uint8_t
bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset)
{
return tag == I386_BUS_SPACE_MEM
? (*(volatile u_int8_t *)(handle + offset))
: in8(handle + offset);
}
static inline uint16_t
bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset)
{
return tag == I386_BUS_SPACE_MEM
? (*(volatile u_int16_t *)(handle + offset))
: in16(handle + offset);
}
static inline uint32_t
bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset)
{
return tag == I386_BUS_SPACE_MEM
? (*(volatile u_int32_t *)(handle + offset))
: in32(handle + offset);
}
static inline void
bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset, uint8_t value)
{
if (tag == I386_BUS_SPACE_MEM)
*(volatile uint8_t *)(handle + offset) = value;
else
out8(value, handle + offset);
}
static inline void
bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset, uint16_t value)
{
if (tag == I386_BUS_SPACE_MEM)
*(volatile uint16_t *)(handle + offset) = value;
else
out16(value, handle + offset);
}
static inline void
bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset, uint32_t value)
{
if (tag == I386_BUS_SPACE_MEM)
*(volatile uint32_t *)(handle + offset) = value;
else
out32(value, handle + offset);
}
static inline void
bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int8_t *addr, size_t count)
{
if (tag == I386_BUS_SPACE_IO) {
int _port_ = bsh + offset;
__asm __volatile(" \n\
cld \n\
1: inb %w2,%%al \n\
stosb \n\
incl %2 \n\
loop 1b" :
"=D" (addr), "=c" (count), "=d" (_port_):
"0" (addr), "1" (count), "2" (_port_) :
"%eax", "memory", "cc");
} else {
void* _port_ = (void*) (bsh + offset);
memcpy(addr, _port_, count);
}
}
static inline void
bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int32_t *addr, size_t count)
{
if (tag == I386_BUS_SPACE_IO) {
int _port_ = bsh + offset;
__asm __volatile(" \n\
cld \n\
1: inl %w2,%%eax \n\
stosl \n\
addl $4,%2 \n\
loop 1b" :
"=D" (addr), "=c" (count), "=d" (_port_):
"0" (addr), "1" (count), "2" (_port_) :
"%eax", "memory", "cc");
} else {
void* _port_ = (void*) (bsh + offset);
memcpy(addr, _port_, count);
}
}
static inline void
bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, const u_int8_t *addr, size_t count)
{
if (tag == I386_BUS_SPACE_IO) {
int _port_ = bsh + offset;
__asm __volatile(" \n\
cld \n\
1: lodsb \n\
outb %%al,%w0 \n\
incl %0 \n\
loop 1b" :
"=d" (_port_), "=S" (addr), "=c" (count):
"0" (_port_), "1" (addr), "2" (count) :
"%eax", "memory", "cc");
} else {
void* _port_ = (void*) (bsh + offset);
memcpy(_port_, addr, count);
}
}
static inline void
bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, u_int32_t value, size_t count)
{
/* TODO implement */
}
static inline void
bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t offset, bus_size_t len, int flags)
{
if (flags & BUS_SPACE_BARRIER_READ)
#ifdef __x86_64__
__asm__ __volatile__ ("lock; addl $0,0(%%rsp)" : : : "memory");
#else
__asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory");
#endif
else
__asm__ __volatile__ ("" : : : "memory");
}
static inline void
bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
bus_size_t offset, const u_int8_t *addr, size_t count)
{
if (tag == I386_BUS_SPACE_IO)
outsb(bsh + offset, addr, count);
else {
__asm __volatile(" \n\
cld \n\
1: lodsb \n\
movb %%al,(%2) \n\
loop 1b" :
"=S" (addr), "=c" (count) :
"r" (bsh + offset), "0" (addr), "1" (count) :
"%eax", "memory", "cc");
}
}
#include <machine/bus_dma.h>
#define bus_space_write_stream_4(t, h, o, v) \
bus_space_write_4((t), (h), (o), (v))
#endif /* _FBSD_COMPAT_MACHINE_BUS_H_ */
@@ -0,0 +1,11 @@
/*
* Copyright 2009, Colin Günther, [email protected]
* All Rights Reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_BUS_DMA_H_
#define _FBSD_COMPAT_MACHINE_BUS_DMA_H_
#include <sys/bus_dma.h>
#endif /* _FBSD_COMPAT_MACHINE_BUS_DMA_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_CLOCK_H_
#define _FBSD_COMPAT_SYS_CLOCK_H_
#endif /* _FBSD_COMPAT_SYS_CLOCK_H_ */
@@ -0,0 +1,43 @@
/*-
* Copyright (c) 1993 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _FBSD_COMPAT_MACHINE_CPUFUNC_H_
#define _FBSD_COMPAT_MACHINE_CPUFUNC_H_
static __inline void
outsb(u_int port, const void *addr, size_t cnt)
{
__asm __volatile("cld; rep; outsb"
: "+S" (addr), "+c" (cnt)
: "d" (port));
}
#endif /* _FBSD_COMPAT_MACHINE_CPUFUNC_H_ */
@@ -0,0 +1,12 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_ENDIAN_H_
#define _FBSD_COMPAT_MACHINE_ENDIAN_H_
#include <sys/cdefs.h>
#include <sys/_types.h>
#endif
@@ -0,0 +1,32 @@
/*
* Copyright 2007, Axel Dörfler, [email protected]. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_IN_CKSUM_H_
#define _FBSD_COMPAT_MACHINE_IN_CKSUM_H_
#include <stdint.h>
#define in_cksum(m, len) in_cksum_skip(m, len, 0)
static inline u_short
in_pseudo(u_int sum, u_int b, u_int c)
{
// should never be called
panic("in_pseudo() called");
return 0;
}
static inline u_short
in_cksum_skip(struct mbuf* m, int len, int skip)
{
// should never be called
panic("in_cksum_skip() called");
return 0;
}
#endif /* _FBSD_COMPAT_MACHINE_IN_CKSUM_H_ */
@@ -0,0 +1,14 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_RESOURCE_H_
#define _FBSD_COMPAT_MACHINE_RESOURCE_H_
#define SYS_RES_IRQ 0x1
#define SYS_RES_DRQ 0x2
#define SYS_RES_MEMORY 0x3
#define SYS_RES_IOPORT 0x4
#endif
@@ -0,0 +1,12 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_MACHINE_STDARG_H_
#define _FBSD_COMPAT_MACHINE_STDARG_H_
#include <sys/cdefs.h>
#include <sys/_types.h>
#endif /* _FBSD_COMPAT_MACHINE_STDARG_H_ */
@@ -0,0 +1,32 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NET_BPF_H_
#define _FBSD_COMPAT_NET_BPF_H_
#define DLT_EN10MB 1 /* Ethernet (10Mb) */
#define DLT_IEEE802_11 105 /* IEEE 802.11 wireless */
struct bpf_if;
#define bpf_mtap(bpf_if, mbuf) do { } while (0)
#define BPF_MTAP(ifp, m) do { } while (0)
#define BPF_TAP(ifp, pkt, pktlen) do { } while (0)
#define bpf_mtap2(bpf_if, data, dlen, mbuf) do { } while (0)
#define bpfattach(ifnet, dlt, hdrlen) do { } while (0);
#define bpfattach2(ifnet, dlt, hdrlen, bpf_if) do { } while (0)
#define bpfdetach(ifnet) do { } while (0);
static inline int
bpf_peers_present(struct bpf_if *bpf)
{
return 0;
}
#endif /* _FBSD_COMPAT_NET_BPF_H_ */
@@ -0,0 +1,405 @@
/*
* Fundamental constants relating to ethernet.
*
* $FreeBSD: src/sys/net/ethernet.h,v 1.32 2007/05/29 12:40:45 yar Exp $
*
*/
#ifndef _FBSD_COMPAT_NET_ETHERNET_H_
#define _FBSD_COMPAT_NET_ETHERNET_H_
/*
* Somce basic Ethernet constants.
*/
#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
#define ETHER_TYPE_LEN 2 /* length of the Ethernet type field */
#define ETHER_CRC_LEN 4 /* length of the Ethernet CRC */
#define ETHER_HDR_LEN (ETHER_ADDR_LEN*2+ETHER_TYPE_LEN)
#define ETHER_MIN_LEN 64 /* minimum frame len, including CRC */
#define ETHER_MAX_LEN 1518 /* maximum frame len, including CRC */
#define ETHER_MAX_LEN_JUMBO 9018 /* max jumbo frame len, including CRC */
#define ETHER_VLAN_ENCAP_LEN 4 /* len of 802.1Q VLAN encapsulation */
/*
* Mbuf adjust factor to force 32-bit alignment of IP header.
* Drivers should do m_adj(m, ETHER_ALIGN) when setting up a
* receive so the upper layers get the IP header properly aligned
* past the 14-byte Ethernet header.
*/
#define ETHER_ALIGN 2 /* driver adjust for IP hdr alignment */
/*
* Compute the maximum frame size based on ethertype (i.e. possible
* encapsulation) and whether or not an FCS is present.
*/
#define ETHER_MAX_FRAME(ifp, etype, hasfcs) \
((ifp)->if_mtu + ETHER_HDR_LEN + \
((hasfcs) ? ETHER_CRC_LEN : 0) + \
(((etype) == ETHERTYPE_VLAN) ? ETHER_VLAN_ENCAP_LEN : 0))
/*
* Ethernet-specific mbuf flags.
*/
#define M_HASFCS M_PROTO5 /* FCS included at end of frame */
/*
* Ethernet CRC32 polynomials (big- and little-endian verions).
*/
#define ETHER_CRC_POLY_LE 0xedb88320
#define ETHER_CRC_POLY_BE 0x04c11db6
/*
* A macro to validate a length with
*/
#define ETHER_IS_VALID_LEN(foo) \
((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
static const u_char etherbroadcastaddr[ETHER_ADDR_LEN] =
{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
/*
* Structure of a 10Mb/s Ethernet header.
*/
struct ether_header {
u_char ether_dhost[ETHER_ADDR_LEN];
u_char ether_shost[ETHER_ADDR_LEN];
u_short ether_type;
} __packed;
/*
* Structure of a 48-bit Ethernet address.
*/
struct ether_addr {
u_char octet[ETHER_ADDR_LEN];
} __packed;
#ifdef CTASSERT
CTASSERT(sizeof (struct ether_header) == ETHER_ADDR_LEN * 2 + 2);
CTASSERT(sizeof (struct ether_addr) == ETHER_ADDR_LEN);
#endif
#define ETHER_IS_MULTICAST(addr) (*(addr) & 0x01) /* is address mcast/bcast? */
/*
* NOTE: 0x0000-0x05DC (0..1500) are generally IEEE 802.3 length fields.
* However, there are some conflicts.
*/
#define ETHERTYPE_8023 0x0004 /* IEEE 802.3 packet */
/* 0x0101 .. 0x1FF Experimental */
#define ETHERTYPE_PUP 0x0200 /* Xerox PUP protocol - see 0A00 */
#define ETHERTYPE_PUPAT 0x0200 /* PUP Address Translation - see 0A01 */
#define ETHERTYPE_SPRITE 0x0500 /* ??? */
/* 0x0400 Nixdorf */
#define ETHERTYPE_NS 0x0600 /* XNS */
#define ETHERTYPE_NSAT 0x0601 /* XNS Address Translation (3Mb only) */
#define ETHERTYPE_DLOG1 0x0660 /* DLOG (?) */
#define ETHERTYPE_DLOG2 0x0661 /* DLOG (?) */
#define ETHERTYPE_IP 0x0800 /* IP protocol */
#define ETHERTYPE_X75 0x0801 /* X.75 Internet */
#define ETHERTYPE_NBS 0x0802 /* NBS Internet */
#define ETHERTYPE_ECMA 0x0803 /* ECMA Internet */
#define ETHERTYPE_CHAOS 0x0804 /* CHAOSnet */
#define ETHERTYPE_X25 0x0805 /* X.25 Level 3 */
#define ETHERTYPE_ARP 0x0806 /* Address resolution protocol */
#define ETHERTYPE_NSCOMPAT 0x0807 /* XNS Compatibility */
#define ETHERTYPE_FRARP 0x0808 /* Frame Relay ARP (RFC1701) */
/* 0x081C Symbolics Private */
/* 0x0888 - 0x088A Xyplex */
#define ETHERTYPE_UBDEBUG 0x0900 /* Ungermann-Bass network debugger */
#define ETHERTYPE_IEEEPUP 0x0A00 /* Xerox IEEE802.3 PUP */
#define ETHERTYPE_IEEEPUPAT 0x0A01 /* Xerox IEEE802.3 PUP Address Translation */
#define ETHERTYPE_VINES 0x0BAD /* Banyan VINES */
#define ETHERTYPE_VINESLOOP 0x0BAE /* Banyan VINES Loopback */
#define ETHERTYPE_VINESECHO 0x0BAF /* Banyan VINES Echo */
/* 0x1000 - 0x100F Berkeley Trailer */
/*
* The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
* (type-ETHERTYPE_TRAIL)*512 bytes of data followed
* by an ETHER type (as given above) and then the (variable-length) header.
*/
#define ETHERTYPE_TRAIL 0x1000 /* Trailer packet */
#define ETHERTYPE_NTRAILER 16
#define ETHERTYPE_DCA 0x1234 /* DCA - Multicast */
#define ETHERTYPE_VALID 0x1600 /* VALID system protocol */
#define ETHERTYPE_DOGFIGHT 0x1989 /* Artificial Horizons ("Aviator" dogfight simulator [on Sun]) */
#define ETHERTYPE_RCL 0x1995 /* Datapoint Corporation (RCL lan protocol) */
/* The following 3C0x types
are unregistered: */
#define ETHERTYPE_NBPVCD 0x3C00 /* 3Com NBP virtual circuit datagram (like XNS SPP) not registered */
#define ETHERTYPE_NBPSCD 0x3C01 /* 3Com NBP System control datagram not registered */
#define ETHERTYPE_NBPCREQ 0x3C02 /* 3Com NBP Connect request (virtual cct) not registered */
#define ETHERTYPE_NBPCRSP 0x3C03 /* 3Com NBP Connect repsonse not registered */
#define ETHERTYPE_NBPCC 0x3C04 /* 3Com NBP Connect complete not registered */
#define ETHERTYPE_NBPCLREQ 0x3C05 /* 3Com NBP Close request (virtual cct) not registered */
#define ETHERTYPE_NBPCLRSP 0x3C06 /* 3Com NBP Close response not registered */
#define ETHERTYPE_NBPDG 0x3C07 /* 3Com NBP Datagram (like XNS IDP) not registered */
#define ETHERTYPE_NBPDGB 0x3C08 /* 3Com NBP Datagram broadcast not registered */
#define ETHERTYPE_NBPCLAIM 0x3C09 /* 3Com NBP Claim NetBIOS name not registered */
#define ETHERTYPE_NBPDLTE 0x3C0A /* 3Com NBP Delete Netbios name not registered */
#define ETHERTYPE_NBPRAS 0x3C0B /* 3Com NBP Remote adaptor status request not registered */
#define ETHERTYPE_NBPRAR 0x3C0C /* 3Com NBP Remote adaptor response not registered */
#define ETHERTYPE_NBPRST 0x3C0D /* 3Com NBP Reset not registered */
#define ETHERTYPE_PCS 0x4242 /* PCS Basic Block Protocol */
#define ETHERTYPE_IMLBLDIAG 0x424C /* Information Modes Little Big LAN diagnostic */
#define ETHERTYPE_DIDDLE 0x4321 /* THD - Diddle */
#define ETHERTYPE_IMLBL 0x4C42 /* Information Modes Little Big LAN */
#define ETHERTYPE_SIMNET 0x5208 /* BBN Simnet Private */
#define ETHERTYPE_DECEXPER 0x6000 /* DEC Unassigned, experimental */
#define ETHERTYPE_MOPDL 0x6001 /* DEC MOP dump/load */
#define ETHERTYPE_MOPRC 0x6002 /* DEC MOP remote console */
#define ETHERTYPE_DECnet 0x6003 /* DEC DECNET Phase IV route */
#define ETHERTYPE_DN ETHERTYPE_DECnet /* libpcap, tcpdump */
#define ETHERTYPE_LAT 0x6004 /* DEC LAT */
#define ETHERTYPE_DECDIAG 0x6005 /* DEC diagnostic protocol (at interface initialization?) */
#define ETHERTYPE_DECCUST 0x6006 /* DEC customer protocol */
#define ETHERTYPE_SCA 0x6007 /* DEC LAVC, SCA */
#define ETHERTYPE_AMBER 0x6008 /* DEC AMBER */
#define ETHERTYPE_DECMUMPS 0x6009 /* DEC MUMPS */
/* 0x6010 - 0x6014 3Com Corporation */
#define ETHERTYPE_TRANSETHER 0x6558 /* Trans Ether Bridging (RFC1701)*/
#define ETHERTYPE_RAWFR 0x6559 /* Raw Frame Relay (RFC1701) */
#define ETHERTYPE_UBDL 0x7000 /* Ungermann-Bass download */
#define ETHERTYPE_UBNIU 0x7001 /* Ungermann-Bass NIUs */
#define ETHERTYPE_UBDIAGLOOP 0x7002 /* Ungermann-Bass diagnostic/loopback */
#define ETHERTYPE_UBNMC 0x7003 /* Ungermann-Bass ??? (NMC to/from UB Bridge) */
#define ETHERTYPE_UBBST 0x7005 /* Ungermann-Bass Bridge Spanning Tree */
#define ETHERTYPE_OS9 0x7007 /* OS/9 Microware */
#define ETHERTYPE_OS9NET 0x7009 /* OS/9 Net? */
/* 0x7020 - 0x7029 LRT (England) (now Sintrom) */
#define ETHERTYPE_RACAL 0x7030 /* Racal-Interlan */
#define ETHERTYPE_PRIMENTS 0x7031 /* Prime NTS (Network Terminal Service) */
#define ETHERTYPE_CABLETRON 0x7034 /* Cabletron */
#define ETHERTYPE_CRONUSVLN 0x8003 /* Cronus VLN */
#define ETHERTYPE_CRONUS 0x8004 /* Cronus Direct */
#define ETHERTYPE_HP 0x8005 /* HP Probe */
#define ETHERTYPE_NESTAR 0x8006 /* Nestar */
#define ETHERTYPE_ATTSTANFORD 0x8008 /* AT&T/Stanford (local use) */
#define ETHERTYPE_EXCELAN 0x8010 /* Excelan */
#define ETHERTYPE_SG_DIAG 0x8013 /* SGI diagnostic type */
#define ETHERTYPE_SG_NETGAMES 0x8014 /* SGI network games */
#define ETHERTYPE_SG_RESV 0x8015 /* SGI reserved type */
#define ETHERTYPE_SG_BOUNCE 0x8016 /* SGI bounce server */
#define ETHERTYPE_APOLLODOMAIN 0x8019 /* Apollo DOMAIN */
#define ETHERTYPE_TYMSHARE 0x802E /* Tymeshare */
#define ETHERTYPE_TIGAN 0x802F /* Tigan, Inc. */
#define ETHERTYPE_REVARP 0x8035 /* Reverse addr resolution protocol */
#define ETHERTYPE_AEONIC 0x8036 /* Aeonic Systems */
#define ETHERTYPE_IPXNEW 0x8037 /* IPX (Novell Netware?) */
#define ETHERTYPE_LANBRIDGE 0x8038 /* DEC LANBridge */
#define ETHERTYPE_DSMD 0x8039 /* DEC DSM/DDP */
#define ETHERTYPE_ARGONAUT 0x803A /* DEC Argonaut Console */
#define ETHERTYPE_VAXELN 0x803B /* DEC VAXELN */
#define ETHERTYPE_DECDNS 0x803C /* DEC DNS Naming Service */
#define ETHERTYPE_ENCRYPT 0x803D /* DEC Ethernet Encryption */
#define ETHERTYPE_DECDTS 0x803E /* DEC Distributed Time Service */
#define ETHERTYPE_DECLTM 0x803F /* DEC LAN Traffic Monitor */
#define ETHERTYPE_DECNETBIOS 0x8040 /* DEC PATHWORKS DECnet NETBIOS Emulation */
#define ETHERTYPE_DECLAST 0x8041 /* DEC Local Area System Transport */
/* 0x8042 DEC Unassigned */
#define ETHERTYPE_PLANNING 0x8044 /* Planning Research Corp. */
/* 0x8046 - 0x8047 AT&T */
#define ETHERTYPE_DECAM 0x8048 /* DEC Availability Manager for Distributed Systems DECamds (but someone at DEC says not) */
#define ETHERTYPE_EXPERDATA 0x8049 /* ExperData */
#define ETHERTYPE_VEXP 0x805B /* Stanford V Kernel exp. */
#define ETHERTYPE_VPROD 0x805C /* Stanford V Kernel prod. */
#define ETHERTYPE_ES 0x805D /* Evans & Sutherland */
#define ETHERTYPE_LITTLE 0x8060 /* Little Machines */
#define ETHERTYPE_COUNTERPOINT 0x8062 /* Counterpoint Computers */
/* 0x8065 - 0x8066 Univ. of Mass @ Amherst */
#define ETHERTYPE_VEECO 0x8067 /* Veeco Integrated Auto. */
#define ETHERTYPE_GENDYN 0x8068 /* General Dynamics */
#define ETHERTYPE_ATT 0x8069 /* AT&T */
#define ETHERTYPE_AUTOPHON 0x806A /* Autophon */
#define ETHERTYPE_COMDESIGN 0x806C /* ComDesign */
#define ETHERTYPE_COMPUGRAPHIC 0x806D /* Compugraphic Corporation */
/* 0x806E - 0x8077 Landmark Graphics Corp. */
#define ETHERTYPE_MATRA 0x807A /* Matra */
#define ETHERTYPE_DDE 0x807B /* Dansk Data Elektronik */
#define ETHERTYPE_MERIT 0x807C /* Merit Internodal (or Univ of Michigan?) */
/* 0x807D - 0x807F Vitalink Communications */
#define ETHERTYPE_VLTLMAN 0x8080 /* Vitalink TransLAN III Management */
/* 0x8081 - 0x8083 Counterpoint Computers */
/* 0x8088 - 0x808A Xyplex */
#define ETHERTYPE_ATALK 0x809B /* AppleTalk */
#define ETHERTYPE_AT ETHERTYPE_ATALK /* old NetBSD */
#define ETHERTYPE_APPLETALK ETHERTYPE_ATALK /* HP-UX */
/* 0x809C - 0x809E Datability */
#define ETHERTYPE_SPIDER 0x809F /* Spider Systems Ltd. */
/* 0x80A3 Nixdorf */
/* 0x80A4 - 0x80B3 Siemens Gammasonics Inc. */
/* 0x80C0 - 0x80C3 DCA (Digital Comm. Assoc.) Data Exchange Cluster */
/* 0x80C4 - 0x80C5 Banyan Systems */
#define ETHERTYPE_PACER 0x80C6 /* Pacer Software */
#define ETHERTYPE_APPLITEK 0x80C7 /* Applitek Corporation */
/* 0x80C8 - 0x80CC Intergraph Corporation */
/* 0x80CD - 0x80CE Harris Corporation */
/* 0x80CF - 0x80D2 Taylor Instrument */
/* 0x80D3 - 0x80D4 Rosemount Corporation */
#define ETHERTYPE_SNA 0x80D5 /* IBM SNA Services over Ethernet */
#define ETHERTYPE_VARIAN 0x80DD /* Varian Associates */
/* 0x80DE - 0x80DF TRFS (Integrated Solutions Transparent Remote File System) */
/* 0x80E0 - 0x80E3 Allen-Bradley */
/* 0x80E4 - 0x80F0 Datability */
#define ETHERTYPE_RETIX 0x80F2 /* Retix */
#define ETHERTYPE_AARP 0x80F3 /* AppleTalk AARP */
/* 0x80F4 - 0x80F5 Kinetics */
#define ETHERTYPE_APOLLO 0x80F7 /* Apollo Computer */
#define ETHERTYPE_VLAN 0x8100 /* IEEE 802.1Q VLAN tagging (XXX conflicts) */
/* 0x80FF - 0x8101 Wellfleet Communications (XXX conflicts) */
#define ETHERTYPE_BOFL 0x8102 /* Wellfleet; BOFL (Breath OF Life) pkts [every 5-10 secs.] */
#define ETHERTYPE_WELLFLEET 0x8103 /* Wellfleet Communications */
/* 0x8107 - 0x8109 Symbolics Private */
#define ETHERTYPE_TALARIS 0x812B /* Talaris */
#define ETHERTYPE_WATERLOO 0x8130 /* Waterloo Microsystems Inc. (XXX which?) */
#define ETHERTYPE_HAYES 0x8130 /* Hayes Microcomputers (XXX which?) */
#define ETHERTYPE_VGLAB 0x8131 /* VG Laboratory Systems */
/* 0x8132 - 0x8137 Bridge Communications */
#define ETHERTYPE_IPX 0x8137 /* Novell (old) NetWare IPX (ECONFIG E option) */
#define ETHERTYPE_NOVELL 0x8138 /* Novell, Inc. */
/* 0x8139 - 0x813D KTI */
#define ETHERTYPE_MUMPS 0x813F /* M/MUMPS data sharing */
#define ETHERTYPE_AMOEBA 0x8145 /* Vrije Universiteit (NL) Amoeba 4 RPC (obsolete) */
#define ETHERTYPE_FLIP 0x8146 /* Vrije Universiteit (NL) FLIP (Fast Local Internet Protocol) */
#define ETHERTYPE_VURESERVED 0x8147 /* Vrije Universiteit (NL) [reserved] */
#define ETHERTYPE_LOGICRAFT 0x8148 /* Logicraft */
#define ETHERTYPE_NCD 0x8149 /* Network Computing Devices */
#define ETHERTYPE_ALPHA 0x814A /* Alpha Micro */
#define ETHERTYPE_SNMP 0x814C /* SNMP over Ethernet (see RFC1089) */
/* 0x814D - 0x814E BIIN */
#define ETHERTYPE_TEC 0x814F /* Technically Elite Concepts */
#define ETHERTYPE_RATIONAL 0x8150 /* Rational Corp */
/* 0x8151 - 0x8153 Qualcomm */
/* 0x815C - 0x815E Computer Protocol Pty Ltd */
/* 0x8164 - 0x8166 Charles River Data Systems */
#define ETHERTYPE_XTP 0x817D /* Protocol Engines XTP */
#define ETHERTYPE_SGITW 0x817E /* SGI/Time Warner prop. */
#define ETHERTYPE_HIPPI_FP 0x8180 /* HIPPI-FP encapsulation */
#define ETHERTYPE_STP 0x8181 /* Scheduled Transfer STP, HIPPI-ST */
/* 0x8182 - 0x8183 Reserved for HIPPI-6400 */
/* 0x8184 - 0x818C SGI prop. */
#define ETHERTYPE_MOTOROLA 0x818D /* Motorola */
#define ETHERTYPE_NETBEUI 0x8191 /* PowerLAN NetBIOS/NetBEUI (PC) */
/* 0x819A - 0x81A3 RAD Network Devices */
/* 0x81B7 - 0x81B9 Xyplex */
/* 0x81CC - 0x81D5 Apricot Computers */
/* 0x81D6 - 0x81DD Artisoft Lantastic */
/* 0x81E6 - 0x81EF Polygon */
/* 0x81F0 - 0x81F2 Comsat Labs */
/* 0x81F3 - 0x81F5 SAIC */
/* 0x81F6 - 0x81F8 VG Analytical */
/* 0x8203 - 0x8205 QNX Software Systems Ltd. */
/* 0x8221 - 0x8222 Ascom Banking Systems */
/* 0x823E - 0x8240 Advanced Encryption Systems */
/* 0x8263 - 0x826A Charles River Data Systems */
/* 0x827F - 0x8282 Athena Programming */
/* 0x829A - 0x829B Inst Ind Info Tech */
/* 0x829C - 0x82AB Taurus Controls */
/* 0x82AC - 0x8693 Walker Richer & Quinn */
#define ETHERTYPE_ACCTON 0x8390 /* Accton Technologies (unregistered) */
#define ETHERTYPE_TALARISMC 0x852B /* Talaris multicast */
#define ETHERTYPE_KALPANA 0x8582 /* Kalpana */
/* 0x8694 - 0x869D Idea Courier */
/* 0x869E - 0x86A1 Computer Network Tech */
/* 0x86A3 - 0x86AC Gateway Communications */
#define ETHERTYPE_SECTRA 0x86DB /* SECTRA */
#define ETHERTYPE_IPV6 0x86DD /* IP protocol version 6 */
#define ETHERTYPE_DELTACON 0x86DE /* Delta Controls */
#define ETHERTYPE_ATOMIC 0x86DF /* ATOMIC */
/* 0x86E0 - 0x86EF Landis & Gyr Powers */
/* 0x8700 - 0x8710 Motorola */
#define ETHERTYPE_RDP 0x8739 /* Control Technology Inc. RDP Without IP */
#define ETHERTYPE_MICP 0x873A /* Control Technology Inc. Mcast Industrial Ctrl Proto. */
/* 0x873B - 0x873C Control Technology Inc. Proprietary */
#define ETHERTYPE_TCPCOMP 0x876B /* TCP/IP Compression (RFC1701) */
#define ETHERTYPE_IPAS 0x876C /* IP Autonomous Systems (RFC1701) */
#define ETHERTYPE_SECUREDATA 0x876D /* Secure Data (RFC1701) */
#define ETHERTYPE_FLOWCONTROL 0x8808 /* 802.3x flow control packet */
#define ETHERTYPE_SLOW 0x8809 /* 802.3ad link aggregation (LACP) */
#define ETHERTYPE_PPP 0x880B /* PPP (obsolete by PPPOE) */
#define ETHERTYPE_HITACHI 0x8820 /* Hitachi Cable (Optoelectronic Systems Laboratory) */
#define ETHERTYPE_MPLS 0x8847 /* MPLS Unicast */
#define ETHERTYPE_MPLS_MCAST 0x8848 /* MPLS Multicast */
#define ETHERTYPE_AXIS 0x8856 /* Axis Communications AB proprietary bootstrap/config */
#define ETHERTYPE_PPPOEDISC 0x8863 /* PPP Over Ethernet Discovery Stage */
#define ETHERTYPE_PPPOE 0x8864 /* PPP Over Ethernet Session Stage */
#define ETHERTYPE_LANPROBE 0x8888 /* HP LanProbe test? */
#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
#define ETHERTYPE_LOOPBACK 0x9000 /* Loopback: used to test interfaces */
#define ETHERTYPE_LBACK ETHERTYPE_LOOPBACK /* DEC MOP loopback */
#define ETHERTYPE_XNSSM 0x9001 /* 3Com (Formerly Bridge Communications), XNS Systems Management */
#define ETHERTYPE_TCPSM 0x9002 /* 3Com (Formerly Bridge Communications), TCP/IP Systems Management */
#define ETHERTYPE_BCLOOP 0x9003 /* 3Com (Formerly Bridge Communications), loopback detection */
#define ETHERTYPE_DEBNI 0xAAAA /* DECNET? Used by VAX 6220 DEBNI */
#define ETHERTYPE_SONIX 0xFAF5 /* Sonix Arpeggio */
#define ETHERTYPE_VITAL 0xFF00 /* BBN VITAL-LanBridge cache wakeups */
/* 0xFF00 - 0xFFOF ISC Bunker Ramo */
#define ETHERTYPE_MAX 0xFFFF /* Maximum valid ethernet type, reserved */
/*
* The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
* (type-ETHERTYPE_TRAIL)*512 bytes of data followed
* by an ETHER type (as given above) and then the (variable-length) header.
*/
#define ETHERTYPE_TRAIL 0x1000 /* Trailer packet */
#define ETHERTYPE_NTRAILER 16
#define ETHERMTU (ETHER_MAX_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
#define ETHERMIN (ETHER_MIN_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
#define ETHERMTU_JUMBO (ETHER_MAX_LEN_JUMBO - ETHER_HDR_LEN - ETHER_CRC_LEN)
/*
* The ETHER_BPF_MTAP macro should be used by drivers which support hardware
* offload for VLAN tag processing. It will check the mbuf to see if it has
* M_VLANTAG set, and if it does, will pass the packet along to
* ether_vlan_mtap. This function will re-insert VLAN tags for the duration
* of the tap, so they show up properly for network analyzers.
*/
#define ETHER_BPF_MTAP(_ifp, _m) do { \
} while (0)
#ifdef _KERNEL
struct ifnet;
struct mbuf;
struct route;
struct sockaddr;
struct bpf_if;
extern uint32_t ether_crc32_le(const uint8_t *, size_t);
extern uint32_t ether_crc32_be(const uint8_t *, size_t);
extern void ether_demux(struct ifnet *, struct mbuf *);
extern void ether_ifattach(struct ifnet *, const u_int8_t *);
extern void ether_ifdetach(struct ifnet *);
extern int ether_ioctl(struct ifnet *, u_long, caddr_t);
extern int ether_output(struct ifnet *,
struct mbuf *, struct sockaddr *, struct route *);
extern int ether_output_frame(struct ifnet *, struct mbuf *);
extern char *ether_sprintf(const u_int8_t *);
void ether_vlan_mtap(struct bpf_if *, struct mbuf *,
void *, u_int);
#else /* _KERNEL */
#include <sys/cdefs.h>
/*
* Ethernet address conversion/parsing routines.
*/
__BEGIN_DECLS
struct ether_addr *ether_aton(const char *);
struct ether_addr *ether_aton_r(const char *, struct ether_addr *);
int ether_hostton(const char *, struct ether_addr *);
int ether_line(const char *, struct ether_addr *, char *);
char *ether_ntoa(const struct ether_addr *);
char *ether_ntoa_r(const struct ether_addr *, char *);
int ether_ntohost(char *, const struct ether_addr *);
__END_DECLS
#endif /* !_KERNEL */
#endif /* !_FBSD_COMPAT_NET_ETHERNET_H_ */
@@ -0,0 +1,110 @@
/*
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NET_IF_H_
#define _FBSD_COMPAT_NET_IF_H_
#include <posix/net/if.h>
#include <sys/cdefs.h>
#include <sys/queue.h>
#include <sys/time.h>
#define IF_Kbps(x) ((x) * 1000)
#define IF_Mbps(x) (IF_Kbps((x) * 1000))
#define IF_Gbps(x) (IF_Mbps((x) * 1000))
/* Capabilities that interfaces can advertise. */
#define IFCAP_RXCSUM 0x00001 /* can offload checksum on RX */
#define IFCAP_TXCSUM 0x00002 /* can offload checksum on TX */
#define IFCAP_NETCONS 0x00004 /* can be a network console */
#define IFCAP_VLAN_MTU 0x00008 /* VLAN-compatible MTU */
#define IFCAP_VLAN_HWTAGGING 0x00010 /* hardware VLAN tag support */
#define IFCAP_JUMBO_MTU 0x00020 /* 9000 byte MTU supported */
#define IFCAP_POLLING 0x00040 /* driver supports polling */
#define IFCAP_VLAN_HWCSUM 0x00080
#define IFCAP_TSO4 0x00100 /* supports TCP segmentation offload */
#define IFCAP_TSO6 0x00200 /* can do TCP6 Segmentation Offload */
#define IFCAP_WOL_UCAST 0x00800 /* wake on any unicast frame */
#define IFCAP_WOL_MCAST 0x01000 /* wake on any multicast frame */
#define IFCAP_WOL_MAGIC 0x02000 /* wake on any Magic Packet */
#define IFCAP_VLAN_HWFILTER 0x10000 /* interface hw can filter vlan tag */
#define IFCAP_POLLING_NOCOUNT 0x20000
#define IFCAP_VLAN_HWTSO 0x40000
#define IFCAP_LINKSTATE 0x80000
#define IFCAP_HWCSUM (IFCAP_RXCSUM | IFCAP_TXCSUM)
#define IFCAP_TSO (IFCAP_TSO4 | IFCAP_TSO6)
#define IFCAP_WOL (IFCAP_WOL_UCAST | IFCAP_WOL_MCAST | IFCAP_WOL_MAGIC)
#define IFF_DRV_RUNNING 0x00010000
#define IFF_DRV_OACTIVE 0x00020000
#define IFF_LINK0 0x00040000 /* per link layer defined bit */
#define IFF_LINK1 0x00080000 /* per link layer defined bit */
#define IFF_LINK2 0x00100000 /* per link layer defined bit */
#define IFF_DEBUG 0x00200000
#define IFF_MONITOR 0x00400000 /* (n) user-requested monitor mode */
#define LINK_STATE_UNKNOWN 0
#define LINK_STATE_DOWN 1
#define LINK_STATE_UP 2
#define IFQ_MAXLEN 50
/*
* Structure describing information about an interface
* which may be of interest to management entities.
*/
struct if_data {
/* generic interface information */
u_char ifi_type; /* ethernet, tokenring, etc */
u_char ifi_physical; /* e.g., AUI, Thinnet, 10base-T, etc */
u_char ifi_addrlen; /* media address length */
u_char ifi_hdrlen; /* media header length */
u_char ifi_link_state; /* current link state */
u_char ifi_recvquota; /* polling quota for receive intrs */
u_char ifi_xmitquota; /* polling quota for xmit intrs */
u_char ifi_datalen; /* length of this data struct */
u_long ifi_mtu; /* maximum transmission unit */
u_long ifi_metric; /* routing metric (external only) */
u_long ifi_baudrate; /* linespeed */
/* volatile statistics */
u_long ifi_ipackets; /* packets received on interface */
u_long ifi_ierrors; /* input errors on interface */
u_long ifi_opackets; /* packets sent on interface */
u_long ifi_oerrors; /* output errors on interface */
u_long ifi_collisions; /* collisions on csma interfaces */
u_long ifi_ibytes; /* total number of octets received */
u_long ifi_obytes; /* total number of octets sent */
u_long ifi_imcasts; /* packets received via multicast */
u_long ifi_omcasts; /* packets sent via multicast */
u_long ifi_iqdrops; /* dropped on input, this interface */
u_long ifi_oqdrops; /* dropped on output, this interface */
u_long ifi_noproto; /* destined for unsupported protocol */
u_long ifi_hwassist; /* HW offload capabilities */
time_t ifi_epoch; /* uptime at attach or stat reset */
#ifdef __alpha__
u_int ifi_timepad; /* time_t is int, not long on alpha */
#endif
struct timeval ifi_lastchange; /* time of last administrative change */
};
struct ifdrv {
char ifd_name[IFNAMSIZ]; /* if name, e.g. "en0" */
unsigned long ifd_cmd;
size_t ifd_len;
void* ifd_data;
};
#ifdef _KERNEL
/* TODO: this should go away soon. */
# include <net/if_var.h>
#endif
#endif /* _FBSD_COMPAT_NET_IF_H_ */
@@ -0,0 +1,115 @@
/*-
* Copyright (c) 1986, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_arp.h 8.1 (Berkeley) 6/10/93
* $FreeBSD: src/sys/net/if_arp.h,v 1.22 2005/06/10 16:49:18 brooks Exp $
*/
#ifndef _FBSD_COMPAT_NET_IF_ARP_H_
#define _FBSD_COMPAT_NET_IF_ARP_H_
/*
* Address Resolution Protocol.
*
* See RFC 826 for protocol description. ARP packets are variable
* in size; the arphdr structure defines the fixed-length portion.
* Protocol type values are the same as those for 10 Mb/s Ethernet.
* It is followed by the variable-sized fields ar_sha, arp_spa,
* arp_tha and arp_tpa in that order, according to the lengths
* specified. Field names used correspond to RFC 826.
*/
struct arphdr {
u_short ar_hrd; /* format of hardware address */
#define ARPHRD_ETHER 1 /* ethernet hardware format */
#define ARPHRD_IEEE802 6 /* token-ring hardware format */
#define ARPHRD_ARCNET 7 /* arcnet hardware format */
#define ARPHRD_FRELAY 15 /* frame relay hardware format */
#define ARPHRD_IEEE1394 24 /* firewire hardware format */
u_short ar_pro; /* format of protocol address */
u_char ar_hln; /* length of hardware address */
u_char ar_pln; /* length of protocol address */
u_short ar_op; /* one of: */
#define ARPOP_REQUEST 1 /* request to resolve address */
#define ARPOP_REPLY 2 /* response to previous request */
#define ARPOP_REVREQUEST 3 /* request protocol address given hardware */
#define ARPOP_REVREPLY 4 /* response giving protocol address */
#define ARPOP_INVREQUEST 8 /* request to identify peer */
#define ARPOP_INVREPLY 9 /* response identifying peer */
/*
* The remaining fields are variable in size,
* according to the sizes above.
*/
#ifdef COMMENT_ONLY
u_char ar_sha[]; /* sender hardware address */
u_char ar_spa[]; /* sender protocol address */
u_char ar_tha[]; /* target hardware address */
u_char ar_tpa[]; /* target protocol address */
#endif
};
#define ar_sha(ap) (((caddr_t)((ap)+1)) + 0)
#define ar_spa(ap) (((caddr_t)((ap)+1)) + (ap)->ar_hln)
#define ar_tha(ap) (((caddr_t)((ap)+1)) + (ap)->ar_hln + (ap)->ar_pln)
#define ar_tpa(ap) (((caddr_t)((ap)+1)) + 2*(ap)->ar_hln + (ap)->ar_pln)
#define arphdr_len2(ar_hln, ar_pln) \
(sizeof(struct arphdr) + 2*(ar_hln) + 2*(ar_pln))
#define arphdr_len(ap) (arphdr_len2((ap)->ar_hln, (ap)->ar_pln))
/*
* ARP ioctl request
*/
struct arpreq {
struct sockaddr arp_pa; /* protocol address */
struct sockaddr arp_ha; /* hardware address */
int arp_flags; /* flags */
};
/* arp_flags and at_flags field values */
#define ATF_INUSE 0x01 /* entry in use */
#define ATF_COM 0x02 /* completed entry (enaddr valid) */
#define ATF_PERM 0x04 /* permanent entry */
#define ATF_PUBL 0x08 /* publish entry (respond for other host) */
#define ATF_USETRAILERS 0x10 /* has requested trailers */
#ifdef _KERNEL
/*
* Structure shared between the ethernet driver modules and
* the address resolution code.
*/
struct arpcom {
struct ifnet *ac_ifp; /* network-visible interface */
u_char _ac_enaddr[6]; /* ethernet hardware address */
void *ac_netgraph; /* ng_ether(4) netgraph node info */
};
#define IFP2AC(ifp) ((struct arpcom *)(ifp->if_l2com))
#define IFP2ENADDR(ifp) (IFP2AC(ifp)->_ac_enaddr)
#define AC2IFP(ac) ((ac)->ac_ifp)
#endif
#endif /* _FBSD_COMPAT_NET_IF_ARP_H_ */
@@ -0,0 +1,161 @@
/* $NetBSD: if_llc.h,v 1.12 1999/11/19 20:41:19 thorpej Exp $ */
/*-
* Copyright (c) 1988, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_llc.h 8.1 (Berkeley) 6/10/93
* $FreeBSD: src/sys/net/if_llc.h,v 1.13 2006/12/01 17:50:11 imp Exp $
*/
#ifndef _NET_IF_LLC_H_
#define _NET_IF_LLC_H_
/*
* IEEE 802.2 Link Level Control headers, for use in conjunction with
* 802.{3,4,5} media access control methods.
*
* Headers here do not use bit fields due to shortcommings in many
* compilers.
*/
struct llc {
u_int8_t llc_dsap;
u_int8_t llc_ssap;
union {
struct {
u_int8_t control;
u_int8_t format_id;
u_int8_t class;
u_int8_t window_x2;
} __packed type_u;
struct {
u_int8_t num_snd_x2;
u_int8_t num_rcv_x2;
} __packed type_i;
struct {
u_int8_t control;
u_int8_t num_rcv_x2;
} __packed type_s;
struct {
u_int8_t control;
/*
* We cannot put the following fields in a structure because
* the structure rounding might cause padding.
*/
u_int8_t frmr_rej_pdu0;
u_int8_t frmr_rej_pdu1;
u_int8_t frmr_control;
u_int8_t frmr_control_ext;
u_int8_t frmr_cause;
} __packed type_frmr;
struct {
u_int8_t control;
u_int8_t org_code[3];
u_int16_t ether_type;
} __packed type_snap;
struct {
u_int8_t control;
u_int8_t control_ext;
} __packed type_raw;
} __packed llc_un;
} __packed;
struct frmrinfo {
u_int8_t frmr_rej_pdu0;
u_int8_t frmr_rej_pdu1;
u_int8_t frmr_control;
u_int8_t frmr_control_ext;
u_int8_t frmr_cause;
} __packed;
#define llc_control llc_un.type_u.control
#define llc_control_ext llc_un.type_raw.control_ext
#define llc_fid llc_un.type_u.format_id
#define llc_class llc_un.type_u.class
#define llc_window llc_un.type_u.window_x2
#define llc_frmrinfo llc_un.type_frmr.frmr_rej_pdu0
#define llc_frmr_pdu0 llc_un.type_frmr.frmr_rej_pdu0
#define llc_frmr_pdu1 llc_un.type_frmr.frmr_rej_pdu1
#define llc_frmr_control llc_un.type_frmr.frmr_control
#define llc_frmr_control_ext llc_un.type_frmr.frmr_control_ext
#define llc_frmr_cause llc_un.type_frmr.frmr_cause
#define llc_snap llc_un.type_snap
/*
* Don't use sizeof(struct llc_un) for LLC header sizes
*/
#define LLC_ISFRAMELEN 4
#define LLC_UFRAMELEN 3
#define LLC_FRMRLEN 7
#define LLC_SNAPFRAMELEN 8
#ifdef CTASSERT
CTASSERT(sizeof (struct llc) == LLC_SNAPFRAMELEN);
#endif
/*
* Unnumbered LLC format commands
*/
#define LLC_UI 0x3
#define LLC_UI_P 0x13
#define LLC_DISC 0x43
#define LLC_DISC_P 0x53
#define LLC_UA 0x63
#define LLC_UA_P 0x73
#define LLC_TEST 0xe3
#define LLC_TEST_P 0xf3
#define LLC_FRMR 0x87
#define LLC_FRMR_P 0x97
#define LLC_DM 0x0f
#define LLC_DM_P 0x1f
#define LLC_XID 0xaf
#define LLC_XID_P 0xbf
#define LLC_SABME 0x6f
#define LLC_SABME_P 0x7f
/*
* Supervisory LLC commands
*/
#define LLC_RR 0x01
#define LLC_RNR 0x05
#define LLC_REJ 0x09
/*
* Info format - dummy only
*/
#define LLC_INFO 0x00
/*
* ISO PDTR 10178 contains among others
*/
#define LLC_8021D_LSAP 0x42
#define LLC_X25_LSAP 0x7e
#define LLC_SNAP_LSAP 0xaa
#define LLC_ISO_LSAP 0xfe
#endif /* _NET_IF_LLC_H_ */
@@ -0,0 +1,672 @@
/* $NetBSD: if_media.h,v 1.3 1997/03/26 01:19:27 thorpej Exp $ */
/* $FreeBSD: src/sys/net/if_media.h,v 1.43 2008/08/01 22:13:39 antoine Exp $ */
/*-
* Copyright (c) 1997
* Jonathan Stone and Jason R. Thorpe. All rights reserved.
*
* This software is derived from information provided by Matt Thomas.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Jonathan Stone
* and Jason R. Thorpe for the NetBSD Project.
* 4. The names of the authors may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _FBSD_COMPAT_NET_IF_MEDIA_H_
#define _FBSD_COMPAT_NET_IF_MEDIA_H_
/*
* Prototypes and definitions for BSD/OS-compatible network interface
* media selection.
*
* Where it is safe to do so, this code strays slightly from the BSD/OS
* design. Software which uses the API (device drivers, basically)
* shouldn't notice any difference.
*
* Many thanks to Matt Thomas for providing the information necessary
* to implement this interface.
*/
#ifdef _KERNEL
#include <sys/queue.h>
/*
* Driver callbacks for media status and change requests.
*/
typedef int (*ifm_change_cb_t)(struct ifnet *ifp);
typedef void (*ifm_stat_cb_t)(struct ifnet *ifp, struct ifmediareq *req);
/*
* In-kernel representation of a single supported media type.
*/
struct ifmedia_entry {
LIST_ENTRY(ifmedia_entry) ifm_list;
int ifm_media; /* description of this media attachment */
int ifm_data; /* for driver-specific use */
void *ifm_aux; /* for driver-specific use */
};
/*
* One of these goes into a network interface's softc structure.
* It is used to keep general media state.
*/
struct ifmedia {
int ifm_mask; /* mask of changes we don't care about */
int ifm_media; /* current user-set media word */
struct ifmedia_entry *ifm_cur; /* currently selected media */
LIST_HEAD(, ifmedia_entry) ifm_list; /* list of all supported media */
ifm_change_cb_t ifm_change; /* media change driver callback */
ifm_stat_cb_t ifm_status; /* media status driver callback */
};
/* Initialize an interface's struct if_media field. */
void ifmedia_init(struct ifmedia *ifm, int dontcare_mask,
ifm_change_cb_t change_callback, ifm_stat_cb_t status_callback);
/* Remove all mediums from a struct ifmedia. */
void ifmedia_removeall( struct ifmedia *ifm);
/* Add one supported medium to a struct ifmedia. */
void ifmedia_add(struct ifmedia *ifm, int mword, int data, void *aux);
/* Add an array (of ifmedia_entry) media to a struct ifmedia. */
void ifmedia_list_add(struct ifmedia *mp, struct ifmedia_entry *lp,
int count);
/* Set default media type on initialization. */
void ifmedia_set(struct ifmedia *ifm, int mword);
/* Common ioctl function for getting/setting media, called by driver. */
int ifmedia_ioctl(struct ifnet *ifp, struct ifreq *ifr,
struct ifmedia *ifm, u_long cmd);
/* Compute baudrate for a given media. */
uint64_t ifmedia_baudrate(int);
#endif /*_KERNEL */
/*
* if_media Options word:
* Bits Use
* ---- -------
* 0-4 Media variant
* 5-7 Media type
* 8-15 Type specific options
* 16-18 Mode (for multi-mode devices)
* 19 RFU
* 20-27 Shared (global) options
* 28-31 Instance
*/
/*
* Ethernet
*/
#define IFM_ETHER 0x00000020
#define IFM_10_T 3 /* 10BaseT - RJ45 */
#define IFM_10_2 4 /* 10Base2 - Thinnet */
#define IFM_10_5 5 /* 10Base5 - AUI */
#define IFM_100_TX 6 /* 100BaseTX - RJ45 */
#define IFM_100_FX 7 /* 100BaseFX - Fiber */
#define IFM_100_T4 8 /* 100BaseT4 - 4 pair cat 3 */
#define IFM_100_VG 9 /* 100VG-AnyLAN */
#define IFM_100_T2 10 /* 100BaseT2 */
#define IFM_1000_SX 11 /* 1000BaseSX - multi-mode fiber */
#define IFM_10_STP 12 /* 10BaseT over shielded TP */
#define IFM_10_FL 13 /* 10BaseFL - Fiber */
#define IFM_1000_LX 14 /* 1000baseLX - single-mode fiber */
#define IFM_1000_CX 15 /* 1000baseCX - 150ohm STP */
#define IFM_1000_T 16 /* 1000baseT - 4 pair cat 5 */
#define IFM_HPNA_1 17 /* HomePNA 1.0 (1Mb/s) */
#define IFM_10G_LR 18 /* 10GBase-LR 1310nm Single-mode */
#define IFM_10G_SR 19 /* 10GBase-SR 850nm Multi-mode */
#define IFM_10G_CX4 20 /* 10GBase CX4 copper */
#define IFM_2500_SX 21 /* 2500BaseSX - multi-mode fiber */
#define IFM_UNKNOWN 25 /* media types not defined yet */
/* note 31 is the max! */
#define IFM_ETH_MASTER 0x00000100 /* master mode (1000baseT) */
#define IFM_ETH_RXPAUSE 0x00000200 /* receive PAUSE frames */
#define IFM_ETH_TXPAUSE 0x00000400 /* transmit PAUSE frames */
/*
* Token ring
*/
#define IFM_TOKEN 0x00000040
#define IFM_TOK_STP4 3 /* Shielded twisted pair 4m - DB9 */
#define IFM_TOK_STP16 4 /* Shielded twisted pair 16m - DB9 */
#define IFM_TOK_UTP4 5 /* Unshielded twisted pair 4m - RJ45 */
#define IFM_TOK_UTP16 6 /* Unshielded twisted pair 16m - RJ45 */
#define IFM_TOK_STP100 7 /* Shielded twisted pair 100m - DB9 */
#define IFM_TOK_UTP100 8 /* Unshielded twisted pair 100m - RJ45 */
#define IFM_TOK_ETR 0x00000200 /* Early token release */
#define IFM_TOK_SRCRT 0x00000400 /* Enable source routing features */
#define IFM_TOK_ALLR 0x00000800 /* All routes / Single route bcast */
#define IFM_TOK_DTR 0x00002000 /* Dedicated token ring */
#define IFM_TOK_CLASSIC 0x00004000 /* Classic token ring */
#define IFM_TOK_AUTO 0x00008000 /* Automatic Dedicate/Classic token ring */
/*
* FDDI
*/
#define IFM_FDDI 0x00000060
#define IFM_FDDI_SMF 3 /* Single-mode fiber */
#define IFM_FDDI_MMF 4 /* Multi-mode fiber */
#define IFM_FDDI_UTP 5 /* CDDI / UTP */
#define IFM_FDDI_DA 0x00000100 /* Dual attach / single attach */
/*
* IEEE 802.11 Wireless
*/
#define IFM_IEEE80211 0x00000080
/* NB: 0,1,2 are auto, manual, none defined below */
#define IFM_IEEE80211_FH1 3 /* Frequency Hopping 1Mbps */
#define IFM_IEEE80211_FH2 4 /* Frequency Hopping 2Mbps */
#define IFM_IEEE80211_DS1 5 /* Direct Sequence 1Mbps */
#define IFM_IEEE80211_DS2 6 /* Direct Sequence 2Mbps */
#define IFM_IEEE80211_DS5 7 /* Direct Sequence 5.5Mbps */
#define IFM_IEEE80211_DS11 8 /* Direct Sequence 11Mbps */
#define IFM_IEEE80211_DS22 9 /* Direct Sequence 22Mbps */
#define IFM_IEEE80211_OFDM6 10 /* OFDM 6Mbps */
#define IFM_IEEE80211_OFDM9 11 /* OFDM 9Mbps */
#define IFM_IEEE80211_OFDM12 12 /* OFDM 12Mbps */
#define IFM_IEEE80211_OFDM18 13 /* OFDM 18Mbps */
#define IFM_IEEE80211_OFDM24 14 /* OFDM 24Mbps */
#define IFM_IEEE80211_OFDM36 15 /* OFDM 36Mbps */
#define IFM_IEEE80211_OFDM48 16 /* OFDM 48Mbps */
#define IFM_IEEE80211_OFDM54 17 /* OFDM 54Mbps */
#define IFM_IEEE80211_OFDM72 18 /* OFDM 72Mbps */
#define IFM_IEEE80211_DS354k 19 /* Direct Sequence 354Kbps */
#define IFM_IEEE80211_DS512k 20 /* Direct Sequence 512Kbps */
#define IFM_IEEE80211_OFDM3 21 /* OFDM 3Mbps */
#define IFM_IEEE80211_OFDM4 22 /* OFDM 4.5Mbps */
#define IFM_IEEE80211_OFDM27 23 /* OFDM 27Mbps */
/* NB: not enough bits to express MCS fully */
#define IFM_IEEE80211_MCS 24 /* HT MCS rate */
#define IFM_IEEE80211_ADHOC 0x00000100 /* Operate in Adhoc mode */
#define IFM_IEEE80211_HOSTAP 0x00000200 /* Operate in Host AP mode */
#define IFM_IEEE80211_IBSS 0x00000400 /* Operate in IBSS mode */
#define IFM_IEEE80211_WDS 0x00000800 /* Operate in WDS mode */
#define IFM_IEEE80211_TURBO 0x00001000 /* Operate in turbo mode */
#define IFM_IEEE80211_MONITOR 0x00002000 /* Operate in monitor mode */
#define IFM_IEEE80211_MBSS 0x00004000 /* Operate in MBSS mode */
/* operating mode for multi-mode devices */
#define IFM_IEEE80211_11A 0x00010000 /* 5Ghz, OFDM mode */
#define IFM_IEEE80211_11B 0x00020000 /* Direct Sequence mode */
#define IFM_IEEE80211_11G 0x00030000 /* 2Ghz, CCK mode */
#define IFM_IEEE80211_FH 0x00040000 /* 2Ghz, GFSK mode */
#define IFM_IEEE80211_11NA 0x00050000 /* 5Ghz, HT mode */
#define IFM_IEEE80211_11NG 0x00060000 /* 2Ghz, HT mode */
/*
* ATM
*/
#define IFM_ATM 0x000000a0
#define IFM_ATM_UNKNOWN 3
#define IFM_ATM_UTP_25 4
#define IFM_ATM_TAXI_100 5
#define IFM_ATM_TAXI_140 6
#define IFM_ATM_MM_155 7
#define IFM_ATM_SM_155 8
#define IFM_ATM_UTP_155 9
#define IFM_ATM_MM_622 10
#define IFM_ATM_SM_622 11
#define IFM_ATM_VIRTUAL 12
#define IFM_ATM_SDH 0x00000100 /* SDH instead of SONET */
#define IFM_ATM_NOSCRAMB 0x00000200 /* no scrambling */
#define IFM_ATM_UNASSIGNED 0x00000400 /* unassigned cells */
/*
* CARP Common Address Redundancy Protocol
*/
#define IFM_CARP 0x000000c0
/*
* Shared media sub-types
*/
#define IFM_AUTO 0 /* Autoselect best media */
#define IFM_MANUAL 1 /* Jumper/dipswitch selects media */
#define IFM_NONE 2 /* Deselect all media */
/*
* Shared options
*/
#define IFM_FDX 0x00100000 /* Force full duplex */
#define IFM_HDX 0x00200000 /* Force half duplex */
#define IFM_FLOW 0x00400000 /* Enable hardware flow control */
#define IFM_FLAG0 0x01000000 /* Driver defined flag */
#define IFM_FLAG1 0x02000000 /* Driver defined flag */
#define IFM_FLAG2 0x04000000 /* Driver defined flag */
#define IFM_LOOP 0x08000000 /* Put hardware in loopback */
/*
* Masks
*/
#define IFM_NMASK 0x000000e0 /* Network type */
#define IFM_TMASK 0x0000001f /* Media sub-type */
#define IFM_IMASK 0xf0000000 /* Instance */
#define IFM_ISHIFT 28 /* Instance shift */
#define IFM_OMASK 0x0000ff00 /* Type specific options */
#define IFM_MMASK 0x00070000 /* Mode */
#define IFM_MSHIFT 16 /* Mode shift */
#define IFM_GMASK 0x0ff00000 /* Global options */
/*
* Status bits
*/
#define IFM_AVALID 0x10000000 /* Active bit valid */
#define IFM_ACTIVE 0x00800000 /* same as Haiku's */
/* Mask of "status valid" bits, for ifconfig(8). */
#define IFM_STATUS_VALID IFM_AVALID
/* List of "status valid" bits, for ifconfig(8). */
#define IFM_STATUS_VALID_LIST { \
IFM_AVALID, \
0 \
}
/*
* Macros to extract various bits of information from the media word.
*/
#define IFM_TYPE(x) ((x) & IFM_NMASK)
#define IFM_SUBTYPE(x) ((x) & IFM_TMASK)
#define IFM_TYPE_OPTIONS(x) ((x) & IFM_OMASK)
#define IFM_INST(x) (((x) & IFM_IMASK) >> IFM_ISHIFT)
#define IFM_OPTIONS(x) ((x) & (IFM_OMASK|IFM_GMASK))
#define IFM_MODE(x) ((x) & IFM_MMASK)
#define IFM_INST_MAX IFM_INST(IFM_IMASK)
/*
* Macro to create a media word.
*/
#define IFM_MAKEWORD(type, subtype, options, instance) \
((type) | (subtype) | (options) | ((instance) << IFM_ISHIFT))
#define IFM_MAKEMODE(mode) \
(((mode) << IFM_MSHIFT) & IFM_MMASK)
/*
* NetBSD extension not defined in the BSDI API. This is used in various
* places to get the canonical description for a given type/subtype.
*
* NOTE: all but the top-level type descriptions must contain NO whitespace!
* Otherwise, parsing these in ifconfig(8) would be a nightmare.
*/
struct ifmedia_description {
int ifmt_word; /* word value; may be masked */
const char *ifmt_string; /* description */
};
#define IFM_TYPE_DESCRIPTIONS { \
{ IFM_ETHER, "Ethernet" }, \
{ IFM_TOKEN, "Token ring" }, \
{ IFM_FDDI, "FDDI" }, \
{ IFM_IEEE80211, "IEEE 802.11 Wireless Ethernet" }, \
{ IFM_ATM, "ATM" }, \
{ IFM_CARP, "Common Address Redundancy Protocol" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_ETHERNET_DESCRIPTIONS { \
{ IFM_10_T, "10baseT/UTP" }, \
{ IFM_10_2, "10base2/BNC" }, \
{ IFM_10_5, "10base5/AUI" }, \
{ IFM_100_TX, "100baseTX" }, \
{ IFM_100_FX, "100baseFX" }, \
{ IFM_100_T4, "100baseT4" }, \
{ IFM_100_VG, "100baseVG" }, \
{ IFM_100_T2, "100baseT2" }, \
{ IFM_10_STP, "10baseSTP" }, \
{ IFM_10_FL, "10baseFL" }, \
{ IFM_1000_SX, "1000baseSX" }, \
{ IFM_1000_LX, "1000baseLX" }, \
{ IFM_1000_CX, "1000baseCX" }, \
{ IFM_1000_T, "1000baseT" }, \
{ IFM_HPNA_1, "homePNA" }, \
{ IFM_10G_LR, "10Gbase-LR" }, \
{ IFM_10G_SR, "10Gbase-SR" }, \
{ IFM_10G_CX4, "10Gbase-CX4" }, \
{ IFM_UNKNOWN, "Unknown" }, \
{ IFM_2500_SX, "2500BaseSX" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_ETHERNET_ALIASES { \
{ IFM_10_T, "UTP" }, \
{ IFM_10_T, "10UTP" }, \
{ IFM_10_2, "BNC" }, \
{ IFM_10_2, "10BNC" }, \
{ IFM_10_5, "AUI" }, \
{ IFM_10_5, "10AUI" }, \
{ IFM_100_TX, "100TX" }, \
{ IFM_100_T4, "100T4" }, \
{ IFM_100_VG, "100VG" }, \
{ IFM_100_T2, "100T2" }, \
{ IFM_10_STP, "10STP" }, \
{ IFM_10_FL, "10FL" }, \
{ IFM_1000_SX, "1000SX" }, \
{ IFM_1000_LX, "1000LX" }, \
{ IFM_1000_CX, "1000CX" }, \
{ IFM_1000_T, "1000baseTX" }, \
{ IFM_1000_T, "1000TX" }, \
{ IFM_1000_T, "1000T" }, \
{ IFM_2500_SX, "2500SX" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS { \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_TOKENRING_DESCRIPTIONS { \
{ IFM_TOK_STP4, "DB9/4Mbit" }, \
{ IFM_TOK_STP16, "DB9/16Mbit" }, \
{ IFM_TOK_UTP4, "UTP/4Mbit" }, \
{ IFM_TOK_UTP16, "UTP/16Mbit" }, \
{ IFM_TOK_STP100, "STP/100Mbit" }, \
{ IFM_TOK_UTP100, "UTP/100Mbit" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_TOKENRING_ALIASES { \
{ IFM_TOK_STP4, "4STP" }, \
{ IFM_TOK_STP16, "16STP" }, \
{ IFM_TOK_UTP4, "4UTP" }, \
{ IFM_TOK_UTP16, "16UTP" }, \
{ IFM_TOK_STP100, "100STP" }, \
{ IFM_TOK_UTP100, "100UTP" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_TOKENRING_OPTION_DESCRIPTIONS { \
{ IFM_TOK_ETR, "EarlyTokenRelease" }, \
{ IFM_TOK_SRCRT, "SourceRouting" }, \
{ IFM_TOK_ALLR, "AllRoutes" }, \
{ IFM_TOK_DTR, "Dedicated" }, \
{ IFM_TOK_CLASSIC,"Classic" }, \
{ IFM_TOK_AUTO, " " }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_FDDI_DESCRIPTIONS { \
{ IFM_FDDI_SMF, "Single-mode" }, \
{ IFM_FDDI_MMF, "Multi-mode" }, \
{ IFM_FDDI_UTP, "UTP" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_FDDI_ALIASES { \
{ IFM_FDDI_SMF, "SMF" }, \
{ IFM_FDDI_MMF, "MMF" }, \
{ IFM_FDDI_UTP, "CDDI" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_FDDI_OPTION_DESCRIPTIONS { \
{ IFM_FDDI_DA, "Dual-attach" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_IEEE80211_DESCRIPTIONS { \
{ IFM_IEEE80211_FH1, "FH/1Mbps" }, \
{ IFM_IEEE80211_FH2, "FH/2Mbps" }, \
{ IFM_IEEE80211_DS1, "DS/1Mbps" }, \
{ IFM_IEEE80211_DS2, "DS/2Mbps" }, \
{ IFM_IEEE80211_DS5, "DS/5.5Mbps" }, \
{ IFM_IEEE80211_DS11, "DS/11Mbps" }, \
{ IFM_IEEE80211_DS22, "DS/22Mbps" }, \
{ IFM_IEEE80211_OFDM6, "OFDM/6Mbps" }, \
{ IFM_IEEE80211_OFDM9, "OFDM/9Mbps" }, \
{ IFM_IEEE80211_OFDM12, "OFDM/12Mbps" }, \
{ IFM_IEEE80211_OFDM18, "OFDM/18Mbps" }, \
{ IFM_IEEE80211_OFDM24, "OFDM/24Mbps" }, \
{ IFM_IEEE80211_OFDM36, "OFDM/36Mbps" }, \
{ IFM_IEEE80211_OFDM48, "OFDM/48Mbps" }, \
{ IFM_IEEE80211_OFDM54, "OFDM/54Mbps" }, \
{ IFM_IEEE80211_OFDM72, "OFDM/72Mbps" }, \
{ IFM_IEEE80211_DS354k, "DS/354Kbps" }, \
{ IFM_IEEE80211_DS512k, "DS/512Kbps" }, \
{ IFM_IEEE80211_OFDM3, "OFDM/3Mbps" }, \
{ IFM_IEEE80211_OFDM4, "OFDM/4.5Mbps" }, \
{ IFM_IEEE80211_OFDM27, "OFDM/27Mbps" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_IEEE80211_ALIASES { \
{ IFM_IEEE80211_FH1, "FH1" }, \
{ IFM_IEEE80211_FH2, "FH2" }, \
{ IFM_IEEE80211_FH1, "FrequencyHopping/1Mbps" }, \
{ IFM_IEEE80211_FH2, "FrequencyHopping/2Mbps" }, \
{ IFM_IEEE80211_DS1, "DS1" }, \
{ IFM_IEEE80211_DS2, "DS2" }, \
{ IFM_IEEE80211_DS5, "DS5.5" }, \
{ IFM_IEEE80211_DS11, "DS11" }, \
{ IFM_IEEE80211_DS22, "DS22" }, \
{ IFM_IEEE80211_DS1, "DirectSequence/1Mbps" }, \
{ IFM_IEEE80211_DS2, "DirectSequence/2Mbps" }, \
{ IFM_IEEE80211_DS5, "DirectSequence/5.5Mbps" }, \
{ IFM_IEEE80211_DS11, "DirectSequence/11Mbps" }, \
{ IFM_IEEE80211_DS22, "DirectSequence/22Mbps" }, \
{ IFM_IEEE80211_OFDM6, "OFDM6" }, \
{ IFM_IEEE80211_OFDM9, "OFDM9" }, \
{ IFM_IEEE80211_OFDM12, "OFDM12" }, \
{ IFM_IEEE80211_OFDM18, "OFDM18" }, \
{ IFM_IEEE80211_OFDM24, "OFDM24" }, \
{ IFM_IEEE80211_OFDM36, "OFDM36" }, \
{ IFM_IEEE80211_OFDM48, "OFDM48" }, \
{ IFM_IEEE80211_OFDM54, "OFDM54" }, \
{ IFM_IEEE80211_OFDM72, "OFDM72" }, \
{ IFM_IEEE80211_DS1, "CCK1" }, \
{ IFM_IEEE80211_DS2, "CCK2" }, \
{ IFM_IEEE80211_DS5, "CCK5.5" }, \
{ IFM_IEEE80211_DS11, "CCK11" }, \
{ IFM_IEEE80211_DS354k, "DS354K" }, \
{ IFM_IEEE80211_DS354k, "DirectSequence/354Kbps" }, \
{ IFM_IEEE80211_DS512k, "DS512K" }, \
{ IFM_IEEE80211_DS512k, "DirectSequence/512Kbps" }, \
{ IFM_IEEE80211_OFDM3, "OFDM3" }, \
{ IFM_IEEE80211_OFDM4, "OFDM4.5" }, \
{ IFM_IEEE80211_OFDM27, "OFDM27" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_IEEE80211_OPTION_DESCRIPTIONS { \
{ IFM_IEEE80211_ADHOC, "adhoc" }, \
{ IFM_IEEE80211_HOSTAP, "hostap" }, \
{ IFM_IEEE80211_IBSS, "ibss" }, \
{ IFM_IEEE80211_WDS, "wds" }, \
{ IFM_IEEE80211_TURBO, "turbo" }, \
{ IFM_IEEE80211_MONITOR, "monitor" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_IEEE80211_MODE_DESCRIPTIONS { \
{ IFM_AUTO, "autoselect" }, \
{ IFM_IEEE80211_11A, "11a" }, \
{ IFM_IEEE80211_11B, "11b" }, \
{ IFM_IEEE80211_11G, "11g" }, \
{ IFM_IEEE80211_FH, "fh" }, \
{ IFM_IEEE80211_11NA, "11na" }, \
{ IFM_IEEE80211_11NG, "11ng" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_IEEE80211_MODE_ALIASES { \
{ IFM_AUTO, "auto" }, \
{ 0, NULL }, \
}
# define IFM_SUBTYPE_ATM_DESCRIPTIONS { \
{ IFM_ATM_UNKNOWN, "Unknown" }, \
{ IFM_ATM_UTP_25, "UTP/25.6MBit" }, \
{ IFM_ATM_TAXI_100, "Taxi/100MBit" }, \
{ IFM_ATM_TAXI_140, "Taxi/140MBit" }, \
{ IFM_ATM_MM_155, "Multi-mode/155MBit" }, \
{ IFM_ATM_SM_155, "Single-mode/155MBit" }, \
{ IFM_ATM_UTP_155, "UTP/155MBit" }, \
{ IFM_ATM_MM_622, "Multi-mode/622MBit" }, \
{ IFM_ATM_SM_622, "Single-mode/622MBit" }, \
{ IFM_ATM_VIRTUAL, "Virtual" }, \
{ 0, NULL }, \
}
# define IFM_SUBTYPE_ATM_ALIASES { \
{ IFM_ATM_UNKNOWN, "UNKNOWN" }, \
{ IFM_ATM_UTP_25, "UTP-25" }, \
{ IFM_ATM_TAXI_100, "TAXI-100" }, \
{ IFM_ATM_TAXI_140, "TAXI-140" }, \
{ IFM_ATM_MM_155, "MM-155" }, \
{ IFM_ATM_SM_155, "SM-155" }, \
{ IFM_ATM_UTP_155, "UTP-155" }, \
{ IFM_ATM_MM_622, "MM-622" }, \
{ IFM_ATM_SM_622, "SM-622" }, \
{ IFM_ATM_VIRTUAL, "VIRTUAL" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_ATM_OPTION_DESCRIPTIONS { \
{ IFM_ATM_SDH, "SDH" }, \
{ IFM_ATM_NOSCRAMB, "Noscramb" }, \
{ IFM_ATM_UNASSIGNED, "Unassigned" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_SHARED_DESCRIPTIONS { \
{ IFM_AUTO, "autoselect" }, \
{ IFM_MANUAL, "manual" }, \
{ IFM_NONE, "none" }, \
{ 0, NULL }, \
}
#define IFM_SUBTYPE_SHARED_ALIASES { \
{ IFM_AUTO, "auto" }, \
{ 0, NULL }, \
}
#define IFM_SHARED_OPTION_DESCRIPTIONS { \
{ IFM_FDX, "full-duplex" }, \
{ IFM_HDX, "half-duplex" }, \
{ IFM_FLAG0, "flag0" }, \
{ IFM_FLAG1, "flag1" }, \
{ IFM_FLAG2, "flag2" }, \
{ IFM_LOOP, "hw-loopback" }, \
{ 0, NULL }, \
}
/*
* Baudrate descriptions for the various media types.
*/
struct ifmedia_baudrate {
int ifmb_word; /* media word */
uint64_t ifmb_baudrate; /* corresponding baudrate */
};
#define IFM_BAUDRATE_DESCRIPTIONS { \
{ IFM_ETHER | IFM_10_T, IF_Mbps(10) }, \
{ IFM_ETHER | IFM_10_2, IF_Mbps(10) }, \
{ IFM_ETHER | IFM_10_5, IF_Mbps(10) }, \
{ IFM_ETHER | IFM_100_TX, IF_Mbps(100) }, \
{ IFM_ETHER | IFM_100_FX, IF_Mbps(100) }, \
{ IFM_ETHER | IFM_100_T4, IF_Mbps(100) }, \
{ IFM_ETHER | IFM_100_VG, IF_Mbps(100) }, \
{ IFM_ETHER | IFM_100_T2, IF_Mbps(100) }, \
{ IFM_ETHER | IFM_1000_SX, IF_Mbps(1000) }, \
{ IFM_ETHER | IFM_10_STP, IF_Mbps(10) }, \
{ IFM_ETHER | IFM_10_FL, IF_Mbps(10) }, \
{ IFM_ETHER | IFM_1000_LX, IF_Mbps(1000) }, \
{ IFM_ETHER | IFM_1000_CX, IF_Mbps(1000) }, \
{ IFM_ETHER | IFM_1000_T, IF_Mbps(1000) }, \
{ IFM_ETHER | IFM_HPNA_1, IF_Mbps(1) }, \
{ IFM_ETHER | IFM_10G_LR, IF_Gbps(10ULL) }, \
{ IFM_ETHER | IFM_10G_SR, IF_Gbps(10ULL) }, \
{ IFM_ETHER | IFM_10G_CX4, IF_Gbps(10ULL) }, \
{ IFM_ETHER | IFM_2500_SX, IF_Mbps(2500ULL) }, \
\
{ IFM_TOKEN | IFM_TOK_STP4, IF_Mbps(4) }, \
{ IFM_TOKEN | IFM_TOK_STP16, IF_Mbps(16) }, \
{ IFM_TOKEN | IFM_TOK_UTP4, IF_Mbps(4) }, \
{ IFM_TOKEN | IFM_TOK_UTP16, IF_Mbps(16) }, \
\
{ IFM_FDDI | IFM_FDDI_SMF, IF_Mbps(100) }, \
{ IFM_FDDI | IFM_FDDI_MMF, IF_Mbps(100) }, \
{ IFM_FDDI | IFM_FDDI_UTP, IF_Mbps(100) }, \
\
{ IFM_IEEE80211 | IFM_IEEE80211_FH1, IF_Mbps(1) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_FH2, IF_Mbps(2) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_DS2, IF_Mbps(2) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_DS5, IF_Kbps(5500) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_DS11, IF_Mbps(11) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_DS1, IF_Mbps(1) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_DS22, IF_Mbps(22) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM6, IF_Mbps(6) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM9, IF_Mbps(9) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM12, IF_Mbps(12) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM18, IF_Mbps(18) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM24, IF_Mbps(24) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM36, IF_Mbps(36) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM48, IF_Mbps(48) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM54, IF_Mbps(54) }, \
{ IFM_IEEE80211 | IFM_IEEE80211_OFDM72, IF_Mbps(72) }, \
\
{ 0, 0 }, \
}
/*
* Status descriptions for the various media types.
*/
struct ifmedia_status_description {
int ifms_type;
int ifms_valid;
int ifms_bit;
const char *ifms_string[2];
};
#define IFM_STATUS_DESC(ifms, bit) \
(ifms)->ifms_string[((ifms)->ifms_bit & (bit)) ? 1 : 0]
#define IFM_STATUS_DESCRIPTIONS { \
{ IFM_ETHER, IFM_AVALID, IFM_ACTIVE, \
{ "no carrier", "active" } }, \
{ IFM_FDDI, IFM_AVALID, IFM_ACTIVE, \
{ "no ring", "inserted" } }, \
{ IFM_TOKEN, IFM_AVALID, IFM_ACTIVE, \
{ "no ring", "inserted" } }, \
{ IFM_IEEE80211, IFM_AVALID, IFM_ACTIVE, \
{ "no network", "active" } }, \
{ IFM_ATM, IFM_AVALID, IFM_ACTIVE, \
{ "no network", "active" } }, \
{ IFM_CARP, IFM_AVALID, IFM_ACTIVE, \
{ "backup", "master" } }, \
{ 0, 0, 0, \
{ NULL, NULL } } \
}
#endif /* _FBSD_COMPAT_NET_IF_MEDIA_H_ */
@@ -0,0 +1,14 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NET_IF_TYPES_H_
#define _FBSD_COMPAT_NET_IF_TYPES_H_
#include <posix/net/if_types.h>
#define IFT_IEEE80211 0x47
#endif /* _FBSD_COMPAT_NET_IF_TYPES_H_ */
@@ -0,0 +1,696 @@
/*-
* Copyright (c) 1982, 1986, 1989, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* From: @(#)if.h 8.1 (Berkeley) 6/10/93
* $FreeBSD: src/sys/net/if_var.h,v 1.98.2.6 2006/10/06 20:26:05 andre Exp $
*/
#ifndef _FBSD_COMPAT_NET_IF_VAR_H_
#define _FBSD_COMPAT_NET_IF_VAR_H_
/*
* Structures defining a network interface, providing a packet
* transport mechanism (ala level 0 of the PUP protocols).
*
* Each interface accepts output datagrams of a specified maximum
* length, and provides higher level routines with input datagrams
* received from its medium.
*
* Output occurs when the routine if_output is called, with three parameters:
* (*ifp->if_output)(ifp, m, dst, rt)
* Here m is the mbuf chain to be sent and dst is the destination address.
* The output routine encapsulates the supplied datagram if necessary,
* and then transmits it on its medium.
*
* On input, each interface unwraps the data received by it, and either
* places it on the input queue of an internetwork datagram routine
* and posts the associated software interrupt, or passes the datagram to a raw
* packet input routine.
*
* Routines exist for locating interfaces by their addresses
* or for locating an interface on a certain network, as well as more general
* routing and gateway routines maintaining information used to locate
* interfaces. These routines live in the files if.c and route.c
*/
#ifdef __STDC__
/*
* Forward structure declarations for function prototypes [sic].
*/
struct mbuf;
struct thread;
struct rtentry;
struct rt_addrinfo;
struct socket;
struct ether_header;
struct carp_if;
struct route;
#endif
#include <posix/net/if_dl.h>
#include <sys/queue.h> /* get TAILQ macros */
#ifdef _KERNEL
#include <sys/mbuf.h>
#include <sys/eventhandler.h>
#endif /* _KERNEL */
#include <sys/lock.h> /* XXX */
#include <sys/mutex.h> /* XXX */
#include <sys/event.h> /* XXX */
#include <sys/_task.h>
#define IF_DUNIT_NONE -1
#include <altq/if_altq.h>
typedef enum {
IFCOUNTER_IPACKETS = 0,
IFCOUNTER_IERRORS,
IFCOUNTER_OPACKETS,
IFCOUNTER_OERRORS,
IFCOUNTER_COLLISIONS,
IFCOUNTER_IBYTES,
IFCOUNTER_OBYTES,
IFCOUNTER_IMCASTS,
IFCOUNTER_OMCASTS,
IFCOUNTER_IQDROPS,
IFCOUNTER_OQDROPS,
IFCOUNTER_NOPROTO,
IFCOUNTERS /* Array size. */
} ift_counter;
TAILQ_HEAD(ifnethead, ifnet); /* we use TAILQs so that the order of */
TAILQ_HEAD(ifaddrhead, ifaddr); /* instantiation is preserved in the list */
TAILQ_HEAD(ifprefixhead, ifprefix);
TAILQ_HEAD(ifmultihead, ifmultiaddr);
/*
* Structure defining a queue for a network interface.
*/
struct ifqueue {
struct mbuf *ifq_head;
struct mbuf *ifq_tail;
int ifq_len;
int ifq_maxlen;
int ifq_drops;
struct mtx ifq_mtx;
};
struct device;
/*
* Structure defining a network interface.
*
* (Would like to call this struct ``if'', but C isn't PL/1.)
*/
struct ifnet {
void *if_softc; /* pointer to driver state */
void *if_l2com; /* pointer to protocol bits */
TAILQ_ENTRY(ifnet) if_link; /* all struct ifnets are chained */
char if_xname[IFNAMSIZ]; /* external name (name + unit) */
const char *if_dname; /* driver name */
int if_dunit; /* unit or IF_DUNIT_NONE */
struct ifaddrhead if_addrhead; /* linked list of addresses per if */
/*
* if_addrhead is the list of all addresses associated to
* an interface.
* Some code in the kernel assumes that first element
* of the list has type AF_LINK, and contains sockaddr_dl
* addresses which store the link-level address and the name
* of the interface.
* However, access to the AF_LINK address through this
* field is deprecated. Use ifaddr_byindex() instead.
*/
struct knlist if_klist; /* events attached to this if */
int if_pcount; /* number of promiscuous listeners */
struct carp_if *if_carp; /* carp interface structure */
struct bpf_if *if_bpf; /* packet filter structure */
u_short if_index; /* numeric abbreviation for this if */
short if_timer; /* time 'til if_watchdog called */
struct ifvlantrunk *if_vlantrunk; /* pointer to 802.1q data */
int if_flags; /* up/down, broadcast, etc. */
int if_capabilities; /* interface capabilities */
int if_capenable; /* enabled features */
void *if_linkmib; /* link-type-specific MIB data */
size_t if_linkmiblen; /* length of above data */
struct if_data if_data;
struct ifmultihead if_multiaddrs; /* multicast addresses configured */
int if_amcount; /* number of all-multicast requests */
/* procedure handles */
int (*if_output) /* output routine (enqueue) */
(struct ifnet *, struct mbuf *, struct sockaddr *,
struct route *);
void (*if_input) /* input routine (from h/w driver) */
(struct ifnet *, struct mbuf *);
void (*if_start) /* initiate output routine */
(struct ifnet *);
int (*if_ioctl) /* ioctl routine */
(struct ifnet *, u_long, caddr_t);
void (*if_watchdog) /* timer routine */
(struct ifnet *);
void (*if_init) /* Init routine */
(void *);
int (*if_resolvemulti) /* validate/resolve multicast */
(struct ifnet *, struct sockaddr **, struct sockaddr *);
int (*if_transmit) /* initiate output routine */
(struct ifnet *, struct mbuf *);
void *if_spare1; /* spare pointer 1 */
void *if_spare2; /* spare pointer 2 */
void *if_spare3; /* spare pointer 3 */
int if_drv_flags; /* driver-managed status flags */
u_int if_spare_flags2; /* spare flags 2 */
struct ifaltq if_snd; /* output queue (includes altq) */
const u_int8_t *if_broadcastaddr; /* linklevel broadcast bytestring */
void *if_bridge; /* bridge glue */
struct lltable *lltables; /* list of L3-L2 resolution tables */
struct label *if_label; /* interface MAC label */
/* these are only used by IPv6 */
struct ifprefixhead if_prefixhead; /* list of prefixes per if */
void *if_afdata[AF_MAX];
int if_afdata_initialized;
struct mtx if_afdata_mtx;
struct task if_starttask; /* task for IFF_NEEDSGIANT */
struct task if_linktask; /* task for link change events */
struct mtx if_addr_mtx; /* mutex to protect address lists */
/* Haiku additions */
struct sockaddr_dl if_lladdr;
char device_name[128];
struct device *root_device;
struct ifqueue receive_queue;
sem_id receive_sem;
sem_id link_state_sem;
int32 open_count;
int32 flags;
/* WLAN specific additions */
sem_id scan_done_sem;
};
typedef void if_init_f_t(void *);
/*
* XXX These aliases are terribly dangerous because they could apply
* to anything.
*/
#define if_mtu if_data.ifi_mtu
#define if_type if_data.ifi_type
#define if_physical if_data.ifi_physical
#define if_addrlen if_data.ifi_addrlen
#define if_hdrlen if_data.ifi_hdrlen
#define if_metric if_data.ifi_metric
#define if_link_state if_data.ifi_link_state
#define if_baudrate if_data.ifi_baudrate
#define if_hwassist if_data.ifi_hwassist
#define if_ipackets if_data.ifi_ipackets
#define if_ierrors if_data.ifi_ierrors
#define if_opackets if_data.ifi_opackets
#define if_oerrors if_data.ifi_oerrors
#define if_collisions if_data.ifi_collisions
#define if_ibytes if_data.ifi_ibytes
#define if_obytes if_data.ifi_obytes
#define if_imcasts if_data.ifi_imcasts
#define if_omcasts if_data.ifi_omcasts
#define if_iqdrops if_data.ifi_iqdrops
#define if_oqdrops if_data.ifi_oqdrops
#define if_noproto if_data.ifi_noproto
#define if_lastchange if_data.ifi_lastchange
#define if_recvquota if_data.ifi_recvquota
#define if_xmitquota if_data.ifi_xmitquota
#define if_rawoutput(if, m, sa) if_output(if, m, sa, (struct route *)NULL)
/* for compatibility with other BSDs */
#define if_addrlist if_addrhead
#define if_list if_link
/*
* Locks for address lists on the network interface.
*/
#define IF_ADDR_LOCK_INIT(if) mtx_init(&(if)->if_addr_mtx, \
"if_addr_mtx", NULL, MTX_DEF)
#define IF_ADDR_LOCK_DESTROY(if) mtx_destroy(&(if)->if_addr_mtx)
#define IF_ADDR_LOCK(if) mtx_lock(&(if)->if_addr_mtx)
#define IF_ADDR_UNLOCK(if) mtx_unlock(&(if)->if_addr_mtx)
#define IF_ADDR_LOCK_ASSERT(if) mtx_assert(&(if)->if_addr_mtx, MA_OWNED)
void if_addr_rlock(struct ifnet *ifp); /* if_addrhead */
void if_addr_runlock(struct ifnet *ifp); /* if_addrhead */
void if_maddr_rlock(struct ifnet *ifp); /* if_multiaddrs */
void if_maddr_runlock(struct ifnet *ifp); /* if_multiaddrs */
/*
* Output queues (ifp->if_snd) and slow device input queues (*ifp->if_slowq)
* are queues of messages stored on ifqueue structures
* (defined above). Entries are added to and deleted from these structures
* by these macros, which should be called with ipl raised to splimp().
*/
#define IF_LOCK(ifq) mtx_lock(&(ifq)->ifq_mtx)
#define IF_UNLOCK(ifq) mtx_unlock(&(ifq)->ifq_mtx)
#define IF_LOCK_ASSERT(ifq) mtx_assert(&(ifq)->ifq_mtx, MA_OWNED)
#define _IF_QFULL(ifq) ((ifq)->ifq_len >= (ifq)->ifq_maxlen)
#define _IF_DROP(ifq) ((ifq)->ifq_drops++)
#define _IF_QLEN(ifq) ((ifq)->ifq_len)
#define _IF_ENQUEUE(ifq, m) do { \
(m)->m_nextpkt = NULL; \
if ((ifq)->ifq_tail == NULL) \
(ifq)->ifq_head = m; \
else \
(ifq)->ifq_tail->m_nextpkt = m; \
(ifq)->ifq_tail = m; \
(ifq)->ifq_len++; \
} while (0)
#define IF_ENQUEUE(ifq, m) do { \
IF_LOCK(ifq); \
_IF_ENQUEUE(ifq, m); \
IF_UNLOCK(ifq); \
} while (0)
#define _IF_PREPEND(ifq, m) do { \
(m)->m_nextpkt = (ifq)->ifq_head; \
if ((ifq)->ifq_tail == NULL) \
(ifq)->ifq_tail = (m); \
(ifq)->ifq_head = (m); \
(ifq)->ifq_len++; \
} while (0)
#define IF_PREPEND(ifq, m) do { \
IF_LOCK(ifq); \
_IF_PREPEND(ifq, m); \
IF_UNLOCK(ifq); \
} while (0)
#define _IF_DEQUEUE(ifq, m) do { \
(m) = (ifq)->ifq_head; \
if (m) { \
if (((ifq)->ifq_head = (m)->m_nextpkt) == NULL) \
(ifq)->ifq_tail = NULL; \
(m)->m_nextpkt = NULL; \
(ifq)->ifq_len--; \
} \
} while (0)
#define IF_DEQUEUE(ifq, m) do { \
IF_LOCK(ifq); \
_IF_DEQUEUE(ifq, m); \
IF_UNLOCK(ifq); \
} while (0)
#define _IF_POLL(ifq, m) ((m) = (ifq)->ifq_head)
#define IF_POLL(ifq, m) _IF_POLL(ifq, m)
#define _IF_DRAIN(ifq) do { \
struct mbuf *m; \
for (;;) { \
_IF_DEQUEUE(ifq, m); \
if (m == NULL) \
break; \
m_freem(m); \
} \
} while (0)
#define IF_DRAIN(ifq) do { \
IF_LOCK(ifq); \
_IF_DRAIN(ifq); \
IF_UNLOCK(ifq); \
} while(0)
#ifdef _KERNEL
/* interface address change event */
typedef void (*ifaddr_event_handler_t)(void *, struct ifnet *);
EVENTHANDLER_DECLARE(ifaddr_event, ifaddr_event_handler_t);
/* new interface arrival event */
typedef void (*ifnet_arrival_event_handler_t)(void *, struct ifnet *);
EVENTHANDLER_DECLARE(ifnet_arrival_event, ifnet_arrival_event_handler_t);
/* interface departure event */
typedef void (*ifnet_departure_event_handler_t)(void *, struct ifnet *);
EVENTHANDLER_DECLARE(ifnet_departure_event, ifnet_departure_event_handler_t);
#define IF_AFDATA_LOCK_INIT(ifp) \
mtx_init(&(ifp)->if_afdata_mtx, "if_afdata", NULL, MTX_DEF)
#define IF_AFDATA_LOCK(ifp) mtx_lock(&(ifp)->if_afdata_mtx)
#define IF_AFDATA_TRYLOCK(ifp) mtx_trylock(&(ifp)->if_afdata_mtx)
#define IF_AFDATA_UNLOCK(ifp) mtx_unlock(&(ifp)->if_afdata_mtx)
#define IF_AFDATA_DESTROY(ifp) mtx_destroy(&(ifp)->if_afdata_mtx)
#define IFF_LOCKGIANT(ifp) do { \
if ((ifp)->if_flags & IFF_NEEDSGIANT) \
mtx_lock(&Giant); \
} while (0)
#define IFF_UNLOCKGIANT(ifp) do { \
if ((ifp)->if_flags & IFF_NEEDSGIANT) \
mtx_unlock(&Giant); \
} while (0)
int if_handoff(struct ifqueue *ifq, struct mbuf *m, struct ifnet *ifp,
int adjust);
#define IF_HANDOFF(ifq, m, ifp) \
if_handoff((struct ifqueue *)ifq, m, ifp, 0)
#define IF_HANDOFF_ADJ(ifq, m, ifp, adj) \
if_handoff((struct ifqueue *)ifq, m, ifp, adj)
void if_start(struct ifnet *);
#define IFQ_ENQUEUE(ifq, m, err) \
do { \
IF_LOCK(ifq); \
if (ALTQ_IS_ENABLED(ifq)) \
ALTQ_ENQUEUE(ifq, m, NULL, err); \
else { \
if (_IF_QFULL(ifq)) { \
m_freem(m); \
(err) = ENOBUFS; \
} else { \
_IF_ENQUEUE(ifq, m); \
(err) = 0; \
} \
} \
if (err) \
(ifq)->ifq_drops++; \
IF_UNLOCK(ifq); \
} while (0)
#define IFQ_DEQUEUE_NOLOCK(ifq, m) \
do { \
if (TBR_IS_ENABLED(ifq)) \
(m) = tbr_dequeue_ptr(ifq, ALTDQ_REMOVE); \
else if (ALTQ_IS_ENABLED(ifq)) \
ALTQ_DEQUEUE(ifq, m); \
else \
_IF_DEQUEUE(ifq, m); \
} while (0)
#define IFQ_DEQUEUE(ifq, m) \
do { \
IF_LOCK(ifq); \
IFQ_DEQUEUE_NOLOCK(ifq, m); \
IF_UNLOCK(ifq); \
} while (0)
#define IFQ_POLL_NOLOCK(ifq, m) \
do { \
if (TBR_IS_ENABLED(ifq)) \
(m) = tbr_dequeue_ptr(ifq, ALTDQ_POLL); \
else if (ALTQ_IS_ENABLED(ifq)) \
ALTQ_POLL(ifq, m); \
else \
_IF_POLL(ifq, m); \
} while (0)
#define IFQ_POLL(ifq, m) \
do { \
IF_LOCK(ifq); \
IFQ_POLL_NOLOCK(ifq, m); \
IF_UNLOCK(ifq); \
} while (0)
#define IFQ_PURGE_NOLOCK(ifq) \
do { \
if (ALTQ_IS_ENABLED(ifq)) { \
ALTQ_PURGE(ifq); \
} else \
_IF_DRAIN(ifq); \
} while (0)
#define IFQ_PURGE(ifq) \
do { \
IF_LOCK(ifq); \
IFQ_PURGE_NOLOCK(ifq); \
IF_UNLOCK(ifq); \
} while (0)
#define IFQ_SET_READY(ifq) \
do { ((ifq)->altq_flags |= ALTQF_READY); } while (0)
#define IFQ_LOCK(ifq) IF_LOCK(ifq)
#define IFQ_UNLOCK(ifq) IF_UNLOCK(ifq)
#define IFQ_LOCK_ASSERT(ifq) IF_LOCK_ASSERT(ifq)
#define IFQ_IS_EMPTY(ifq) ((ifq)->ifq_len == 0)
#define IFQ_INC_LEN(ifq) ((ifq)->ifq_len++)
#define IFQ_DEC_LEN(ifq) (--(ifq)->ifq_len)
#define IFQ_INC_DROPS(ifq) ((ifq)->ifq_drops++)
#define IFQ_SET_MAXLEN(ifq, len) ((ifq)->ifq_maxlen = (len))
/*
* The IFF_DRV_OACTIVE test should really occur in the device driver, not in
* the handoff logic, as that flag is locked by the device driver.
*/
#define IFQ_HANDOFF_ADJ(ifp, m, adj, err) \
do { \
int len; \
short mflags; \
\
len = (m)->m_pkthdr.len; \
mflags = (m)->m_flags; \
IFQ_ENQUEUE(&(ifp)->if_snd, m, err); \
if ((err) == 0) { \
(ifp)->if_obytes += len + (adj); \
if (mflags & M_MCAST) \
(ifp)->if_omcasts++; \
if (((ifp)->if_drv_flags & IFF_DRV_OACTIVE) == 0) \
if_start(ifp); \
} \
} while (0)
#define IFQ_HANDOFF(ifp, m, err) \
IFQ_HANDOFF_ADJ(ifp, m, 0, err)
#define IFQ_DRV_DEQUEUE(ifq, m) \
do { \
(m) = (ifq)->ifq_drv_head; \
if (m) { \
if (((ifq)->ifq_drv_head = (m)->m_nextpkt) == NULL) \
(ifq)->ifq_drv_tail = NULL; \
(m)->m_nextpkt = NULL; \
(ifq)->ifq_drv_len--; \
} else { \
IFQ_LOCK(ifq); \
IFQ_DEQUEUE_NOLOCK(ifq, m); \
while ((ifq)->ifq_drv_len < (ifq)->ifq_drv_maxlen) { \
struct mbuf *m0; \
IFQ_DEQUEUE_NOLOCK(ifq, m0); \
if (m0 == NULL) \
break; \
m0->m_nextpkt = NULL; \
if ((ifq)->ifq_drv_tail == NULL) \
(ifq)->ifq_drv_head = m0; \
else \
(ifq)->ifq_drv_tail->m_nextpkt = m0; \
(ifq)->ifq_drv_tail = m0; \
(ifq)->ifq_drv_len++; \
} \
IFQ_UNLOCK(ifq); \
} \
} while (0)
#define IFQ_DRV_PREPEND(ifq, m) \
do { \
(m)->m_nextpkt = (ifq)->ifq_drv_head; \
if ((ifq)->ifq_drv_tail == NULL) \
(ifq)->ifq_drv_tail = (m); \
(ifq)->ifq_drv_head = (m); \
(ifq)->ifq_drv_len++; \
} while (0)
#define IFQ_DRV_IS_EMPTY(ifq) \
(((ifq)->ifq_drv_len == 0) && ((ifq)->ifq_len == 0))
#define IFQ_DRV_PURGE(ifq) \
do { \
struct mbuf *m, *n = (ifq)->ifq_drv_head; \
while((m = n) != NULL) { \
n = m->m_nextpkt; \
m_freem(m); \
} \
(ifq)->ifq_drv_head = (ifq)->ifq_drv_tail = NULL; \
(ifq)->ifq_drv_len = 0; \
IFQ_PURGE(ifq); \
} while (0)
/*
* 72 was chosen below because it is the size of a TCP/IP
* header (40) + the minimum mss (32).
*/
#define IF_MINMTU 72
#define IF_MAXMTU 65535
#endif /* _KERNEL */
/*
* The ifaddr structure contains information about one address
* of an interface. They are maintained by the different address families,
* are allocated and attached when an address is set, and are linked
* together so all addresses for an interface can be located.
*
* NOTE: a 'struct ifaddr' is always at the beginning of a larger
* chunk of malloc'ed memory, where we store the three addresses
* (ifa_addr, ifa_dstaddr and ifa_netmask) referenced here.
*/
struct ifaddr {
struct sockaddr *ifa_addr; /* address of interface */
struct sockaddr *ifa_dstaddr; /* other end of p-to-p link */
#define ifa_broadaddr ifa_dstaddr /* broadcast address interface */
struct sockaddr *ifa_netmask; /* used to determine subnet */
struct if_data if_data; /* not all members are meaningful */
struct ifnet *ifa_ifp; /* back-pointer to interface */
TAILQ_ENTRY(ifaddr) ifa_link; /* queue macro glue */
void (*ifa_rtrequest) /* check or clean routes (+ or -)'d */
(int, struct rtentry *, struct rt_addrinfo *);
u_short ifa_flags; /* mostly rt_flags for cloning */
u_int ifa_refcnt; /* references to this structure */
int ifa_metric; /* cost of going out this interface */
int (*ifa_claim_addr) /* check if an addr goes to this if */
(struct ifaddr *, struct sockaddr *);
struct mtx ifa_mtx;
};
#define IFA_ROUTE RTF_UP /* route installed */
/* for compatibility with other BSDs */
#define ifa_list ifa_link
#define IFA_LOCK_INIT(ifa) \
mtx_init(&(ifa)->ifa_mtx, "ifaddr", NULL, MTX_DEF)
#define IFA_LOCK(ifa) mtx_lock(&(ifa)->ifa_mtx)
#define IFA_UNLOCK(ifa) mtx_unlock(&(ifa)->ifa_mtx)
#define IFA_DESTROY(ifa) mtx_destroy(&(ifa)->ifa_mtx)
/*
* The prefix structure contains information about one prefix
* of an interface. They are maintained by the different address families,
* are allocated and attached when a prefix or an address is set,
* and are linked together so all prefixes for an interface can be located.
*/
struct ifprefix {
struct sockaddr *ifpr_prefix; /* prefix of interface */
struct ifnet *ifpr_ifp; /* back-pointer to interface */
TAILQ_ENTRY(ifprefix) ifpr_list; /* queue macro glue */
u_char ifpr_plen; /* prefix length in bits */
u_char ifpr_type; /* protocol dependent prefix type */
};
/*
* Multicast address structure. This is analogous to the ifaddr
* structure except that it keeps track of multicast addresses.
* Also, the reference count here is a count of requests for this
* address, not a count of pointers to this structure.
*/
struct ifmultiaddr {
TAILQ_ENTRY(ifmultiaddr) ifma_link; /* queue macro glue */
struct sockaddr *ifma_addr; /* address this membership is for */
struct sockaddr *ifma_lladdr; /* link-layer translation, if any */
struct ifnet *ifma_ifp; /* back-pointer to interface */
u_int ifma_refcount; /* reference count */
void *ifma_protospec; /* protocol-specific state, if any */
/* haiku additions, save a allocation -hugo */
struct sockaddr_dl ifma_addr_storage;
};
#ifdef _KERNEL
#define IFA_LOCK(ifa) mtx_lock(&(ifa)->ifa_mtx)
#define IFA_UNLOCK(ifa) mtx_unlock(&(ifa)->ifa_mtx)
__unused static void ifa_free(struct ifaddr *ifa) {}
__unused static void ifa_init(struct ifaddr *ifa) {}
__unused static void ifa_ref(struct ifaddr *ifa) {}
extern struct rw_lock ifnet_rwlock;
#define IFNET_LOCK_INIT() rw_lock_init(&ifnet_rwlock, "ifnet rwlock")
#define IFNET_WLOCK() rw_lock_write_lock(&ifnet_rwlock)
#define IFNET_WUNLOCK() rw_lock_write_unlock(&ifnet_rwlock)
#define IFNET_RLOCK() rw_lock_read_lock(&ifnet_rwlock)
#define IFNET_RLOCK_NOSLEEP() rw_lock_read_lock(&ifnet_rwlock)
#define IFNET_RUNLOCK() rw_lock_read_unlock(&ifnet_rwlock)
#define IFNET_RUNLOCK_NOSLEEP() rw_lock_read_unlock(&ifnet_rwlock)
struct ifnet *ifnet_byindex(u_short idx);
struct ifnet *ifnet_byindex_locked(u_short idx);
extern struct ifnethead ifnet;
extern int ifqmaxlen;
extern struct ifnet *loif; /* first loopback interface */
extern int if_index;
int if_addmulti(struct ifnet *, struct sockaddr *, struct ifmultiaddr **);
int if_allmulti(struct ifnet *, int);
struct ifnet* if_alloc(u_char);
void if_attach(struct ifnet *);
int if_delmulti(struct ifnet *, struct sockaddr *);
void if_detach(struct ifnet *);
void if_purgeaddrs(struct ifnet *);
void if_delallmulti(struct ifnet *);
void if_purgemaddrs(struct ifnet *);
void if_down(struct ifnet *);
void if_free(struct ifnet *);
void if_free_type(struct ifnet *, u_char);
void if_initname(struct ifnet *, const char *, int);
void if_link_state_change(struct ifnet *, int);
int if_printf(struct ifnet *, const char *, ...) __printflike(2, 3);
int if_setlladdr(struct ifnet *, const u_char *, int);
void if_up(struct ifnet *);
/*void ifinit(void);*/ /* declared in systm.h for main() */
int ifioctl(struct socket *, u_long, caddr_t, struct thread *);
int ifpromisc(struct ifnet *, int);
struct ifnet *ifunit(const char *);
struct ifaddr *ifa_ifwithaddr(struct sockaddr *);
struct ifaddr *ifa_ifwithbroadaddr(struct sockaddr *);
struct ifaddr *ifa_ifwithdstaddr(struct sockaddr *);
struct ifaddr *ifa_ifwithnet(struct sockaddr *);
struct ifaddr *ifa_ifwithroute(int, struct sockaddr *, struct sockaddr *);
struct ifaddr *ifaof_ifpforaddr(struct sockaddr *, struct ifnet *);
int if_simloop(struct ifnet *ifp, struct mbuf *m, int af, int hlen);
typedef void *if_com_alloc_t(u_char type, struct ifnet *ifp);
typedef void if_com_free_t(void *com, u_char type);
void if_register_com_alloc(u_char type, if_com_alloc_t *a, if_com_free_t *f);
void if_deregister_com_alloc(u_char type);
void if_inc_counter(struct ifnet *, ift_counter, int64_t);
#define IF_LLADDR(ifp) LLADDR(&ifp->if_lladdr)
#ifdef DEVICE_POLLING
enum poll_cmd { POLL_ONLY, POLL_AND_CHECK_STATUS };
typedef void poll_handler_t(struct ifnet *ifp, enum poll_cmd cmd, int count);
int ether_poll_register(poll_handler_t *h, struct ifnet *ifp);
int ether_poll_deregister(struct ifnet *ifp);
#endif /* DEVICE_POLLING */
#endif /* _KERNEL */
#endif /* _FBSD_COMPAT_NET_IF_VAR_H_ */
@@ -0,0 +1,135 @@
/*-
* Copyright 1998 Massachusetts Institute of Technology
*
* Permission to use, copy, modify, and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that both the above copyright notice and this
* permission notice appear in all copies, that both the above
* copyright notice and this permission notice appear in all
* supporting documentation, and that the name of M.I.T. not be used
* in advertising or publicity pertaining to distribution of the
* software without specific, written prior permission. M.I.T. makes
* no representations about the suitability of this software for any
* purpose. It is provided "as is" without express or implied
* warranty.
*
* THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
* ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
* SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/net/if_vlan_var.h,v 1.26 2007/02/28 22:05:30 bms Exp $
*/
#ifndef _FBSD_COMPAT_NET_IF_VLAN_VAR_H_
#define _FBSD_COMPAT_NET_IF_VLAN_VAR_H_ 1
struct ether_vlan_header {
u_char evl_dhost[ETHER_ADDR_LEN];
u_char evl_shost[ETHER_ADDR_LEN];
u_int16_t evl_encap_proto;
u_int16_t evl_tag;
u_int16_t evl_proto;
};
#define EVL_VLID_MASK 0x0FFF
#define EVL_PRI_MASK 0xE000
#define EVL_VLANOFTAG(tag) ((tag) & EVL_VLID_MASK)
#define EVL_PRIOFTAG(tag) (((tag) >> 13) & 7)
#define EVL_CFIOFTAG(tag) (((tag) >> 12) & 1)
#define EVL_MAKETAG(vlid, pri, cfi) \
((((((pri) & 7) << 1) | ((cfi) & 1)) << 12) | ((vlid) & EVL_VLID_MASK))
/* Set the VLAN ID in an mbuf packet header non-destructively. */
#define EVL_APPLY_VLID(m, vlid) \
do { \
if ((m)->m_flags & M_VLANTAG) { \
(m)->m_pkthdr.ether_vtag &= EVL_VLID_MASK; \
(m)->m_pkthdr.ether_vtag |= (vlid); \
} else { \
(m)->m_pkthdr.ether_vtag = (vlid); \
(m)->m_flags |= M_VLANTAG; \
} \
} while (0)
/* Set the priority ID in an mbuf packet header non-destructively. */
#define EVL_APPLY_PRI(m, pri) \
do { \
if ((m)->m_flags & M_VLANTAG) { \
uint16_t __vlantag = (m)->m_pkthdr.ether_vtag; \
(m)->m_pkthdr.ether_vtag |= EVL_MAKETAG( \
EVL_VLANOFTAG(__vlantag), (pri), \
EVL_CFIOFTAG(__vlantag)); \
} else { \
(m)->m_pkthdr.ether_vtag = \
EVL_MAKETAG(0, (pri), 0); \
(m)->m_flags |= M_VLANTAG; \
} \
} while (0)
/* sysctl(3) tags, for compatibility purposes */
#define VLANCTL_PROTO 1
#define VLANCTL_MAX 2
/*
* Configuration structure for SIOCSETVLAN and SIOCGETVLAN ioctls.
*/
struct vlanreq {
char vlr_parent[IFNAMSIZ];
u_short vlr_tag;
};
#define SIOCSETVLAN SIOCSIFGENERIC
#define SIOCGETVLAN SIOCGIFGENERIC
#ifdef _KERNEL
/*
* Drivers that are capable of adding and removing the VLAN header
* in hardware indicate they support this by marking IFCAP_VLAN_HWTAGGING
* in if_capabilities. Drivers for hardware that is capable
* of handling larger MTU's that may include a software-appended
* VLAN header w/o lowering the normal MTU should mark IFCAP_VLAN_MTU
* in if_capabilities; this notifies the VLAN code it can leave the
* MTU on the vlan interface at the normal setting.
*/
/*
* VLAN tags are stored in host byte order. Byte swapping may be
* necessary.
*
* Drivers that support hardware VLAN tag stripping fill in the
* received VLAN tag (containing both vlan and priority information)
* into the ether_vtag mbuf packet header field:
*
* m->m_pkthdr.ether_vtag = vlan_id; // ntohs()?
* m->m_flags |= M_VLANTAG;
*
* to mark the packet m with the specified VLAN tag.
*
* On output the driver should check the mbuf for the M_VLANTAG
* flag to see if a VLAN tag is present and valid:
*
* if (m->m_flags & M_VLANTAG) {
* ... = m->m_pkthdr.ether_vtag; // htons()?
* ... pass tag to hardware ...
* }
*
* Note that a driver must indicate it supports hardware VLAN
* stripping/insertion by marking IFCAP_VLAN_HWTAGGING in
* if_capabilities.
*/
#define VLAN_CAPABILITIES(_ifp) do { \
} while (0)
extern void (*vlan_trunk_cap_p)(struct ifnet *);
#endif /* _KERNEL */
#endif /* _FBSD_COMPAT_NET_IF_VLAN_VAR_H_ */
@@ -0,0 +1,24 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NET_ROUTE_H_
#define _FBSD_COMPAT_NET_ROUTE_H_
#include <posix/net/route.h>
/*
* A route consists of a destination address, a reference
* to a routing entry, and a reference to an llentry.
* These are often held by protocols in their control
* blocks, e.g. inpcb.
*/
struct route {
struct rtentry *ro_rt;
struct llentry *ro_lle;
struct sockaddr ro_dst;
};
#endif /* _FBSD_COMPAT_NET_ROUTE_H_ */
@@ -0,0 +1,13 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NETINET_IF_ETHER_H_
#define _FBSD_COMPAT_NETINET_IF_ETHER_H_
/* Haiku does it's own ARP management */
#define arp_ifinit(ifp, ifa)
#endif
@@ -0,0 +1,11 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_NETINET_IN_VAR_H_
#define _FBSD_COMPAT_NETINET_IN_VAR_H_
#include <sys/queue.h>
#endif /* _FBSD_COMPAT_NETINET_IN_VAR_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef FBSD_COMPAT_SECURITY_MAC_MAC_FRAMEWORK_H_
#define FBSD_COMPAT_SECURITY_MAC_MAC_FRAMEWORK_H_
#endif /* FBSD_COMPAT_SECURITY_MAC_MAC_FRAMEWORK_H_ */
@@ -0,0 +1,62 @@
/*-
* Copyright 2006 John-Mark Gurney.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/sys/_bus_dma.h,v 1.1 2006/09/03 00:26:17 jmg Exp $
*
*/
#ifndef _SYS__BUS_DMA_H_
#define _SYS__BUS_DMA_H_
typedef int bus_dmasync_op_t;
/*
* bus_dma_tag_t
*
* A machine-dependent opaque type describing the characteristics
* of how to perform DMA mappings. This structure encapsultes
* information concerning address and alignment restrictions, number
* of S/G segments, amount of data per S/G segment, etc.
*/
typedef struct bus_dma_tag *bus_dma_tag_t;
/*
* bus_dmamap_t
*
* DMA mapping instance information.
*/
typedef struct bus_dmamap *bus_dmamap_t;
/*
* A function that performs driver-specific synchronization on behalf of
* busdma.
*/
typedef enum {
BUS_DMA_LOCK = 0x01,
BUS_DMA_UNLOCK = 0x02,
} bus_dma_lock_op_t;
typedef void bus_dma_lock_t(void *, bus_dma_lock_op_t);
#endif /* !_SYS__BUS_DMA_H_ */
@@ -0,0 +1,26 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS__MUTEX_H_
#define _FBSD_COMPAT_SYS__MUTEX_H_
#include <lock.h>
struct mtx {
int type;
union {
struct {
mutex lock;
thread_id owner;
} mutex;
int32 spinlock;
recursive_lock recursive;
} u;
};
#endif /* _FBSD_COMPAT_SYS__MUTEX_H_ */
@@ -0,0 +1,24 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS__TASK_H_
#define _FBSD_COMPAT_SYS__TASK_H_
/* Haiku's list management */
#include <util/list.h>
typedef void (*task_handler_t)(void *context, int pending);
struct task {
int ta_priority;
task_handler_t ta_handler;
void *ta_argument;
int ta_pending;
struct list_link ta_link;
};
#endif
@@ -0,0 +1,11 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS__TIMEVAL_H_
#define _FBSD_COMPAT_SYS__TIMEVAL_H_
#include <sys/_types.h>
#endif /* _FBSD_COMPAT_SYS__TIMEVAL_H_ */
@@ -0,0 +1,20 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS__TYPES_H_
#define _FBSD_COMPAT_SYS__TYPES_H_
#ifdef __GNUCLIKE_BUILTIN_VARARGS
typedef __builtin_va_list __va_list; /* internally known to gcc */
#else
typedef char * __va_list;
#endif /* __GNUCLIKE_BUILTIN_VARARGS */
#if defined(__GNUC_VA_LIST_COMPATIBILITY) && !defined(__GNUC_VA_LIST) \
&& !defined(__NO_GNUC_VA_LIST)
#define __GNUC_VA_LIST
typedef __va_list __gnuc_va_list; /* compatibility w/GNU headers*/
#endif
#endif /* _FBSD_COMPAT_SYS__TYPES_H_ */
@@ -0,0 +1,158 @@
/*
* Copyright 2009, Colin Günther. All Rights Reserved.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_BUS_H_
#define _FBSD_COMPAT_SYS_BUS_H_
#include <sys/haiku-module.h>
#include <sys/_bus_dma.h>
#include <sys/queue.h>
// TODO per platform, these are 32-bit
// oh you glorious world of macros
#define bus_read_1(r, o) \
bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
#define bus_read_2(r, o) \
bus_space_read_2((r)->r_bustag, (r)->r_bushandle, (o))
#define bus_read_4(r, o) \
bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
#define bus_write_1(r, o, v) \
bus_space_write_1((r)->r_bustag, (r)->r_bushandle, (o), (v))
#define bus_write_2(r, o, v) \
bus_space_write_2((r)->r_bustag, (r)->r_bushandle, (o), (v))
#define bus_write_4(r, o, v) \
bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
#define bus_barrier(r, o, l, f) \
bus_space_barrier((r)->r_bustag, (r)->r_bushandle, (o), (l), (f))
#define bus_read_region_1(r, o, d, c) \
bus_space_read_region_1((r)->r_bustag, (r)->r_bushandle, (o), (d), (c))
#define FILTER_STRAY B_UNHANDLED_INTERRUPT
#define FILTER_HANDLED B_HANDLED_INTERRUPT
#define FILTER_SCHEDULE_THREAD B_INVOKE_SCHEDULER
/* Note that we reversed the original order, so whenever actual (negative)
numbers are used in a driver, we have to change it. */
#define BUS_PROBE_SPECIFIC 0
#define BUS_PROBE_LOW_PRIORITY 10
#define BUS_PROBE_DEFAULT 20
#define BUS_PROBE_GENERIC 100
#define __BUS_ACCESSOR(varp, var, ivarp, ivar, type) \
\
static __inline type varp ## _get_ ## var(device_t dev) \
{ \
return 0; \
} \
\
static __inline void varp ## _set_ ## var(device_t dev, type t) \
{ \
}
struct resource;
struct resource_spec {
int type;
int rid;
int flags;
};
enum intr_type {
INTR_TYPE_NET = 4,
INTR_FAST = 128,
INTR_MPSAFE = 512,
};
int bus_generic_detach(device_t dev);
int bus_generic_suspend(device_t dev);
int bus_generic_resume(device_t dev);
void bus_generic_shutdown(device_t dev);
typedef int (*driver_filter_t)(void *);
typedef void driver_intr_t(void *);
int resource_int_value(const char *name, int unit, const char *resname,
int *result);
struct resource *bus_alloc_resource(device_t dev, int type, int *rid,
unsigned long start, unsigned long end, unsigned long count, uint32 flags);
int bus_release_resource(device_t dev, int type, int rid, struct resource *r);
int bus_alloc_resources(device_t dev, struct resource_spec *resourceSpec,
struct resource **resources);
void bus_release_resources(device_t dev,
const struct resource_spec *resourceSpec, struct resource **resources);
int bus_child_present(device_t child);
static inline struct resource *
bus_alloc_resource_any(device_t dev, int type, int *rid, uint32 flags)
{
return bus_alloc_resource(dev, type, rid, 0, ~0, 1, flags);
}
bus_dma_tag_t bus_get_dma_tag(device_t dev);
int bus_setup_intr(device_t dev, struct resource *r, int flags,
driver_filter_t filter, driver_intr_t handler, void *arg, void **_cookie);
int bus_teardown_intr(device_t dev, struct resource *r, void *cookie);
const char *device_get_name(device_t dev);
const char *device_get_nameunit(device_t dev);
int device_get_unit(device_t dev);
void *device_get_softc(device_t dev);
int device_printf(device_t dev, const char *, ...) __printflike(2, 3);
void device_set_desc(device_t dev, const char *desc);
void device_set_desc_copy(device_t dev, const char *desc);
const char *device_get_desc(device_t dev);
device_t device_get_parent(device_t dev);
u_int32_t device_get_flags(device_t dev);
devclass_t device_get_devclass(device_t dev);
int device_get_children(device_t dev, device_t **devlistp, int *devcountp);
void device_set_ivars(device_t dev, void *);
void *device_get_ivars(device_t dev);
device_t device_add_child(device_t dev, const char *name, int unit);
int device_delete_child(device_t dev, device_t child);
int device_is_attached(device_t dev);
int device_attach(device_t dev);
int device_detach(device_t dev);
int bus_print_child_header(device_t dev, device_t child);
int bus_print_child_footer(device_t dev, device_t child);
int bus_generic_print_child(device_t dev, device_t child);
void bus_generic_driver_added(device_t dev, driver_t *driver);
int bus_generic_attach(device_t dev);
int device_set_driver(device_t dev, driver_t *driver);
int device_is_alive(device_t dev);
static inline struct sysctl_ctx_list *
device_get_sysctl_ctx(device_t dev)
{
return NULL;
}
static inline void *
device_get_sysctl_tree(device_t dev)
{
return NULL;
}
devclass_t devclass_find(const char *classname);
device_t devclass_get_device(devclass_t dc, int unit);
int devclass_get_maxunit(devclass_t dc);
#endif /* _FBSD_COMPAT_SYS_BUS_H_ */
@@ -0,0 +1,271 @@
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* $FreeBSD: src/sys/sys/bus_dma.h,v 1.30 2006/09/03 00:26:17 jmg Exp $ */
#ifndef _BUS_DMA_H_
#define _BUS_DMA_H_
#include <sys/_bus_dma.h>
/*
* Machine independent interface for mapping physical addresses to peripheral
* bus 'physical' addresses, and assisting with DMA operations.
*
* XXX This file is always included from <machine/bus_dma.h> and should not
* (yet) be included directly.
*/
/*
* Flags used in various bus DMA methods.
*/
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
#define BUS_DMA_ZERO 0x08 /* allocate zero'ed memory */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
#define BUS_DMA_BUS4 0x80
/*
* The following two flags are non-standard or specific to only certain
* architectures
*/
#define BUS_DMA_NOWRITE 0x100
#define BUS_DMA_NOCACHE 0x200
#define BUS_DMA_ISA 0x400 /* map memory for AXP ISA dma */
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;
/*
* Operations performed by bus_dmamap_sync().
*/
#define BUS_DMASYNC_PREREAD 1
#define BUS_DMASYNC_POSTREAD 2
#define BUS_DMASYNC_PREWRITE 4
#define BUS_DMASYNC_POSTWRITE 8
/*
* bus_dma_segment_t
*
* Describes a single contiguous DMA transaction. Values
* are suitable for programming into DMA registers.
*/
typedef struct bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
bus_size_t ds_len; /* length of transfer */
} bus_dma_segment_t;
/*
* A function that returns 1 if the address cannot be accessed by
* a device and 0 if it can be.
*/
typedef int bus_dma_filter_t(void *, bus_addr_t);
/*
* Generic helper function for manipulating mutexes.
*/
void busdma_lock_mutex(void *arg, bus_dma_lock_op_t op);
/*
* Allocate a device specific dma_tag encapsulating the constraints of
* the parent tag in addition to other restrictions specified:
*
* alignment: Alignment for segments.
* boundary: Boundary that segments cannot cross.
* lowaddr: Low restricted address that cannot appear in a mapping.
* highaddr: High restricted address that cannot appear in a mapping.
* filtfunc: An optional function to further test if an address
* within the range of lowaddr and highaddr cannot appear
* in a mapping.
* filtfuncarg: An argument that will be passed to filtfunc in addition
* to the address to test.
* maxsize: Maximum mapping size supported by this tag.
* nsegments: Number of discontinuities allowed in maps.
* maxsegsz: Maximum size of a segment in the map.
* flags: Bus DMA flags.
* lockfunc: An optional function to handle driver-defined lock
* operations.
* lockfuncarg: An argument that will be passed to lockfunc in addition
* to the lock operation.
* dmat: A pointer to set to a valid dma tag should the return
* value of this function indicate success.
*/
/* XXX Should probably allow specification of alignment */
int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
bus_size_t boundary, bus_addr_t lowaddr,
bus_addr_t highaddr, bus_dma_filter_t *filtfunc,
void *filtfuncarg, bus_size_t maxsize, int nsegments,
bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
void *lockfuncarg, bus_dma_tag_t *dmat);
int bus_dma_tag_destroy(bus_dma_tag_t dmat);
/*
* A function that processes a successfully loaded dma map or an error
* from a delayed load map.
*/
typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
/*
* Like bus_dmamap_callback but includes map size in bytes. This is
* defined as a separate interface to maintain compatibility for users
* of bus_dmamap_callback_t--at some point these interfaces should be merged.
*/
typedef void bus_dmamap_callback2_t(void *, bus_dma_segment_t *, int, bus_size_t, int);
/*
* XXX sparc64 uses the same interface, but a much different implementation.
* <machine/bus_dma.h> for the sparc64 arch contains the equivalent
* declarations.
*/
#if !defined(__sparc64__)
/*
* Allocate a handle for mapping from kva/uva/physical
* address space into bus device space.
*/
int bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp);
/*
* Destroy a handle for mapping from kva/uva/physical
* address space into bus device space.
*/
int bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map);
/*
* Allocate a piece of memory that can be efficiently mapped into
* bus device space based on the constraints listed in the dma tag.
* A dmamap to for use with dmamap_load is also allocated.
*/
int bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
bus_dmamap_t *mapp);
/*
* Free a piece of memory and its allocated dmamap, that was allocated
* via bus_dmamem_alloc.
*/
void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map);
/*
* Map the buffer buf into bus space using the dmamap map.
*/
int bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
bus_size_t buflen, bus_dmamap_callback_t *callback,
void *callback_arg, int flags);
/*
* Like bus_dmamap_load but for mbufs. Note the use of the
* bus_dmamap_callback2_t interface.
*/
int bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map,
struct mbuf *mbuf,
bus_dmamap_callback2_t *callback, void *callback_arg,
int flags);
int bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
struct mbuf *mbuf, bus_dma_segment_t *segs,
int *nsegs, int flags);
/*
* Like bus_dmamap_load but for uios. Note the use of the
* bus_dmamap_callback2_t interface.
*/
int bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map,
struct uio *ui,
bus_dmamap_callback2_t *callback, void *callback_arg,
int flags);
/*
* Perform a synchronization operation on the given map.
*/
void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t);
#define bus_dmamap_sync(dmat, dmamap, op) \
do { \
if ((dmamap) != NULL) \
_bus_dmamap_sync(dmat, dmamap, op); \
} while (0)
/*
* Release the mapping held by map.
*/
void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map);
#define bus_dmamap_unload(dmat, dmamap) \
do { \
if ((dmamap) != NULL) \
_bus_dmamap_unload(dmat, dmamap); \
} while (0)
#endif /* __sparc64__ */
#endif /* _BUS_DMA_H_ */
@@ -0,0 +1,45 @@
/*
* Copyright 2010, Axel Dörfler, [email protected].
* Copyright 2009, Colin Günther, [email protected].
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_CALLOUT_H_
#define _FBSD_COMPAT_SYS_CALLOUT_H_
#include <sys/haiku-module.h>
#include <sys/queue.h>
struct callout {
struct list_link link;
bigtime_t due;
uint32 flags;
void * c_arg;
void (*c_func)(void *);
struct mtx * c_mtx;
int c_flags;
};
#define CALLOUT_MPSAFE 0x0001
void callout_init(struct callout *c, int mpsafe);
void callout_init_mtx(struct callout *c, struct mtx *mutex, int flags);
/* Time values are in ticks, see compat/sys/kernel.h for its definition */
int callout_schedule(struct callout *c, int ticks);
int callout_reset(struct callout *c, int ticks, void (*func)(void *), void *arg);
int callout_pending(struct callout *c);
int callout_active(struct callout *c);
#define callout_drain(c) _callout_stop_safe(c, 1)
#define callout_stop(c) _callout_stop_safe(c, 0)
int _callout_stop_safe(struct callout *c, int safe);
#endif /* _FBSD_COMPAT_SYS_CALLOUT_H_ */
@@ -0,0 +1,310 @@
/*-
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Berkeley Software Design, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)cdefs.h 8.8 (Berkeley) 1/9/95
* $FreeBSD$
*/
#ifndef _FBSD_COMPAT_SYS_CDEFS_H_
#define _FBSD_COMPAT_SYS_CDEFS_H_
#include <posix/sys/cdefs.h>
#define __FBSDID(str) static const char __fbsdid[] = str
/*
* This code has been put in place to help reduce the addition of
* compiler specific defines in FreeBSD code. It helps to aid in
* having a compiler-agnostic source tree.
*/
#if defined(__GNUC__) || defined(__INTEL_COMPILER)
#if __GNUC__ >= 3 || defined(__INTEL_COMPILER)
#define __GNUCLIKE_ASM 3
#define __GNUCLIKE_MATH_BUILTIN_CONSTANTS
#else
#define __GNUCLIKE_ASM 2
#endif
#define __GNUCLIKE___TYPEOF 1
#define __GNUCLIKE___OFFSETOF 1
#define __GNUCLIKE___SECTION 1
#define __GNUCLIKE_ATTRIBUTE_MODE_DI 1
#ifndef __INTEL_COMPILER
# define __GNUCLIKE_CTOR_SECTION_HANDLING 1
#endif
#define __GNUCLIKE_BUILTIN_CONSTANT_P 1
# if defined(__INTEL_COMPILER) && defined(__cplusplus) \
&& __INTEL_COMPILER < 800
# undef __GNUCLIKE_BUILTIN_CONSTANT_P
# endif
#if (__GNUC_MINOR__ > 95 || __GNUC__ >= 3) && !defined(__INTEL_COMPILER)
# define __GNUCLIKE_BUILTIN_VARARGS 1
# define __GNUCLIKE_BUILTIN_STDARG 1
# define __GNUCLIKE_BUILTIN_VAALIST 1
#endif
#if defined(__GNUC__)
# define __GNUC_VA_LIST_COMPATIBILITY 1
#endif
#ifndef __INTEL_COMPILER
# define __GNUCLIKE_BUILTIN_NEXT_ARG 1
# define __GNUCLIKE_MATH_BUILTIN_RELOPS
#endif
#define __GNUCLIKE_BUILTIN_MEMCPY 1
/* XXX: if __GNUC__ >= 2: not tested everywhere originally, where replaced */
#define __CC_SUPPORTS_INLINE 1
#define __CC_SUPPORTS___INLINE 1
#define __CC_SUPPORTS___INLINE__ 1
#define __CC_SUPPORTS___FUNC__ 1
#define __CC_SUPPORTS_WARNING 1
#define __CC_SUPPORTS_VARADIC_XXX 1 /* see varargs.h */
#define __CC_SUPPORTS_DYNAMIC_ARRAY_INIT 1
#endif /* __GNUC__ || __INTEL_COMPILER */
/*
* Macro to test if we're using a specific version of gcc or later.
*/
#if defined(__GNUC__) && !defined(__INTEL_COMPILER)
#define __GNUC_PREREQ__(ma, mi) \
(__GNUC__ > (ma) || __GNUC__ == (ma) && __GNUC_MINOR__ >= (mi))
#else
#define __GNUC_PREREQ__(ma, mi) 0
#endif
/*
* GNU C version 2.96 adds explicit branch prediction so that
* the CPU back-end can hint the processor and also so that
* code blocks can be reordered such that the predicted path
* sees a more linear flow, thus improving cache behavior, etc.
*
* The following two macros provide us with a way to utilize this
* compiler feature. Use __predict_true() if you expect the expression
* to evaluate to true, and __predict_false() if you expect the
* expression to evaluate to false.
*
* A few notes about usage:
*
* * Generally, __predict_false() error condition checks (unless
* you have some _strong_ reason to do otherwise, in which case
* document it), and/or __predict_true() `no-error' condition
* checks, assuming you want to optimize for the no-error case.
*
* * Other than that, if you don't know the likelihood of a test
* succeeding from empirical or other `hard' evidence, don't
* make predictions.
*
* * These are meant to be used in places that are run `a lot'.
* It is wasteful to make predictions in code that is run
* seldomly (e.g. at subsystem initialization time) as the
* basic block reordering that this affects can often generate
* larger code.
*/
#if __GNUC_PREREQ__(2, 96)
#define __predict_true(exp) __builtin_expect((exp), 1)
#define __predict_false(exp) __builtin_expect((exp), 0)
#else
#define __predict_true(exp) (exp)
#define __predict_false(exp) (exp)
#endif
/*
* We define this here since <stddef.h>, <sys/queue.h>, and <sys/types.h>
* require it.
*/
#if __GNUC_PREREQ__(4, 1)
#define __offsetof(type, field) __builtin_offsetof(type, field)
#else
#ifndef __cplusplus
#define __offsetof(type, field) ((size_t)(&((type *)0)->field))
#else
#define __offsetof(type, field) \
(__offsetof__ (reinterpret_cast <size_t> \
(&reinterpret_cast <const volatile char &> \
(static_cast<type *> (0)->field))))
#endif
#endif
#define __rangeof(type, start, end) \
(__offsetof(type, end) - __offsetof(type, start))
/*
* Compiler-dependent macros to help declare dead (non-returning) and
* pure (no side effects) functions, and unused variables. They are
* null except for versions of gcc that are known to support the features
* properly (old versions of gcc-2 supported the dead and pure features
* in a different (wrong) way). If we do not provide an implementation
* for a given compiler, let the compile fail if it is told to use
* a feature that we cannot live without.
*/
#ifdef lint
#define __pure2
#define __unused
#define __packed
#define __aligned(x)
#define __section(x)
#else
#if !__GNUC_PREREQ__(2, 5) && !defined(__INTEL_COMPILER)
#define __pure2
#define __unused
#endif
#if __GNUC__ == 2 && __GNUC_MINOR__ >= 5 && __GNUC_MINOR__ < 7 && !defined(__INTEL_COMPILER)
#define __pure2 __attribute__((__const__))
#define __unused
/* XXX Find out what to do for __packed, __aligned and __section */
#endif
#if __GNUC_PREREQ__(2, 7)
#define __pure2 __attribute__((__const__))
#define __unused __attribute__((__unused__))
#define __packed __attribute__((__packed__))
#define __aligned(x) __attribute__((__aligned__(x)))
#define __section(x) __attribute__((__section__(x)))
#endif
#if __GNUC_PREREQ__(3, 1)
#define __used __attribute__((__used__))
#else
#if __GNUC_PREREQ__(2, 7)
#define __used
#endif
#endif
#if defined(__INTEL_COMPILER)
#define __pure2 __attribute__((__const__))
#define __unused __attribute__((__unused__))
#define __used __attribute__((__used__))
#define __packed __attribute__((__packed__))
#define __aligned(x) __attribute__((__aligned__(x)))
#define __section(x) __attribute__((__section__(x)))
#endif
#endif
/*
* Compiler-dependent macros to declare that functions take printf-like
* or scanf-like arguments. They are null except for versions of gcc
* that are known to support the features properly (old versions of gcc-2
* didn't permit keeping the keywords out of the application namespace).
*/
#if !__GNUC_PREREQ__(2, 7) && !defined(__INTEL_COMPILER)
#define __printflike(fmtarg, firstvararg)
#define __scanflike(fmtarg, firstvararg)
#define __format_arg(fmtarg)
#else
#define __printflike(fmtarg, firstvararg) \
__attribute__((__format__ (__printf__, fmtarg, firstvararg)))
#define __scanflike(fmtarg, firstvararg) \
__attribute__((__format__ (__scanf__, fmtarg, firstvararg)))
#define __format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))
#endif
#if __GNUC_PREREQ__(3, 1)
#define __noinline __attribute__ ((__noinline__))
#else
#define __noinline
#endif
#if __GNUC_PREREQ__(3, 3)
#define __nonnull(x) __attribute__((__nonnull__(x)))
#else
#define __nonnull(x)
#endif
/*
* The __CONCAT macro is used to concatenate parts of symbol names, e.g.
* with "#define OLD(foo) __CONCAT(old,foo)", OLD(foo) produces oldfoo.
* The __CONCAT macro is a bit tricky to use if it must work in non-ANSI
* mode -- there must be no spaces between its arguments, and for nested
* __CONCAT's, all the __CONCAT's must be at the left. __CONCAT can also
* concatenate double-quoted strings produced by the __STRING macro, but
* this only works with ANSI C.
*
* __XSTRING is like __STRING, but it expands any macros in its argument
* first. It is only available with ANSI C.
*/
#if defined(__STDC__) || defined(__cplusplus)
#define __XSTRING(x) __STRING(x) /* expand x, then stringify */
#define __const const /* define reserved names to standard */
#define __signed signed
#define __volatile volatile
#if defined(__cplusplus)
#define __inline inline /* convert to C++ keyword */
#else
#if !(defined(__CC_SUPPORTS___INLINE))
#define __inline /* delete GCC keyword */
#endif /* ! __CC_SUPPORTS___INLINE */
#endif /* !__cplusplus */
#else /* !(__STDC__ || __cplusplus) */
#if !defined(__CC_SUPPORTS___INLINE)
#define __const /* delete pseudo-ANSI C keywords */
#define __inline
#define __signed
#define __volatile
/*
* In non-ANSI C environments, new programs will want ANSI-only C keywords
* deleted from the program and old programs will want them left alone.
* When using a compiler other than gcc, programs using the ANSI C keywords
* const, inline etc. as normal identifiers should define -DNO_ANSI_KEYWORDS.
* When using "gcc -traditional", we assume that this is the intent; if
* __GNUC__ is defined but __STDC__ is not, we leave the new keywords alone.
*/
#ifndef NO_ANSI_KEYWORDS
#define const /* delete ANSI C keywords */
#define inline
#define signed
#define volatile
#endif /* !NO_ANSI_KEYWORDS */
#endif /* !__CC_SUPPORTS___INLINE */
#endif /* !(__STDC__ || __cplusplus) */
#ifndef __DECONST
#define __DECONST(type, var) ((type)(uintptr_t)(const void *)(var))
#endif
#ifndef __UNCONST
#define __UNCONST(var) ((void*)(uintptr_t)(const void *)(var))
#endif
#endif
@@ -0,0 +1,31 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_CONDVAR_H_
#define _FBSD_COMPAT_SYS_CONDVAR_H_
#include <sys/queue.h>
#ifdef __cplusplus
} /* extern "C" */
#include <kernel_c++_structs.h>
extern "C" {
#else
#include <kernel_c++_structs.h>
#endif
struct cv {
struct ConditionVariable condition;
};
void cv_init(struct cv*, const char*);
void cv_destroy(struct cv*);
void cv_wait(struct cv*, struct mtx*);
int cv_timedwait(struct cv*, struct mtx*, int);
void cv_signal(struct cv*);
#endif /* _FBSD_COMPAT_SYS_CONDVAR_H_ */
@@ -0,0 +1,11 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_CTYPE_H_
#define _FBSD_COMPAT_SYS_CTYPE_H_
#define isprint(c) ((c) >= ' ' && (c) <= '~')
#endif /* _FBSD_COMPAT_SYS_CTYPE_H_ */
@@ -0,0 +1,197 @@
/*-
* Copyright (c) 2002 Thomas Moestl <[email protected]>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/sys/endian.h,v 1.6 2003/10/15 20:05:57 obrien Exp $
*/
#ifndef _FBSD_COMPAT_SYS_ENDIAN_H_
#define _FBSD_COMPAT_SYS_ENDIAN_H_
#include <stdint.h>
#include <posix/endian.h>
#include <support/ByteOrder.h>
#include <sys/cdefs.h>
#include <sys/_types.h>
#include <machine/endian.h>
#define _BYTE_ORDER BYTE_ORDER
#define _LITTLE_ENDIAN LITTLE_ENDIAN
#define _BIG_ENDIAN BIG_ENDIAN
#define __bswap16(x) __swap_int16(x)
#define __bswap32(x) __swap_int32(x)
#define __bswap64(x) __swap_int64(x)
/*
* General byte order swapping functions.
*/
#define bswap16(x) __bswap16(x)
#define bswap32(x) __bswap32(x)
#define bswap64(x) __bswap64(x)
/*
* Host to big endian, host to little endian, big endian to host, and little
* endian to host byte order functions as detailed in byteorder(9).
*/
#if _BYTE_ORDER == _LITTLE_ENDIAN
#define htobe16(x) bswap16((x))
#define htobe32(x) bswap32((x))
#define htobe64(x) bswap64((x))
#define htole16(x) ((uint16_t)(x))
#define htole32(x) ((uint32_t)(x))
#define htole64(x) ((uint64_t)(x))
#define be16toh(x) bswap16((x))
#define be32toh(x) bswap32((x))
#define be64toh(x) bswap64((x))
#define le16toh(x) ((uint16_t)(x))
#define le32toh(x) ((uint32_t)(x))
#define le64toh(x) ((uint64_t)(x))
#else /* _BYTE_ORDER != _LITTLE_ENDIAN */
#define htobe16(x) ((uint16_t)(x))
#define htobe32(x) ((uint32_t)(x))
#define htobe64(x) ((uint64_t)(x))
#define htole16(x) bswap16((x))
#define htole32(x) bswap32((x))
#define htole64(x) bswap64((x))
#define be16toh(x) ((uint16_t)(x))
#define be32toh(x) ((uint32_t)(x))
#define be64toh(x) ((uint64_t)(x))
#define le16toh(x) bswap16((x))
#define le32toh(x) bswap32((x))
#define le64toh(x) bswap64((x))
#endif /* _BYTE_ORDER == _LITTLE_ENDIAN */
/* Alignment-agnostic encode/decode bytestream to/from little/big endian. */
static __inline uint16_t
be16dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return ((p[0] << 8) | p[1]);
}
static __inline uint32_t
be32dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
}
static __inline uint64_t
be64dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return (((uint64_t)be32dec(p) << 32) | be32dec(p + 4));
}
static __inline uint16_t
le16dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return ((p[1] << 8) | p[0]);
}
static __inline uint32_t
le32dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
}
static __inline uint64_t
le64dec(const void *pp)
{
unsigned char const *p = (unsigned char const *)pp;
return (((uint64_t)le32dec(p + 4) << 32) | le32dec(p));
}
static __inline void
be16enc(void *pp, uint16_t u)
{
unsigned char *p = (unsigned char *)pp;
p[0] = (u >> 8) & 0xff;
p[1] = u & 0xff;
}
static __inline void
be32enc(void *pp, uint32_t u)
{
unsigned char *p = (unsigned char *)pp;
p[0] = (u >> 24) & 0xff;
p[1] = (u >> 16) & 0xff;
p[2] = (u >> 8) & 0xff;
p[3] = u & 0xff;
}
static __inline void
be64enc(void *pp, uint64_t u)
{
unsigned char *p = (unsigned char *)pp;
be32enc(p, u >> 32);
be32enc(p + 4, u & 0xffffffff);
}
static __inline void
le16enc(void *pp, uint16_t u)
{
unsigned char *p = (unsigned char *)pp;
p[0] = u & 0xff;
p[1] = (u >> 8) & 0xff;
}
static __inline void
le32enc(void *pp, uint32_t u)
{
unsigned char *p = (unsigned char *)pp;
p[0] = u & 0xff;
p[1] = (u >> 8) & 0xff;
p[2] = (u >> 16) & 0xff;
p[3] = (u >> 24) & 0xff;
}
static __inline void
le64enc(void *pp, uint64_t u)
{
unsigned char *p = (unsigned char *)pp;
le32enc(p, u & 0xffffffff);
le32enc(p + 4, u >> 32);
}
#endif /* _SYS_ENDIAN_H_ */
@@ -0,0 +1,16 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_ERRNO_H_
#define _FBSD_COMPAT_SYS_ERRNO_H_
#include <posix/errno.h>
/* pseudo-errors returned inside freebsd compat layer to modify return to process */
#define ERESTART (B_ERRORS_END + 1) /* restart syscall */
#define EJUSTRETURN (B_ERRORS_END + 2) /* don't modify regs, just return */
#endif
@@ -0,0 +1,13 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_EVENT_H_
#define _FBSD_COMPAT_SYS_EVENT_H_
struct knlist {
int _dummy;
};
#endif
@@ -0,0 +1,176 @@
/*-
* Copyright (c) 1999 Michael Smith <[email protected]>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/sys/eventhandler.h,v 1.33.2.1 2006/05/16 07:27:49 ps Exp $
*/
#ifndef SYS_EVENTHANDLER_H
#define SYS_EVENTHANDLER_H
#include <sys/lock.h>
#include <sys/ktr.h>
#include <sys/mutex.h>
#include <sys/queue.h>
struct eventhandler_entry {
TAILQ_ENTRY(eventhandler_entry) ee_link;
int ee_priority;
#define EHE_DEAD_PRIORITY (-1)
void *ee_arg;
};
struct eventhandler_list {
char *el_name;
int el_flags;
#define EHL_INITTED (1<<0)
u_int el_runcount;
struct mtx el_lock;
TAILQ_ENTRY(eventhandler_list) el_link;
TAILQ_HEAD(,eventhandler_entry) el_entries;
};
typedef struct eventhandler_entry *eventhandler_tag;
#define EHL_LOCK(p) mtx_lock(&(p)->el_lock)
#define EHL_UNLOCK(p) mtx_unlock(&(p)->el_lock)
#define EHL_LOCK_ASSERT(p, x) mtx_assert(&(p)->el_lock, x)
/*
* Macro to invoke the handlers for a given event.
*/
#define _EVENTHANDLER_INVOKE(name, list, ...) do { \
struct eventhandler_entry *_ep; \
struct eventhandler_entry_ ## name *_t; \
\
KASSERT((list)->el_flags & EHL_INITTED, \
("eventhandler_invoke: running non-inited list")); \
EHL_LOCK_ASSERT((list), MA_OWNED); \
(list)->el_runcount++; \
KASSERT((list)->el_runcount > 0, \
("eventhandler_invoke: runcount overflow")); \
CTR0(KTR_EVH, "eventhandler_invoke(\"" __STRING(name) "\")"); \
TAILQ_FOREACH(_ep, &((list)->el_entries), ee_link) { \
if (_ep->ee_priority != EHE_DEAD_PRIORITY) { \
EHL_UNLOCK((list)); \
_t = (struct eventhandler_entry_ ## name *)_ep; \
CTR1(KTR_EVH, "eventhandler_invoke: executing %p", \
(void *)_t->eh_func); \
_t->eh_func(_ep->ee_arg , ## __VA_ARGS__); \
EHL_LOCK((list)); \
} \
} \
KASSERT((list)->el_runcount > 0, \
("eventhandler_invoke: runcount underflow")); \
(list)->el_runcount--; \
if ((list)->el_runcount == 0) \
eventhandler_prune_list(list); \
EHL_UNLOCK((list)); \
} while (0)
/*
* Slow handlers are entirely dynamic; lists are created
* when entries are added to them, and thus have no concept of "owner",
*
* Slow handlers need to be declared, but do not need to be defined. The
* declaration must be in scope wherever the handler is to be invoked.
*/
#define EVENTHANDLER_DECLARE(name, type) \
struct eventhandler_entry_ ## name \
{ \
struct eventhandler_entry ee; \
type eh_func; \
}; \
struct __hack
#define EVENTHANDLER_INVOKE(name, ...) \
do { \
struct eventhandler_list *_el; \
\
if ((_el = eventhandler_find_list(#name)) != NULL) \
_EVENTHANDLER_INVOKE(name, _el , ## __VA_ARGS__); \
} while (0)
#define EVENTHANDLER_REGISTER(name, func, arg, priority) \
eventhandler_register(NULL, #name, func, arg, priority)
#define EVENTHANDLER_DEREGISTER(name, tag) \
do { \
struct eventhandler_list *_el; \
\
if ((_el = eventhandler_find_list(#name)) != NULL) \
eventhandler_deregister(_el, tag); \
} while(0)
eventhandler_tag eventhandler_register(struct eventhandler_list *list,
const char *name, void *func, void *arg, int priority);
void eventhandler_deregister(struct eventhandler_list *list,
eventhandler_tag tag);
struct eventhandler_list *eventhandler_find_list(const char *name);
void eventhandler_prune_list(struct eventhandler_list *list);
/*
* Standard system event queues.
*/
/* Generic priority levels */
#define EVENTHANDLER_PRI_FIRST 0
#define EVENTHANDLER_PRI_ANY 10000
#define EVENTHANDLER_PRI_LAST 20000
/* Shutdown events */
typedef void (*shutdown_fn)(void *, int);
#define SHUTDOWN_PRI_FIRST EVENTHANDLER_PRI_FIRST
#define SHUTDOWN_PRI_DEFAULT EVENTHANDLER_PRI_ANY
#define SHUTDOWN_PRI_LAST EVENTHANDLER_PRI_LAST
EVENTHANDLER_DECLARE(shutdown_pre_sync, shutdown_fn); /* before fs sync */
EVENTHANDLER_DECLARE(shutdown_post_sync, shutdown_fn); /* after fs sync */
EVENTHANDLER_DECLARE(shutdown_final, shutdown_fn);
/* Low memory event */
typedef void (*vm_lowmem_handler_t)(void *, int);
#define LOWMEM_PRI_DEFAULT EVENTHANDLER_PRI_FIRST
EVENTHANDLER_DECLARE(vm_lowmem, vm_lowmem_handler_t);
/*
* Process events
* process_fork and exit handlers are called without Giant.
* exec handlers are called with Giant, but that is by accident.
*/
struct proc;
typedef void (*exitlist_fn)(void *, struct proc *);
typedef void (*forklist_fn)(void *, struct proc *, struct proc *, int);
typedef void (*execlist_fn)(void *, struct proc *);
EVENTHANDLER_DECLARE(process_exit, exitlist_fn);
EVENTHANDLER_DECLARE(process_fork, forklist_fn);
EVENTHANDLER_DECLARE(process_exec, execlist_fn);
typedef void (*uma_zone_chfn)(void *);
EVENTHANDLER_DECLARE(nmbclusters_change, uma_zone_chfn);
EVENTHANDLER_DECLARE(maxsockets_change, uma_zone_chfn);
#endif /* SYS_EVENTHANDLER_H */
@@ -0,0 +1,23 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_FIRMWARE_H_
#define _FBSD_COMPAT_SYS_FIRMWARE_H_
#define FIRMWARE_UNLOAD 0x0001
struct firmware {
const char* name; // system-wide name
const void* data; // location of image
size_t datasize; // size of image in bytes
unsigned int version; // version of the image
};
const struct firmware* firmware_get(const char*);
void firmware_put(const struct firmware*, int);
#endif /* _FBSD_COMPAT_SYS_FIRMWARE_H_ */
@@ -0,0 +1,264 @@
/*
* Copyright 2009, Colin Günther. All Rights Reserved.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_HAIKU_MODULE_H_
#define _FBSD_COMPAT_SYS_HAIKU_MODULE_H_
#include <Drivers.h>
#include <KernelExport.h>
#include <kernel/lock.h>
#include <net_stack.h>
#undef ASSERT
/* private/kernel/debug.h sets it */
typedef struct device *device_t;
typedef struct devclass *devclass_t;
typedef int (*device_method_signature_t)(device_t dev);
typedef int device_probe_t(device_t dev);
typedef int device_attach_t(device_t dev);
typedef int device_detach_t(device_t dev);
typedef int device_resume_t(device_t dev);
typedef int device_suspend_t(device_t dev);
struct device_method {
const char *name;
device_method_signature_t method;
};
typedef struct device_method device_method_t;
#define DEVMETHOD(name, func) { #name, (device_method_signature_t)&func }
#define DEVMETHOD_END { 0, 0 }
typedef struct {
const char *name;
device_method_t *methods;
size_t softc_size;
} driver_t;
#define DRIVER_MODULE_NAME(name, busname) \
__fbsd_ ## name ## _ ## busname
status_t _fbsd_init_hardware(driver_t *driver[]);
status_t _fbsd_init_drivers(driver_t *driver[]);
status_t _fbsd_uninit_drivers(driver_t *driver[]);
extern const char *gDriverName;
driver_t *__haiku_select_miibus_driver(device_t dev);
driver_t *__haiku_probe_miibus(device_t dev, driver_t *drivers[]);
status_t __haiku_handle_fbsd_drivers_list(status_t (*handler)(driver_t *[]));
status_t init_wlan_stack(void);
void uninit_wlan_stack(void);
status_t start_wlan(device_t);
status_t stop_wlan(device_t);
status_t wlan_control(void*, uint32, void*, size_t);
status_t wlan_close(void*);
status_t wlan_if_l2com_alloc(void*);
/* we define the driver methods with HAIKU_FBSD_DRIVERS_GLUE to
* force the rest of the stuff to be linked back with the driver.
* While gcc 2.95 packs everything from the static library onto
* the final binary, gcc 4.x rightfuly doesn't. */
#define HAIKU_FBSD_DRIVERS_GLUE(publicname) \
extern const char *gDeviceNameList[]; \
extern device_hooks gDeviceHooks; \
const char *gDriverName = #publicname; \
int32 api_version = B_CUR_DRIVER_API_VERSION; \
status_t init_hardware() \
{ \
return __haiku_handle_fbsd_drivers_list(_fbsd_init_hardware); \
} \
status_t init_driver() \
{ \
return __haiku_handle_fbsd_drivers_list(_fbsd_init_drivers); \
} \
void uninit_driver() \
{ \
__haiku_handle_fbsd_drivers_list(_fbsd_uninit_drivers); \
} \
const char **publish_devices() \
{ return gDeviceNameList; } \
device_hooks *find_device(const char *name) \
{ return &gDeviceHooks; } \
status_t init_wlan_stack(void) \
{ return B_OK; } \
void uninit_wlan_stack(void) {} \
status_t start_wlan(device_t dev) \
{ return B_OK; } \
status_t stop_wlan(device_t dev) \
{ return B_OK; } \
status_t wlan_control(void *cookie, uint32 op, void *arg, \
size_t length) \
{ return B_BAD_VALUE; } \
status_t wlan_close(void* cookie) \
{ return B_OK; } \
status_t wlan_if_l2com_alloc(void* ifp) \
{ return B_OK; }
#define HAIKU_FBSD_DRIVER_GLUE(publicname, name, busname) \
extern driver_t *DRIVER_MODULE_NAME(name, busname); \
status_t __haiku_handle_fbsd_drivers_list(status_t (*proc)(driver_t *[])) {\
driver_t *drivers[] = { \
DRIVER_MODULE_NAME(name, busname), \
NULL \
}; \
return (*proc)(drivers); \
} \
HAIKU_FBSD_DRIVERS_GLUE(publicname);
#define HAIKU_FBSD_WLAN_DRIVERS_GLUE(publicname) \
extern const char *gDeviceNameList[]; \
extern device_hooks gDeviceHooks; \
const char *gDriverName = #publicname; \
int32 api_version = B_CUR_DRIVER_API_VERSION; \
status_t init_hardware() \
{ \
return __haiku_handle_fbsd_drivers_list(_fbsd_init_hardware); \
} \
status_t init_driver() \
{ \
return __haiku_handle_fbsd_drivers_list(_fbsd_init_drivers); \
} \
void uninit_driver() \
{ \
__haiku_handle_fbsd_drivers_list(_fbsd_uninit_drivers); \
} \
const char **publish_devices() \
{ return gDeviceNameList; } \
device_hooks *find_device(const char *name) \
{ return &gDeviceHooks; }
#define HAIKU_FBSD_WLAN_DRIVER_GLUE(publicname, name, busname) \
extern driver_t *DRIVER_MODULE_NAME(name, busname); \
status_t __haiku_handle_fbsd_drivers_list(status_t (*proc)(driver_t *[])) {\
driver_t *drivers[] = { \
DRIVER_MODULE_NAME(name, busname), \
NULL \
}; \
return (*proc)(drivers); \
} \
HAIKU_FBSD_WLAN_DRIVERS_GLUE(publicname);
#define HAIKU_FBSD_RETURN_MII_DRIVER(drivers) \
driver_t *__haiku_select_miibus_driver(device_t dev) \
{ \
return __haiku_probe_miibus(dev, drivers); \
}
#define HAIKU_FBSD_MII_DRIVER(name) \
extern driver_t *DRIVER_MODULE_NAME(name, miibus); \
driver_t *__haiku_select_miibus_driver(device_t dev) \
{ \
driver_t *drivers[] = { \
DRIVER_MODULE_NAME(name, miibus), \
NULL \
}; \
return __haiku_probe_miibus(dev, drivers); \
}
#define NO_HAIKU_FBSD_MII_DRIVER() \
HAIKU_FBSD_RETURN_MII_DRIVER(NULL)
extern spinlock __haiku_intr_spinlock;
extern int __haiku_disable_interrupts(device_t dev);
extern void __haiku_reenable_interrupts(device_t dev);
#define HAIKU_CHECK_DISABLE_INTERRUPTS __haiku_disable_interrupts
#define HAIKU_REENABLE_INTERRUPTS __haiku_reenable_interrupts
#define NO_HAIKU_CHECK_DISABLE_INTERRUPTS() \
int HAIKU_CHECK_DISABLE_INTERRUPTS(device_t dev) { \
panic("should never be called."); \
return -1; \
}
#define NO_HAIKU_REENABLE_INTERRUPTS() \
void HAIKU_REENABLE_INTERRUPTS(device_t dev) {}
extern int __haiku_driver_requirements;
enum {
FBSD_TASKQUEUES = 1 << 0,
FBSD_FAST_TASKQUEUE = 1 << 1,
FBSD_SWI_TASKQUEUE = 1 << 2,
FBSD_WLAN = 1 << 3,
};
#define HAIKU_DRIVER_REQUIREMENTS(flags) \
int __haiku_driver_requirements = (flags)
#define HAIKU_DRIVER_REQUIRES(flag) (__haiku_driver_requirements & (flag))
/* #pragma mark - firmware loading */
/*
* Only needed to be specified in the glue code of drivers which actually need
* to load firmware. See iprowifi2100 for an example.
*/
extern const uint __haiku_firmware_version;
/* Use 0 if driver doesn't care about firmware version. */
#define HAIKU_FIRMWARE_VERSION(version) \
const uint __haiku_firmware_version = (version)
extern const uint __haiku_firmware_parts_count;
extern const char* __haiku_firmware_name_map[][2];
#define HAIKU_FIRMWARE_NAME_MAP(firmwarePartsCount) \
const uint __haiku_firmware_parts_count = firmwarePartsCount; \
const char* __haiku_firmware_name_map[firmwarePartsCount][2]
#define NO_HAIKU_FIRMWARE_NAME_MAP() \
const uint __haiku_firmware_parts_count = 0; \
const char* __haiku_firmware_name_map[0][2] = {}
/* #pragma mark - synchronization */
#define HAIKU_INTR_REGISTER_STATE \
cpu_status __haiku_cpu_state = 0
#define HAIKU_INTR_REGISTER_ENTER() do { \
__haiku_cpu_state = disable_interrupts(); \
acquire_spinlock(&__haiku_intr_spinlock); \
} while (0)
#define HAIKU_INTR_REGISTER_LEAVE() do { \
release_spinlock(&__haiku_intr_spinlock); \
restore_interrupts(__haiku_cpu_state); \
} while (0)
#define HAIKU_PROTECT_INTR_REGISTER(x) do { \
HAIKU_INTR_REGISTER_STATE; \
HAIKU_INTR_REGISTER_ENTER(); \
x; \
HAIKU_INTR_REGISTER_LEAVE(); \
} while (0)
#define DEFINE_CLASS_0(name, driver, methods, size) \
driver_t driver = { #name, methods, size }
#define DRIVER_MODULE(name, busname, driver, devclass, evh, arg) \
driver_t *DRIVER_MODULE_NAME(name, busname) = &(driver); \
devclass_t *__class_ ## name ## _ ## busname ## _ ## devclass = &(devclass)
#define DRIVER_MODULE_ORDERED(name, busname, driver, devclass, evh, arg, order) \
DRIVER_MODULE(name, busname, driver, devclass, evh, arg)
#define nitems(_a) (sizeof((_a)) / sizeof((_a)[0]))
#endif /* _FBSD_COMPAT_SYS_HAIKU_MODULE_H_ */
@@ -0,0 +1,12 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_IOCCOM_H_
#define _FBSD_COMPAT_SYS_IOCCOM_H_
#define _IOW(g,n,t) SIOCEND + n
#define _IOWR(g,n,t) SIOCEND + n
#endif /* _FBSD_COMPAT_SYS_IOCCOM_H_ */
@@ -0,0 +1,51 @@
/*
* Copyright 2007-2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_KERNEL_H_
#define _FBSD_COMPAT_SYS_KERNEL_H_
#include <stddef.h>
#include <sys/haiku-module.h>
#include <sys/linker_set.h>
#include <sys/queue.h>
/*
*
* The rate at which FreeBSD can generate callouts (kind of timeout mechanism).
* For FreeBSD 8 this is typically 1000 times per second (100 for ARM).
* This value is defined in a file called subr_param.c
*
* WHile Haiku can have a much higher granularity, it is not a good idea to have
* this since FreeBSD tries to do certain tasks based on ticks, for instance
* autonegotiation and wlan scanning.
* Suffixing LL prevents integer overflows during calculations.
* as it defines a long long constant.*/
#define hz 1000LL
#define ticks_to_usecs(t) (1000000*((bigtime_t)t) / hz)
typedef void (*system_init_func_t)(void *);
struct __system_init {
system_init_func_t func;
};
/* TODO implement SYSINIT/SYSUNINIT subsystem */
#define SYSINIT(uniquifier, subsystem, order, func, ident) \
struct __system_init __init_##uniquifier = { (system_init_func_t) func }
#define SYSUNINIT(uniquifier, subsystem, order, func, ident) \
struct __system_init __uninit_##uniquifier = { (system_init_func_t) func }
#define TUNABLE_INT(path, var)
#define TUNABLE_INT_FETCH(path, var)
extern int ticks;
#endif
@@ -0,0 +1,196 @@
/*-
* Copyright (c) 1996 Berkeley Software Design, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Berkeley Software Design Inc's name may not be used to endorse or
* promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from BSDI $Id: ktr.h,v 1.10.2.7 2000/03/16 21:44:42 cp Exp $
* $FreeBSD: src/sys/sys/ktr.h,v 1.32.2.2 2006/01/23 14:56:33 marius Exp $
*/
/*
* Wraparound kernel trace buffer support.
*/
#ifndef _SYS_KTR_H_
#define _SYS_KTR_H_
/*
* Trace classes
*/
#define KTR_GEN 0x00000001 /* General (TR) */
#define KTR_NET 0x00000002 /* Network */
#define KTR_DEV 0x00000004 /* Device driver */
#define KTR_LOCK 0x00000008 /* MP locking */
#define KTR_SMP 0x00000010 /* MP general */
#define KTR_FS 0x00000020 /* Filesystem */
#define KTR_PMAP 0x00000040 /* Pmap tracing */
#define KTR_MALLOC 0x00000080 /* Malloc tracing */
#define KTR_TRAP 0x00000100 /* Trap processing */
#define KTR_INTR 0x00000200 /* Interrupt tracing */
#define KTR_SIG 0x00000400 /* Signal processing */
#define KTR_CLK 0x00000800 /* hardclock verbose */
#define KTR_PROC 0x00001000 /* Process scheduling */
#define KTR_SYSC 0x00002000 /* System call */
#define KTR_INIT 0x00004000 /* System initialization */
#define KTR_KGDB 0x00008000 /* Trace kgdb internals */
#define KTR_IO 0x00010000 /* Upper I/O */
#define KTR_EVH 0x00020000 /* Eventhandler */
#define KTR_VFS 0x00040000 /* VFS events */
#define KTR_VOP 0x00080000 /* Auto-generated vop events */
#define KTR_VM 0x00100000 /* The virtual memory system */
#define KTR_WITNESS 0x00200000
#define KTR_RUNQ 0x00400000 /* Run queue */
#define KTR_CONTENTION 0x00800000 /* Lock contention */
#define KTR_UMA 0x01000000 /* UMA slab allocator */
#define KTR_CALLOUT 0x02000000 /* Callouts and timeouts */
#define KTR_GEOM 0x04000000 /* GEOM I/O events */
#define KTR_BUSDMA 0x08000000 /* busdma(9) events */
#define KTR_CRITICAL 0x10000000 /* Critical sections */
#define KTR_SCHED 0x20000000 /* Machine parsed sched info. */
#define KTR_BUF 0x40000000 /* Buffer cache */
#define KTR_ALL 0x7fffffff
/*
* Trace classes which can be assigned to particular use at compile time
* These must remain in high 22 as some assembly code counts on it
*/
#define KTR_CT1 0x01000000
#define KTR_CT2 0x02000000
#define KTR_CT3 0x04000000
#define KTR_CT4 0x08000000
#define KTR_CT5 0x10000000
#define KTR_CT6 0x20000000
#define KTR_CT7 0x40000000
#define KTR_CT8 0x80000000
/* Trace classes to compile in */
#ifdef KTR
#ifndef KTR_COMPILE
#define KTR_COMPILE (KTR_ALL)
#endif
#else /* !KTR */
#undef KTR_COMPILE
#define KTR_COMPILE 0
#endif /* KTR */
/* Trace classes that can not be used with KTR_ALQ */
#define KTR_ALQ_MASK (KTR_WITNESS)
/*
* Version number for ktr_entry struct. Increment this when you break binary
* compatibility.
*/
#define KTR_VERSION 2
#define KTR_PARMS 6
#ifndef LOCORE
struct ktr_entry {
u_int64_t ktr_timestamp;
int ktr_cpu;
int ktr_line;
const char *ktr_file;
const char *ktr_desc;
struct thread *ktr_thread;
u_long ktr_parms[KTR_PARMS];
};
extern int ktr_cpumask;
extern int ktr_mask;
extern int ktr_entries;
extern int ktr_verbose;
extern volatile int ktr_idx;
extern struct ktr_entry ktr_buf[];
#ifdef KTR
#if 0
void ktr_tracepoint(u_int mask, const char *file, int line,
const char *format, u_long arg1, u_long arg2, u_long arg3,
u_long arg4, u_long arg5, u_long arg6);
#else
extern void driver_printf(const char *format, ...);
#define ktr_tracepoint(mask, file, line, format, arg1, arg2, arg3, arg4, arg5, arg6) \
driver_printf("(%s:%i) " format "\n", file, line, arg1, arg2, arg3, arg4, arg5, arg6)
#endif
#define CTR6(m, format, p1, p2, p3, p4, p5, p6) do { \
if (KTR_COMPILE & (m)) \
ktr_tracepoint((m), __FILE__, __LINE__, format, \
(u_long)(p1), (u_long)(p2), (u_long)(p3), \
(u_long)(p4), (u_long)(p5), (u_long)(p6)); \
} while(0)
#define CTR0(m, format) CTR6(m, format, 0, 0, 0, 0, 0, 0)
#define CTR1(m, format, p1) CTR6(m, format, p1, 0, 0, 0, 0, 0)
#define CTR2(m, format, p1, p2) CTR6(m, format, p1, p2, 0, 0, 0, 0)
#define CTR3(m, format, p1, p2, p3) CTR6(m, format, p1, p2, p3, 0, 0, 0)
#define CTR4(m, format, p1, p2, p3, p4) CTR6(m, format, p1, p2, p3, p4, 0, 0)
#define CTR5(m, format, p1, p2, p3, p4, p5) CTR6(m, format, p1, p2, p3, p4, p5, 0)
#else /* KTR */
#define CTR0(m, d)
#define CTR1(m, d, p1)
#define CTR2(m, d, p1, p2)
#define CTR3(m, d, p1, p2, p3)
#define CTR4(m, d, p1, p2, p3, p4)
#define CTR5(m, d, p1, p2, p3, p4, p5)
#define CTR6(m, d, p1, p2, p3, p4, p5, p6)
#endif /* KTR */
#define TR0(d) CTR0(KTR_GEN, d)
#define TR1(d, p1) CTR1(KTR_GEN, d, p1)
#define TR2(d, p1, p2) CTR2(KTR_GEN, d, p1, p2)
#define TR3(d, p1, p2, p3) CTR3(KTR_GEN, d, p1, p2, p3)
#define TR4(d, p1, p2, p3, p4) CTR4(KTR_GEN, d, p1, p2, p3, p4)
#define TR5(d, p1, p2, p3, p4, p5) CTR5(KTR_GEN, d, p1, p2, p3, p4, p5)
#define TR6(d, p1, p2, p3, p4, p5, p6) CTR6(KTR_GEN, d, p1, p2, p3, p4, p5, p6)
/*
* Trace initialization events, similar to CTR with KTR_INIT, but
* completely ifdef'ed out if KTR_INIT isn't in KTR_COMPILE (to
* save string space, the compiler doesn't optimize out strings
* for the conditional ones above).
*/
#if (KTR_COMPILE & KTR_INIT) != 0
#define ITR0(d) CTR0(KTR_INIT, d)
#define ITR1(d, p1) CTR1(KTR_INIT, d, p1)
#define ITR2(d, p1, p2) CTR2(KTR_INIT, d, p1, p2)
#define ITR3(d, p1, p2, p3) CTR3(KTR_INIT, d, p1, p2, p3)
#define ITR4(d, p1, p2, p3, p4) CTR4(KTR_INIT, d, p1, p2, p3, p4)
#define ITR5(d, p1, p2, p3, p4, p5) CTR5(KTR_INIT, d, p1, p2, p3, p4, p5)
#define ITR6(d, p1, p2, p3, p4, p5, p6) CTR6(KTR_INIT, d, p1, p2, p3, p4, p5, p6)
#else
#define ITR0(d)
#define ITR1(d, p1)
#define ITR2(d, p1, p2)
#define ITR3(d, p1, p2, p3)
#define ITR4(d, p1, p2, p3, p4)
#define ITR5(d, p1, p2, p3, p4, p5)
#define ITR6(d, p1, p2, p3, p4, p5, p6)
#endif
#endif /* !LOCORE */
#endif /* !_SYS_KTR_H_ */
@@ -0,0 +1,20 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_LIBKERN_H_
#define _FBSD_COMPAT_SYS_LIBKERN_H_
#include <sys/cdefs.h>
#include <sys/types.h>
extern int random(void);
uint32_t arc4random(void);
static __inline int imax(int a, int b) { return (a > b ? a : b); }
extern int abs(int a);
#endif /* _FBSD_COMPAT_SYS_LIBKERN_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_LIMITS_H_
#define _FBSD_COMPAT_SYS_LIMITS_H_
#endif /* _FBSD_COMPAT_SYS_LIMITS_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_LINKER_H_
#define _FBSD_COMPAT_SYS_LINKER_H_
#endif /* _FBSD_COMPAT_SYS_LINKER_H_ */
@@ -0,0 +1,64 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_LINKER_SET_H_
#define _FBSD_COMPAT_SYS_LINKER_SET_H_
#ifndef _FBSD_COMPAT_SYS_CDEFS_H_
#error this file needs sys/cdefs.h as a prerequisite
#endif
/*
* The following macros are used to declare global sets of objects, which
* are collected by the linker into a `linker_set' as defined below.
* For ELF, this is done by constructing a separate segment for each set.
*/
/*
* Private macros, not to be used outside this header file.
*/
#ifdef __GNUCLIKE___SECTION
#define __MAKE_SET(set, sym) \
static void const * const __set_##set##_sym_##sym \
__section("set_" #set) __used = &sym
#else /* !__GNUCLIKE___SECTION */
#ifndef lint
#error this file needs to be ported to your compiler
#endif /* lint */
#define __MAKE_SET(set, sym) extern void const * const (__set_##set##_sym_##sym)
#endif /* __GNUCLIKE___SECTION */
/*
* Public macros.
*/
#define TEXT_SET(set, sym) __MAKE_SET(set, sym)
#define DATA_SET(set, sym) __MAKE_SET(set, sym)
#define BSS_SET(set, sym) __MAKE_SET(set, sym)
#define ABS_SET(set, sym) __MAKE_SET(set, sym)
#define SET_ENTRY(set, sym) __MAKE_SET(set, sym)
/*
* Initialize before referring to a given linker set.
*/
#define SET_DECLARE(set, ptype) \
extern ptype *__CONCAT(__start_set_,set); \
extern ptype *__CONCAT(__stop_set_,set)
#define SET_BEGIN(set) \
(&__CONCAT(__start_set_,set))
#define SET_LIMIT(set) \
(&__CONCAT(__stop_set_,set))
/*
* Iterate over all the elements of a set.
*
* Sets always contain addresses of things, and "pvar" points to words
* containing those addresses. Thus is must be declared as "type **pvar",
* and the address of each set item is obtained inside the loop by "*pvar".
*/
#define SET_FOREACH(pvar, set) \
for (pvar = SET_BEGIN(set); pvar < SET_LIMIT(set); pvar++)
#endif /* _FBSD_COMPAT_SYS_LINKER_SET_H_ */
@@ -0,0 +1,67 @@
/*
* Copyright 2009, Colin Günther, [email protected].
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_MALLOC_H_
#define _FBSD_COMPAT_SYS_MALLOC_H_
#include <malloc.h>
#include <vm/vm.h>
#include <sys/param.h>
#include <sys/queue.h>
#include <sys/_mutex.h>
/*
* flags to malloc.
*/
#define M_NOWAIT 0x0001
#define M_WAITOK 0x0002
#define M_ZERO 0x0100
#define M_MAGIC 877983977 /* time when first defined :-) */
#define M_DEVBUF
void *_kernel_malloc(size_t size, int flags);
void _kernel_free(void *ptr);
void *_kernel_contigmalloc(const char *file, int line, size_t size, int flags,
vm_paddr_t low, vm_paddr_t high, unsigned long alignment,
unsigned long boundary);
void _kernel_contigfree(void *addr, unsigned long size);
#define kernel_malloc(size, base, flags) \
_kernel_malloc(size, flags)
#define kernel_free(ptr, base) \
_kernel_free(ptr)
#define kernel_contigmalloc(size, type, flags, low, high, alignment, boundary) \
_kernel_contigmalloc(__FILE__, __LINE__, size, flags, low, high, \
alignment, boundary)
#define kernel_contigfree(addr, size, base) \
_kernel_contigfree(addr, size)
#ifdef FBSD_DRIVER
# define malloc(size, tag, flags) kernel_malloc(size, tag, flags)
# define free(pointer, tag) kernel_free(pointer, tag)
# define contigmalloc(size, type, flags, low, high, alignment, boundary) \
_kernel_contigmalloc(__FILE__, __LINE__, size, flags, low, high, \
alignment, boundary)
# define contigfree(addr, size, base) \
_kernel_contigfree(addr, size)
#endif
#define MALLOC_DEFINE(type, shortdesc, longdesc) int type[1]
#define MALLOC_DECLARE(type) \
extern int type[1]
#endif /* _FBSD_COMPAT_SYS_MALLOC_H_ */
@@ -0,0 +1,117 @@
/*-
* Copyright (c) 1982, 1986, 1988, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)mbuf.h 8.5 (Berkeley) 2/19/95
* $FreeBSD: src/sys/sys/mbuf.h,v 1.170.2.6 2006/03/23 23:24:32 sam Exp $
*/
#ifndef _FBSD_COMPAT_SYS_MBUF_FBSD_H_
#define _FBSD_COMPAT_SYS_MBUF_FBSD_H_
/*
* Set the m_data pointer of a newly-allocated mbuf (m_get/MGET) to place
* an object of the specified size at the end of the mbuf, longword aligned.
*/
#define M_ALIGN(m, len) do { \
(m)->m_data += (MLEN - (len)) & ~(sizeof(long) - 1); \
} while (0)
/*
* As above, for mbufs allocated with m_gethdr/MGETHDR
* or initialized by M_COPY_PKTHDR.
*/
#define MH_ALIGN(m, len) do { \
(m)->m_data += (MHLEN - (len)) & ~(sizeof(long) - 1); \
} while (0)
/*
#define MEXT_IS_REF(m) (((m)->m_ext.ref_cnt != NULL) \
&& (*((m)->m_ext.ref_cnt) > 1))
*/
#define MEXT_IS_REF(m) 0
/*
* Evaluate TRUE if it's safe to write to the mbuf m's data region (this
* can be both the local data payload, or an external buffer area,
* depending on whether M_EXT is set).
*/
/*
#define M_WRITABLE(m) (!((m)->m_flags & M_RDONLY) && (!((m)->m_flags \
& M_EXT) || !MEXT_IS_REF(m)))
*/
#define M_WRITABLE(m) (!((m)->m_flags & M_EXT) || !MEXT_IS_REF(m))
/*
* Compute the amount of space available
* before the current start of data in an mbuf.
*
* The M_WRITABLE() is a temporary, conservative safety measure: the burden
* of checking writability of the mbuf data area rests solely with the caller.
*/
#define M_LEADINGSPACE(m) \
((m)->m_flags & M_EXT ? \
(M_WRITABLE(m) ? (m)->m_data - (m)->m_ext.ext_buf : 0): \
(m)->m_flags & M_PKTHDR ? (m)->m_data - (m)->m_pktdat : \
(m)->m_data - (m)->m_dat)
/*
* Compute the amount of space available after the end of data in an mbuf.
*
* The M_WRITABLE() is a temporary, conservative safety measure: the burden
* of checking writability of the mbuf data area rests solely with the caller.
*/
#define M_TRAILINGSPACE(m) \
((m)->m_flags & M_EXT ? \
(M_WRITABLE(m) ? (m)->m_ext.ext_buf + (m)->m_ext.ext_size \
- ((m)->m_data + (m)->m_len) : 0) : \
&(m)->m_dat[MLEN] - ((m)->m_data + (m)->m_len))
/*
* Arrange to prepend space of size plen to mbuf m.
* If a new mbuf must be allocated, how specifies whether to wait.
* If the allocation fails, the original mbuf chain is freed and m is
* set to NULL.
*/
#define M_PREPEND(m, plen, how) do { \
struct mbuf **_mmp = &(m); \
struct mbuf *_mm = *_mmp; \
int _mplen = (plen); \
int __mhow = (how); \
\
MBUF_CHECKSLEEP(how); \
if (M_LEADINGSPACE(_mm) >= _mplen) { \
_mm->m_data -= _mplen; \
_mm->m_len += _mplen; \
} else \
_mm = m_prepend(_mm, _mplen, __mhow); \
if (_mm != NULL && _mm->m_flags & M_PKTHDR) \
_mm->m_pkthdr.len += _mplen; \
*_mmp = _mm; \
} while (0)
#endif
@@ -0,0 +1,227 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_MBUF_H_
#define _FBSD_COMPAT_SYS_MBUF_H_
#include <sys/queue.h>
#include <sys/systm.h>
#include <vm/uma.h>
#define MLEN ((int)(MSIZE - sizeof(struct m_hdr)))
#define MHLEN ((int)(MLEN - sizeof(struct pkthdr)))
#define MINCLSIZE (MHLEN + 1)
#define MBTOM(how) (how)
#define M_DONTWAIT M_NOWAIT
#define M_TRYWAIT M_WAITOK
#define M_WAIT M_WAITOK
#define MT_DATA 1
#define M_EXT 0x00000001
#define M_PKTHDR 0x00000002
#define M_RDONLY 0x00000008
#define M_PROTO1 0x00000010
#define M_PROTO2 0x00000020
#define M_PROTO3 0x00000040
#define M_PROTO4 0x00000080
#define M_PROTO5 0x00000100
#define M_BCAST 0x00000200
#define M_MCAST 0x00000400
#define M_FRAG 0x00000800
#define M_FIRSTFRAG 0x00001000
#define M_LASTFRAG 0x00002000
#define M_VLANTAG 0x00010000
#define M_PROTO6 0x00080000
#define M_PROTO7 0x00100000
#define M_PROTO8 0x00200000
#define M_COPYFLAGS (M_PKTHDR | M_RDONLY | M_BCAST | M_MCAST | M_FRAG \
| M_FIRSTFRAG | M_LASTFRAG | M_VLANTAG)
// Flags preserved when copying m_pkthdr
#define M_MOVE_PKTHDR(to, from) m_move_pkthdr((to), (from))
#define MGET(m, how, type) ((m) = m_get((how), (type)))
#define MGETHDR(m, how, type) ((m) = m_gethdr((how), (type)))
#define MCLGET(m, how) m_clget((m), (how))
#define mtod(m, type) ((type)((m)->m_data))
// Check if the supplied mbuf has a packet header, or else panic.
#define M_ASSERTPKTHDR(m) KASSERT(m != NULL && m->m_flags & M_PKTHDR, \
("%s: no mbuf packet header!", __func__))
#define MBUF_CHECKSLEEP(how) do { } while (0)
#define MTAG_PERSISTENT 0x800
#define EXT_CLUSTER 1 // 2048 bytes
#define EXT_JUMBOP 4 // Page size
#define EXT_JUMBO9 5 // 9 * 1024 bytes
#define EXT_NET_DRV 100 // custom ext_buf provided by net driver
#define CSUM_IP 0x0001
#define CSUM_TCP 0x0002
#define CSUM_UDP 0x0004
#define CSUM_TSO 0x0020
#define CSUM_IP_CHECKED 0x0100
#define CSUM_IP_VALID 0x0200
#define CSUM_DATA_VALID 0x0400
#define CSUM_PSEUDO_HDR 0x0800
#define CSUM_DELAY_DATA (CSUM_TCP | CSUM_UDP)
#define MEXTADD(m, buf, size, free, arg1, arg2, flags, type) \
m_extadd((m), (caddr_t)(buf), (size), (free),(arg1),(arg2),(flags), (type))
extern int max_linkhdr;
extern int max_protohdr;
extern int max_hdr;
extern int max_datalen; // MHLEN - max_hdr
struct m_hdr {
struct mbuf* mh_next;
struct mbuf* mh_nextpkt;
caddr_t mh_data;
int mh_len;
int mh_flags;
short mh_type;
};
struct pkthdr {
struct ifnet* rcvif;
int len;
int csum_flags;
int csum_data;
uint16_t tso_segsz;
uint16_t ether_vtag;
SLIST_HEAD(packet_tags, m_tag) tags;
};
struct m_tag {
SLIST_ENTRY(m_tag) m_tag_link; // List of packet tags
u_int16_t m_tag_id; // Tag ID
u_int16_t m_tag_len; // Length of data
u_int32_t m_tag_cookie; // ABI/Module ID
void (*m_tag_free)(struct m_tag*);
};
struct m_ext {
caddr_t ext_buf;
unsigned int ext_size;
int ext_type;
};
struct mbuf {
struct m_hdr m_hdr;
union {
struct {
struct pkthdr MH_pkthdr;
union {
struct m_ext MH_ext;
char MH_databuf[MHLEN];
} MH_dat;
} MH;
char M_databuf[MLEN];
} M_dat;
};
#define m_next m_hdr.mh_next
#define m_len m_hdr.mh_len
#define m_data m_hdr.mh_data
#define m_type m_hdr.mh_type
#define m_flags m_hdr.mh_flags
#define m_nextpkt m_hdr.mh_nextpkt
#define m_act m_nextpkt
#define m_pkthdr M_dat.MH.MH_pkthdr
#define m_ext M_dat.MH.MH_dat.MH_ext
#define m_pktdat M_dat.MH.MH_dat.MH_databuf
#define m_dat M_dat.M_databuf
void m_adj(struct mbuf*, int);
void m_align(struct mbuf*, int);
int m_append(struct mbuf*, int, c_caddr_t);
void m_cat(struct mbuf*, struct mbuf*);
void m_clget(struct mbuf*, int);
void* m_cljget(struct mbuf*, int, int);
struct mbuf* m_collapse(struct mbuf*, int, int);
void m_copyback(struct mbuf*, int, int, caddr_t);
void m_copydata(const struct mbuf*, int, int, caddr_t);
struct mbuf* m_copypacket(struct mbuf*, int);
struct mbuf* m_defrag(struct mbuf*, int);
struct mbuf* m_devget(char*, int, int, struct ifnet*,
void(*) (char*, caddr_t, u_int));
struct mbuf* m_dup(struct mbuf*, int);
int m_dup_pkthdr(struct mbuf*, struct mbuf*, int);
void m_extadd(struct mbuf*, caddr_t, u_int, void(*) (void*, void*),
void*, void*, int, int);
u_int m_fixhdr(struct mbuf*);
struct mbuf* m_free(struct mbuf*);
void m_freem(struct mbuf*);
struct mbuf* m_get(int, short);
struct mbuf* m_gethdr(int, short);
struct mbuf* m_getjcl(int, short, int, int);
u_int m_length(struct mbuf*, struct mbuf**);
struct mbuf* m_getcl(int, short, int);
void m_move_pkthdr(struct mbuf*, struct mbuf*);
struct mbuf* m_prepend(struct mbuf*, int, int);
struct mbuf* m_pulldown(struct mbuf*, int, int, int*);
struct mbuf* m_pullup(struct mbuf*, int);
struct mbuf* m_split(struct mbuf*, int, int);
struct mbuf* m_unshare(struct mbuf*, int);
struct m_tag* m_tag_alloc(u_int32_t, int, int, int);
void m_tag_delete(struct mbuf*, struct m_tag*);
void m_tag_delete_chain(struct mbuf*, struct m_tag*);
void m_tag_free_default(struct m_tag*);
struct m_tag* m_tag_locate(struct mbuf*, u_int32_t, int, struct m_tag*);
struct m_tag* m_tag_copy(struct m_tag*, int);
int m_tag_copy_chain(struct mbuf*, struct mbuf*, int);
void m_tag_delete_nonpersistent(struct mbuf*);
static inline void
m_tag_setup(struct m_tag* tagPointer, u_int32_t cookie, int type, int length)
{
tagPointer->m_tag_id = type;
tagPointer->m_tag_len = length;
tagPointer->m_tag_cookie = cookie;
}
static inline void
m_tag_free(struct m_tag* tag)
{
(*tag->m_tag_free)(tag);
}
static inline void
m_tag_prepend(struct mbuf* memoryBuffer, struct m_tag* tag)
{
SLIST_INSERT_HEAD(&memoryBuffer->m_pkthdr.tags, tag, m_tag_link);
}
static inline void
m_tag_unlink(struct mbuf* memoryBuffer, struct m_tag* tag)
{
SLIST_REMOVE(&memoryBuffer->m_pkthdr.tags, tag, m_tag, m_tag_link);
}
#include <sys/mbuf-fbsd.h>
#endif /* _FBSD_COMPAT_SYS_MBUF_H_ */
@@ -0,0 +1,23 @@
#ifndef _FBSD_COMPAT_SYS_MODULE_H_
#define _FBSD_COMPAT_SYS_MODULE_H_
#include <sys/linker_set.h>
typedef struct module* module_t;
typedef enum modeventtype {
MOD_LOAD,
MOD_UNLOAD,
MOD_SHUTDOWN,
MOD_QUIESCE
} modeventtype_t;
#define DECLARE_MODULE(name, data, sub, order)
#define MODULE_VERSION(name, version)
#define MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
#endif
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_MOUNT_H_
#define _FBSD_COMPAT_SYS_MOUNT_H_
#endif /* _FBSD_COMPAT_SYS_MOUNT_H_ */
@@ -0,0 +1,92 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_MUTEX_H_
#define _FBSD_COMPAT_SYS_MUTEX_H_
#include <sys/haiku-module.h>
#include <sys/queue.h>
#include <sys/_mutex.h>
#include <sys/pcpu.h>
#include <machine/atomic.h>
#include <machine/cpufunc.h>
#define MA_OWNED 0x1
#define MA_NOTOWNED 0x2
#define MA_RECURSED 0x4
#define MA_NOTRECURSED 0x8
#define mtx_assert(mtx, what)
#define MTX_DEF 0x0000
#define MTX_RECURSE 0x0004
#define MTX_QUIET 0x40000
#define MTX_DUPOK 0x400000
#define MTX_NETWORK_LOCK "network driver"
#define NET_LOCK_GIANT()
#define NET_UNLOCK_GIANT()
extern struct mtx Giant;
void mtx_init(struct mtx*, const char*, const char*, int);
void mtx_destroy(struct mtx*);
static inline void
mtx_lock(struct mtx* mutex)
{
if (mutex->type == MTX_DEF) {
mutex_lock(&mutex->u.mutex.lock);
mutex->u.mutex.owner = find_thread(NULL);
} else if (mutex->type == MTX_RECURSE)
recursive_lock_lock(&mutex->u.recursive);
}
static inline void
mtx_unlock(struct mtx* mutex)
{
if (mutex->type == MTX_DEF) {
mutex->u.mutex.owner = -1;
mutex_unlock(&mutex->u.mutex.lock);
} else if (mutex->type == MTX_RECURSE)
recursive_lock_unlock(&mutex->u.recursive);
}
static inline int
mtx_initialized(struct mtx* mutex)
{
/* TODO */
return 1;
}
static inline int
mtx_owned(struct mtx* mutex)
{
if (mutex->type == MTX_DEF)
return mutex->u.mutex.owner == find_thread(NULL);
if (mutex->type == MTX_RECURSE) {
#if KDEBUG
return mutex->u.recursive.lock.holder == find_thread(NULL);
#else
return mutex->u.recursive.holder == find_thread(NULL);
#endif
}
return 0;
}
#endif /* _FBSD_COMPAT_SYS_MUTEX_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_NAMEI_H_
#define _FBSD_COMPAT_SYS_NAMEI_H_
#endif /* _FBSD_COMPAT_SYS_NAMEI_H_ */
@@ -0,0 +1,75 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_PARAM_H_
#define _FBSD_COMPAT_SYS_PARAM_H_
#include <posix/sys/param.h>
#include <sys/types.h>
#include <sys/cdefs.h>
#include <sys/errno.h>
#include <sys/time.h>
#include <sys/priority.h>
/* The version this compatibility layer is based on */
#define __FreeBSD_version 800107
#define MAXBSIZE 0x10000
#define PAGE_SHIFT 12
#define PAGE_MASK (PAGE_SIZE - 1)
#define trunc_page(x) ((x) & ~PAGE_MASK)
#define ptoa(x) ((unsigned long)((x) << PAGE_SHIFT))
#define atop(x) ((unsigned long)((x) >> PAGE_SHIFT))
/* MAJOR FIXME */
#define Maxmem (32768)
#ifndef MSIZE
#define MSIZE 256
#endif
#ifndef MCLSHIFT
#define MCLSHIFT 11
#endif
#define MCLBYTES (1 << MCLSHIFT)
#define MJUMPAGESIZE PAGE_SIZE
#define MJUM9BYTES (9 * 1024)
#define MJUM16BYTES (16 * 1024)
#define ALIGN_BYTES (sizeof(unsigned long) - 1)
#define ALIGN(x) ((((unsigned long)x) + ALIGN_BYTES) & ~ALIGN_BYTES)
/* Macros for counting and rounding. */
#ifndef howmany
#define howmany(x, y) (((x)+((y)-1))/(y))
#endif
#define roundup(x, y) ((((x)+((y)-1))/(y))*(y)) /* to any y */
#define roundup2(x, y) (((x) + ((y) - 1)) & (~((y) - 1)))
#define rounddown(x, y) (((x) / (y)) * (y))
#define PRIMASK 0x0ff
#define PCATCH 0x100
#define PDROP 0x200
#define PBDRY 0x400
#define NBBY 8 /* number of bits in a byte */
/* Bit map related macros. */
#define setbit(a,i) (((unsigned char *)(a))[(i)/NBBY] |= 1<<((i)%NBBY))
#define clrbit(a,i) (((unsigned char *)(a))[(i)/NBBY] &= ~(1<<((i)%NBBY)))
#define isset(a,i) \
(((const unsigned char *)(a))[(i)/NBBY] & (1<<((i)%NBBY)))
#define isclr(a,i) \
((((const unsigned char *)(a))[(i)/NBBY] & (1<<((i)%NBBY))) == 0)
#endif /* _FBSD_COMPAT_SYS_PARAM_H_ */
@@ -0,0 +1,22 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_PCPU_H_
#define _FBSD_COMPAT_SYS_PCPU_H_
#include <OS.h>
struct thread;
#define curthread ((struct thread*)NULL)
/* NOTE: Dereferencing curthread will crash, which is intentional. There is
no FreeBSD compatible struct thread and Haiku's should not be used as it
is only valid for the current thread or with proper locking. Currently
only priv_check() expects a struct thread parameter and ignores it. Using
NULL will show us when other uses appear. */
#endif /* _FBSD_COMPAT_SYS_PCPU_H_ */
@@ -0,0 +1,12 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_PRIORITY_H_
#define _FBSD_COMPAT_SYS_PRIORITY_H_
#define PRI_MIN_KERN (64)
#define PZERO (PRI_MIN_KERN + 20)
#endif /* _FBSD_COMPAT_SYS_PRIORITY_H_ */
@@ -0,0 +1,38 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_PRIV_H_
#define _FBSD_COMPAT_SYS_PRIV_H_
#include <sys/cdefs.h>
/*
* 802.11-related privileges.
*/
#define PRIV_NET80211_GETKEY 440 /* Query 802.11 keys. */
#define PRIV_NET80211_MANAGE 441 /* Administer 802.11. */
#define PRIV_DRIVER 14 /* Low-level driver privilege. */
/*
* Privilege check interfaces, modeled after historic suser() interfacs, but
* with the addition of a specific privilege name. No flags are currently
* defined for the API. Historically, flags specified using the real uid
* instead of the effective uid, and whether or not the check should be
* allowed in jail.
*/
struct thread;
__BEGIN_DECLS
int priv_check(struct thread*, int);
__END_DECLS
#endif /* _FBSD_COMPAT_SYS_PRIV_H_ */
@@ -0,0 +1,9 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_PROC_H_
#define _FBSD_COMPAT_SYS_PROC_H_
#endif /* _FBSD_COMPAT_SYS_PROC_H_ */
@@ -0,0 +1,552 @@
/*-
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)queue.h 8.5 (Berkeley) 8/20/94
* $FreeBSD: src/sys/sys/queue.h,v 1.60.2.1 2005/08/16 22:41:39 phk Exp $
*/
#ifndef _SYS_QUEUE_H_
#define _SYS_QUEUE_H_
#include <sys/cdefs.h>
/*
* This file defines four types of data structures: singly-linked lists,
* singly-linked tail queues, lists and tail queues.
*
* A singly-linked list is headed by a single forward pointer. The elements
* are singly linked for minimum space and pointer manipulation overhead at
* the expense of O(n) removal for arbitrary elements. New elements can be
* added to the list after an existing element or at the head of the list.
* Elements being removed from the head of the list should use the explicit
* macro for this purpose for optimum efficiency. A singly-linked list may
* only be traversed in the forward direction. Singly-linked lists are ideal
* for applications with large datasets and few or no removals or for
* implementing a LIFO queue.
*
* A singly-linked tail queue is headed by a pair of pointers, one to the
* head of the list and the other to the tail of the list. The elements are
* singly linked for minimum space and pointer manipulation overhead at the
* expense of O(n) removal for arbitrary elements. New elements can be added
* to the list after an existing element, at the head of the list, or at the
* end of the list. Elements being removed from the head of the tail queue
* should use the explicit macro for this purpose for optimum efficiency.
* A singly-linked tail queue may only be traversed in the forward direction.
* Singly-linked tail queues are ideal for applications with large datasets
* and few or no removals or for implementing a FIFO queue.
*
* A list is headed by a single forward pointer (or an array of forward
* pointers for a hash table header). The elements are doubly linked
* so that an arbitrary element can be removed without a need to
* traverse the list. New elements can be added to the list before
* or after an existing element or at the head of the list. A list
* may only be traversed in the forward direction.
*
* A tail queue is headed by a pair of pointers, one to the head of the
* list and the other to the tail of the list. The elements are doubly
* linked so that an arbitrary element can be removed without a need to
* traverse the list. New elements can be added to the list before or
* after an existing element, at the head of the list, or at the end of
* the list. A tail queue may be traversed in either direction.
*
* For details on the use of these macros, see the queue(3) manual page.
*
*
* SLIST LIST STAILQ TAILQ
* _HEAD + + + +
* _HEAD_INITIALIZER + + + +
* _ENTRY + + + +
* _INIT + + + +
* _EMPTY + + + +
* _FIRST + + + +
* _NEXT + + + +
* _PREV - - - +
* _LAST - - + +
* _FOREACH + + + +
* _FOREACH_SAFE + + + +
* _FOREACH_REVERSE - - - +
* _FOREACH_REVERSE_SAFE - - - +
* _INSERT_HEAD + + + +
* _INSERT_BEFORE - + - +
* _INSERT_AFTER + + + +
* _INSERT_TAIL - - + +
* _CONCAT - - + +
* _REMOVE_HEAD + - + -
* _REMOVE + + + +
*
*/
#define QUEUE_MACRO_DEBUG 0
#if QUEUE_MACRO_DEBUG
/* Store the last 2 places the queue element or head was altered */
struct qm_trace {
char * lastfile;
int lastline;
char * prevfile;
int prevline;
};
#define TRACEBUF struct qm_trace trace;
#define TRASHIT(x) do {(x) = (void *)-1;} while (0)
#define QMD_TRACE_HEAD(head) do { \
(head)->trace.prevline = (head)->trace.lastline; \
(head)->trace.prevfile = (head)->trace.lastfile; \
(head)->trace.lastline = __LINE__; \
(head)->trace.lastfile = __FILE__; \
} while (0)
#define QMD_TRACE_ELEM(elem) do { \
(elem)->trace.prevline = (elem)->trace.lastline; \
(elem)->trace.prevfile = (elem)->trace.lastfile; \
(elem)->trace.lastline = __LINE__; \
(elem)->trace.lastfile = __FILE__; \
} while (0)
#else
#define QMD_TRACE_ELEM(elem)
#define QMD_TRACE_HEAD(head)
#define TRACEBUF
#define TRASHIT(x)
#endif /* QUEUE_MACRO_DEBUG */
/*
* Singly-linked List declarations.
*/
#define SLIST_HEAD(name, type) \
struct name { \
struct type *slh_first; /* first element */ \
}
#define SLIST_HEAD_INITIALIZER(head) \
{ NULL }
#define SLIST_ENTRY(type) \
struct { \
struct type *sle_next; /* next element */ \
}
/*
* Singly-linked List functions.
*/
#define SLIST_EMPTY(head) ((head)->slh_first == NULL)
#define SLIST_FIRST(head) ((head)->slh_first)
#define SLIST_FOREACH(var, head, field) \
for ((var) = SLIST_FIRST((head)); \
(var); \
(var) = SLIST_NEXT((var), field))
#define SLIST_FOREACH_SAFE(var, head, field, tvar) \
for ((var) = SLIST_FIRST((head)); \
(var) && ((tvar) = SLIST_NEXT((var), field), 1); \
(var) = (tvar))
#define SLIST_FOREACH_PREVPTR(var, varp, head, field) \
for ((varp) = &SLIST_FIRST((head)); \
((var) = *(varp)) != NULL; \
(varp) = &SLIST_NEXT((var), field))
#define SLIST_INIT(head) do { \
SLIST_FIRST((head)) = NULL; \
} while (0)
#define SLIST_INSERT_AFTER(slistelm, elm, field) do { \
SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field); \
SLIST_NEXT((slistelm), field) = (elm); \
} while (0)
#define SLIST_INSERT_HEAD(head, elm, field) do { \
SLIST_NEXT((elm), field) = SLIST_FIRST((head)); \
SLIST_FIRST((head)) = (elm); \
} while (0)
#define SLIST_NEXT(elm, field) ((elm)->field.sle_next)
#define SLIST_REMOVE(head, elm, type, field) do { \
if (SLIST_FIRST((head)) == (elm)) { \
SLIST_REMOVE_HEAD((head), field); \
} \
else { \
struct type *curelm = SLIST_FIRST((head)); \
while (SLIST_NEXT(curelm, field) != (elm)) \
curelm = SLIST_NEXT(curelm, field); \
SLIST_NEXT(curelm, field) = \
SLIST_NEXT(SLIST_NEXT(curelm, field), field); \
} \
} while (0)
#define SLIST_REMOVE_HEAD(head, field) do { \
SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field); \
} while (0)
/*
* Singly-linked Tail queue declarations.
*/
#define STAILQ_HEAD(name, type) \
struct name { \
struct type *stqh_first;/* first element */ \
struct type **stqh_last;/* addr of last next element */ \
}
#define STAILQ_HEAD_INITIALIZER(head) \
{ NULL, &(head).stqh_first }
#define STAILQ_ENTRY(type) \
struct { \
struct type *stqe_next; /* next element */ \
}
/*
* Singly-linked Tail queue functions.
*/
#define STAILQ_CONCAT(head1, head2) do { \
if (!STAILQ_EMPTY((head2))) { \
*(head1)->stqh_last = (head2)->stqh_first; \
(head1)->stqh_last = (head2)->stqh_last; \
STAILQ_INIT((head2)); \
} \
} while (0)
#define STAILQ_EMPTY(head) ((head)->stqh_first == NULL)
#define STAILQ_FIRST(head) ((head)->stqh_first)
#define STAILQ_FOREACH(var, head, field) \
for((var) = STAILQ_FIRST((head)); \
(var); \
(var) = STAILQ_NEXT((var), field))
#define STAILQ_FOREACH_SAFE(var, head, field, tvar) \
for ((var) = STAILQ_FIRST((head)); \
(var) && ((tvar) = STAILQ_NEXT((var), field), 1); \
(var) = (tvar))
#define STAILQ_INIT(head) do { \
STAILQ_FIRST((head)) = NULL; \
(head)->stqh_last = &STAILQ_FIRST((head)); \
} while (0)
#define STAILQ_INSERT_AFTER(head, tqelm, elm, field) do { \
if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
STAILQ_NEXT((tqelm), field) = (elm); \
} while (0)
#define STAILQ_INSERT_HEAD(head, elm, field) do { \
if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL) \
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
STAILQ_FIRST((head)) = (elm); \
} while (0)
#define STAILQ_INSERT_TAIL(head, elm, field) do { \
STAILQ_NEXT((elm), field) = NULL; \
*(head)->stqh_last = (elm); \
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
} while (0)
#define STAILQ_LAST(head, type, field) \
(STAILQ_EMPTY((head)) ? \
NULL : \
((struct type *) \
((char *)((head)->stqh_last) - __offsetof(struct type, field))))
#define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next)
#define STAILQ_REMOVE(head, elm, type, field) do { \
if (STAILQ_FIRST((head)) == (elm)) { \
STAILQ_REMOVE_HEAD((head), field); \
} \
else { \
struct type *curelm = STAILQ_FIRST((head)); \
while (STAILQ_NEXT(curelm, field) != (elm)) \
curelm = STAILQ_NEXT(curelm, field); \
if ((STAILQ_NEXT(curelm, field) = \
STAILQ_NEXT(STAILQ_NEXT(curelm, field), field)) == NULL)\
(head)->stqh_last = &STAILQ_NEXT((curelm), field);\
} \
} while (0)
#define STAILQ_REMOVE_HEAD(head, field) do { \
if ((STAILQ_FIRST((head)) = \
STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL) \
(head)->stqh_last = &STAILQ_FIRST((head)); \
} while (0)
#define STAILQ_REMOVE_HEAD_UNTIL(head, elm, field) do { \
if ((STAILQ_FIRST((head)) = STAILQ_NEXT((elm), field)) == NULL) \
(head)->stqh_last = &STAILQ_FIRST((head)); \
} while (0)
/*
* List declarations.
*/
#define LIST_HEAD(name, type) \
struct name { \
struct type *lh_first; /* first element */ \
}
#define LIST_HEAD_INITIALIZER(head) \
{ NULL }
#define LIST_ENTRY(type) \
struct { \
struct type *le_next; /* next element */ \
struct type **le_prev; /* address of previous next element */ \
}
/*
* List functions.
*/
#define LIST_EMPTY(head) ((head)->lh_first == NULL)
#define LIST_FIRST(head) ((head)->lh_first)
#define LIST_FOREACH(var, head, field) \
for ((var) = LIST_FIRST((head)); \
(var); \
(var) = LIST_NEXT((var), field))
#define LIST_FOREACH_SAFE(var, head, field, tvar) \
for ((var) = LIST_FIRST((head)); \
(var) && ((tvar) = LIST_NEXT((var), field), 1); \
(var) = (tvar))
#define LIST_INIT(head) do { \
LIST_FIRST((head)) = NULL; \
} while (0)
#define LIST_INSERT_AFTER(listelm, elm, field) do { \
if ((LIST_NEXT((elm), field) = LIST_NEXT((listelm), field)) != NULL)\
LIST_NEXT((listelm), field)->field.le_prev = \
&LIST_NEXT((elm), field); \
LIST_NEXT((listelm), field) = (elm); \
(elm)->field.le_prev = &LIST_NEXT((listelm), field); \
} while (0)
#define LIST_INSERT_BEFORE(listelm, elm, field) do { \
(elm)->field.le_prev = (listelm)->field.le_prev; \
LIST_NEXT((elm), field) = (listelm); \
*(listelm)->field.le_prev = (elm); \
(listelm)->field.le_prev = &LIST_NEXT((elm), field); \
} while (0)
#define LIST_INSERT_HEAD(head, elm, field) do { \
if ((LIST_NEXT((elm), field) = LIST_FIRST((head))) != NULL) \
LIST_FIRST((head))->field.le_prev = &LIST_NEXT((elm), field);\
LIST_FIRST((head)) = (elm); \
(elm)->field.le_prev = &LIST_FIRST((head)); \
} while (0)
#define LIST_NEXT(elm, field) ((elm)->field.le_next)
#define LIST_REMOVE(elm, field) do { \
if (LIST_NEXT((elm), field) != NULL) \
LIST_NEXT((elm), field)->field.le_prev = \
(elm)->field.le_prev; \
*(elm)->field.le_prev = LIST_NEXT((elm), field); \
} while (0)
/*
* Tail queue declarations.
*/
#define TAILQ_HEAD(name, type) \
struct name { \
struct type *tqh_first; /* first element */ \
struct type **tqh_last; /* addr of last next element */ \
TRACEBUF \
}
#define TAILQ_HEAD_INITIALIZER(head) \
{ NULL, &(head).tqh_first }
#define TAILQ_ENTRY(type) \
struct { \
struct type *tqe_next; /* next element */ \
struct type **tqe_prev; /* address of previous next element */ \
TRACEBUF \
}
/*
* Tail queue functions.
*/
#define TAILQ_CONCAT(head1, head2, field) do { \
if (!TAILQ_EMPTY(head2)) { \
*(head1)->tqh_last = (head2)->tqh_first; \
(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last; \
(head1)->tqh_last = (head2)->tqh_last; \
TAILQ_INIT((head2)); \
QMD_TRACE_HEAD(head1); \
QMD_TRACE_HEAD(head2); \
} \
} while (0)
#define TAILQ_EMPTY(head) ((head)->tqh_first == NULL)
#define TAILQ_FIRST(head) ((head)->tqh_first)
#define TAILQ_FOREACH(var, head, field) \
for ((var) = TAILQ_FIRST((head)); \
(var); \
(var) = TAILQ_NEXT((var), field))
#define TAILQ_FOREACH_SAFE(var, head, field, tvar) \
for ((var) = TAILQ_FIRST((head)); \
(var) && ((tvar) = TAILQ_NEXT((var), field), 1); \
(var) = (tvar))
#define TAILQ_FOREACH_REVERSE(var, head, headname, field) \
for ((var) = TAILQ_LAST((head), headname); \
(var); \
(var) = TAILQ_PREV((var), headname, field))
#define TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar) \
for ((var) = TAILQ_LAST((head), headname); \
(var) && ((tvar) = TAILQ_PREV((var), headname, field), 1); \
(var) = (tvar))
#define TAILQ_INIT(head) do { \
TAILQ_FIRST((head)) = NULL; \
(head)->tqh_last = &TAILQ_FIRST((head)); \
QMD_TRACE_HEAD(head); \
} while (0)
#define TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \
if ((TAILQ_NEXT((elm), field) = TAILQ_NEXT((listelm), field)) != NULL)\
TAILQ_NEXT((elm), field)->field.tqe_prev = \
&TAILQ_NEXT((elm), field); \
else { \
(head)->tqh_last = &TAILQ_NEXT((elm), field); \
QMD_TRACE_HEAD(head); \
} \
TAILQ_NEXT((listelm), field) = (elm); \
(elm)->field.tqe_prev = &TAILQ_NEXT((listelm), field); \
QMD_TRACE_ELEM(&(elm)->field); \
QMD_TRACE_ELEM(&listelm->field); \
} while (0)
#define TAILQ_INSERT_BEFORE(listelm, elm, field) do { \
(elm)->field.tqe_prev = (listelm)->field.tqe_prev; \
TAILQ_NEXT((elm), field) = (listelm); \
*(listelm)->field.tqe_prev = (elm); \
(listelm)->field.tqe_prev = &TAILQ_NEXT((elm), field); \
QMD_TRACE_ELEM(&(elm)->field); \
QMD_TRACE_ELEM(&listelm->field); \
} while (0)
#define TAILQ_INSERT_HEAD(head, elm, field) do { \
if ((TAILQ_NEXT((elm), field) = TAILQ_FIRST((head))) != NULL) \
TAILQ_FIRST((head))->field.tqe_prev = \
&TAILQ_NEXT((elm), field); \
else \
(head)->tqh_last = &TAILQ_NEXT((elm), field); \
TAILQ_FIRST((head)) = (elm); \
(elm)->field.tqe_prev = &TAILQ_FIRST((head)); \
QMD_TRACE_HEAD(head); \
QMD_TRACE_ELEM(&(elm)->field); \
} while (0)
#define TAILQ_INSERT_TAIL(head, elm, field) do { \
TAILQ_NEXT((elm), field) = NULL; \
(elm)->field.tqe_prev = (head)->tqh_last; \
*(head)->tqh_last = (elm); \
(head)->tqh_last = &TAILQ_NEXT((elm), field); \
QMD_TRACE_HEAD(head); \
QMD_TRACE_ELEM(&(elm)->field); \
} while (0)
#define TAILQ_LAST(head, headname) \
(*(((struct headname *)((head)->tqh_last))->tqh_last))
#define TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
#define TAILQ_PREV(elm, headname, field) \
(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
#define TAILQ_REMOVE(head, elm, field) do { \
if ((TAILQ_NEXT((elm), field)) != NULL) \
TAILQ_NEXT((elm), field)->field.tqe_prev = \
(elm)->field.tqe_prev; \
else { \
(head)->tqh_last = (elm)->field.tqe_prev; \
QMD_TRACE_HEAD(head); \
} \
*(elm)->field.tqe_prev = TAILQ_NEXT((elm), field); \
TRASHIT((elm)->field.tqe_next); \
TRASHIT((elm)->field.tqe_prev); \
QMD_TRACE_ELEM(&(elm)->field); \
} while (0)
#ifdef _KERNEL
/*
* XXX insque() and remque() are an old way of handling certain queues.
* They bogusly assumes that all queue heads look alike.
*/
struct quehead {
struct quehead *qh_link;
struct quehead *qh_rlink;
};
#ifdef __CC_SUPPORTS___INLINE
static __inline void
insque(void *a, void *b)
{
struct quehead *element = (struct quehead *)a,
*head = (struct quehead *)b;
element->qh_link = head->qh_link;
element->qh_rlink = head;
head->qh_link = element;
element->qh_link->qh_rlink = element;
}
static __inline void
remque(void *a)
{
struct quehead *element = (struct quehead *)a;
element->qh_link->qh_rlink = element->qh_rlink;
element->qh_rlink->qh_link = element->qh_link;
element->qh_rlink = 0;
}
#else /* !__CC_SUPPORTS___INLINE */
void insque(void *a, void *b);
void remque(void *a);
#endif /* __CC_SUPPORTS___INLINE */
#endif /* _KERNEL */
#endif /* !_SYS_QUEUE_H_ */
@@ -0,0 +1,89 @@
/*
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
/*-
* Copyright 1998 Massachusetts Institute of Technology
*
* Permission to use, copy, modify, and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that both the above copyright notice and this
* permission notice appear in all copies, that both the above
* copyright notice and this permission notice appear in all
* supporting documentation, and that the name of M.I.T. not be used
* in advertising or publicity pertaining to distribution of the
* software without specific, written prior permission. M.I.T. makes
* no representations about the suitability of this software for any
* purpose. It is provided "as is" without express or implied
* warranty.
*
* THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
* ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
* SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _FBSD_COMPAT_SYS_RMAN_H_
#define _FBSD_COMPAT_SYS_RMAN_H_
#include <machine/_bus.h>
#include <machine/resource.h>
#define RF_ACTIVE 0x0002
#define RF_SHAREABLE 0x0004
#define RF_OPTIONAL 0x0080
#define RF_ALIGNMENT_SHIFT 10 /* alignment size bit starts bit 10 */
#define RF_ALIGNMENT_LOG2(x) ((x) << RF_ALIGNMENT_SHIFT)
struct resource {
int r_type;
bus_space_tag_t r_bustag; /* bus_space tag */
bus_space_handle_t r_bushandle; /* bus_space handle */
area_id r_mapped_area;
};
bus_space_handle_t rman_get_bushandle(struct resource *);
bus_space_tag_t rman_get_bustag(struct resource *);
int rman_get_rid(struct resource *);
static inline u_long
rman_get_start(struct resource *resourcePointer)
{
return resourcePointer->r_bushandle;
}
static inline uint32_t
rman_make_alignment_flags(uint32_t size)
{
int i;
/*
* Find the hightest bit set, and add one if more than one bit
* set. We're effectively computing the ceil(log2(size)) here.
*/
for (i = 31; i > 0; i--)
if ((1 << i) & size)
break;
if (~(1 << i) & size)
i++;
return RF_ALIGNMENT_LOG2(i);
}
#endif /* _FBSD_COMPAT_SYS_RMAN_H_ */
@@ -0,0 +1,18 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_SOCKET_H_
#define _FBSD_COMPAT_SYS_SOCKET_H_
#include <posix/sys/socket.h>
#include <sys/cdefs.h>
#include <sys/_types.h>
// TODO Should be incorporated into Haikus socket.h with a number below AF_MAX
#define AF_IEEE80211 AF_MAX + 1 /* IEEE 802.11 protocol */
#endif /* _FBSD_COMPAT_SYS_SOCKET_H_ */
@@ -0,0 +1,16 @@
/*
* Copyright 2007-2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_SOCKIO_H_
#define _FBSD_COMPAT_SYS_SOCKIO_H_
#include <posix/sys/sockio.h>
#include <sys/ioccom.h>
#define SIOCSIFCAP SIOCSPACKETCAP
#endif
@@ -0,0 +1,165 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_SYSCTL_H_
#define _FBSD_COMPAT_SYS_SYSCTL_H_
#include <sys/queue.h>
#ifdef _KERNEL
struct sysctl_req {
void *newptr;
};
struct sysctl_ctx_list {
};
struct sysctl_oid_list {
};
#define SYSCTL_HANDLER_ARGS void *oidp, void *arg1, int arg2, \
struct sysctl_req *req
#define OID_AUTO (-1)
#define CTLTYPE 0xf /* Mask for the type */
#define CTLTYPE_NODE 1 /* name is a node */
#define CTLTYPE_INT 2 /* name describes an integer */
#define CTLTYPE_STRING 3 /* name describes a string */
#define CTLTYPE_QUAD 4 /* name describes a 64-bit number */
#define CTLTYPE_OPAQUE 5 /* name describes a structure */
#define CTLTYPE_STRUCT CTLTYPE_OPAQUE /* name describes a structure */
#define CTLTYPE_UINT 6 /* name describes an unsigned integer */
#define CTLTYPE_LONG 7 /* name describes a long */
#define CTLTYPE_ULONG 8 /* name describes an unsigned long */
#define CTLTYPE_U64 9 /* name describes an unsigned 64-bit number */
#define CTLFLAG_RD 0x80000000 /* Allow reads of variable */
#define CTLFLAG_WR 0x40000000 /* Allow writes to the variable */
#define CTLFLAG_RW (CTLFLAG_RD|CTLFLAG_WR)
#define CTLFLAG_NOLOCK 0x20000000 /* XXX Don't Lock */
#define CTLFLAG_ANYBODY 0x10000000 /* All users can set this var */
#define CTLFLAG_SECURE 0x08000000 /* Permit set only if securelevel<=0 */
#define CTLFLAG_PRISON 0x04000000 /* Prisoned roots can fiddle */
#define CTLFLAG_DYN 0x02000000 /* Dynamic oid - can be freed */
#define CTLFLAG_SKIP 0x01000000 /* Skip this sysctl when listing */
#define CTLMASK_SECURE 0x00F00000 /* Secure level */
#define CTLFLAG_TUN 0x00080000 /* Tunable variable */
#define CTLFLAG_MPSAFE 0x00040000 /* Handler is MP safe */
#define CTLFLAG_RDTUN (CTLFLAG_RD|CTLFLAG_TUN)
static inline int
sysctl_ctx_init(struct sysctl_ctx_list *clist)
{
return -1;
}
static inline int
sysctl_ctx_free(struct sysctl_ctx_list *clist)
{
return -1;
}
static inline void *
sysctl_add_oid(struct sysctl_ctx_list *clist, void *parent, int nbr,
const char *name, int kind, void *arg1, int arg2,
int (*handler) (SYSCTL_HANDLER_ARGS), const char *fmt, const char *descr)
{
return NULL;
}
static inline int sysctl_handle_long(SYSCTL_HANDLER_ARGS) { return -1; }
static inline int sysctl_handle_opaque(SYSCTL_HANDLER_ARGS) { return -1; }
static inline int sysctl_handle_quad(SYSCTL_HANDLER_ARGS) { return -1; }
static inline int sysctl_handle_int(SYSCTL_HANDLER_ARGS) { return -1; }
static inline int sysctl_handle_64(SYSCTL_HANDLER_ARGS) { return -1; }
static inline int sysctl_handle_string(SYSCTL_HANDLER_ARGS) { return -1; }
#define SYSCTL_OUT(r, p, l) -1
#define __DESCR(x) ""
#define SYSCTL_ADD_OID(ctx, parent, nbr, name, kind, a1, a2, handler, fmt, descr) \
sysctl_add_oid(ctx, parent, nbr, name, kind, a1, a2, handler, fmt, \
__DESCR(descr))
#define SYSCTL_ADD_NODE(ctx, parent, nbr, name, access, handler, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_NODE|(access), \
0, 0, handler, "N", __DESCR(descr))
#define SYSCTL_ADD_STRING(ctx, parent, nbr, name, access, arg, len, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_STRING|(access), \
arg, len, sysctl_handle_string, "A", __DESCR(descr))
#define SYSCTL_ADD_INT(ctx, parent, nbr, name, access, ptr, val, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_INT|(access), \
ptr, val, sysctl_handle_int, "I", __DESCR(descr))
#define SYSCTL_ADD_UINT(ctx, parent, nbr, name, access, ptr, val, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_UINT|(access), \
ptr, val, sysctl_handle_int, "IU", __DESCR(descr))
#define SYSCTL_ADD_XINT(ctx, parent, nbr, name, access, ptr, val, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_UINT|(access), \
ptr, val, sysctl_handle_int, "IX", __DESCR(descr))
#define SYSCTL_ADD_LONG(ctx, parent, nbr, name, access, ptr, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_LONG|(access), \
ptr, 0, sysctl_handle_long, "L", __DESCR(descr))
#define SYSCTL_ADD_ULONG(ctx, parent, nbr, name, access, ptr, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_ULONG|(access), \
ptr, 0, sysctl_handle_long, "LU", __DESCR(descr))
#define SYSCTL_ADD_QUAD(ctx, parent, nbr, name, access, ptr, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_QUAD|(access), \
ptr, 0, sysctl_handle_quad, "Q", __DESCR(descr))
#define SYSCTL_ADD_UQUAD(ctx, parent, nbr, name, access, ptr, descr) \
sysctl_add_oid(ctx, parent, nbr, name, \
CTLTYPE_U64 | CTLFLAG_MPSAFE | (access), \
ptr, 0, sysctl_handle_64, "QU", __DESCR(descr))
#define SYSCTL_ADD_OPAQUE(ctx, parent, nbr, name, access, ptr, len, fmt, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_OPAQUE|(access), \
ptr, len, sysctl_handle_opaque, fmt, __DESCR(descr))
#define SYSCTL_ADD_STRUCT(ctx, parent, nbr, name, access, ptr, type, descr) \
sysctl_add_oid(ctx, parent, nbr, name, CTLTYPE_OPAQUE|(access), \
ptr, sizeof(struct type), sysctl_handle_opaque, "S," #type, __DESCR(descr))
#define SYSCTL_ADD_PROC(ctx, parent, nbr, name, access, ptr, arg, handler, fmt, descr) \
sysctl_add_oid(ctx, parent, nbr, name, (access), ptr, arg, handler, fmt, \
__DESCR(descr))
static inline void *
SYSCTL_CHILDREN(void *ptr)
{
return NULL;
}
#define SYSCTL_STATIC_CHILDREN(...) NULL
#define SYSCTL_DECL(name) \
extern struct sysctl_oid_list sysctl_##name##_children
#define SYSCTL_NODE(...)
#define SYSCTL_INT(...)
#define SYSCTL_UINT(...)
#define SYSCTL_PROC(...)
#endif
#endif
@@ -0,0 +1,11 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_SYSLOG_H_
#define _FBSD_COMPAT_SYS_SYSLOG_H_
#define LOG_ERR 3 /* error conditions */
#endif /* _FBSD_COMPAT_SYS_SYSLOG_H_ */
@@ -0,0 +1,103 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_SYSTM_H_
#define _FBSD_COMPAT_SYS_SYSTM_H_
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <strings.h>
#include <machine/atomic.h>
#include <machine/cpufunc.h>
#include <sys/callout.h>
#include <sys/cdefs.h>
#include <sys/queue.h>
#include <sys/libkern.h>
#define printf freebsd_printf
int printf(const char *format, ...) __printflike(1, 2);
#define ovbcopy(f, t, l) bcopy((f), (t), (l))
#define bootverbose 1
#ifdef INVARIANTS
#define KASSERT(cond,msg) do { \
if (!(cond)) \
panic msg; \
} while (0)
#else
#define KASSERT(exp,msg) do { \
} while (0)
#endif
#define DELAY(n) \
do { \
if (n < 1000) \
spin(n); \
else \
snooze(n); \
} while (0)
void wakeup(void *);
#ifndef CTASSERT /* Allow lint to override */
#define CTASSERT(x) _CTASSERT(x, __LINE__)
#define _CTASSERT(x, y) __CTASSERT(x, y)
#define __CTASSERT(x, y) typedef char __assert ## y[(x) ? 1 : -1]
#endif
static inline int
copyin(const void * __restrict udaddr, void * __restrict kaddr,
size_t len)
{
return user_memcpy(kaddr, udaddr, len);
}
static inline int
copyout(const void * __restrict kaddr, void * __restrict udaddr,
size_t len)
{
return user_memcpy(udaddr, kaddr, len);
}
static inline void log(int level, const char *fmt, ...) { }
int snprintf(char *, size_t, const char *, ...) __printflike(3, 4);
extern int sprintf(char *buf, const char *, ...);
extern void driver_vprintf(const char *format, va_list vl);
#define vprintf(fmt, vl) driver_vprintf(fmt, vl)
extern int vsnprintf(char *, size_t, const char *, __va_list)
__printflike(3, 0);
int msleep(void *, struct mtx *, int, const char *, int);
int _pause(const char *, int);
#define pause(waitMessage, timeout) _pause((waitMessage), (timeout))
#define tsleep(channel, priority, waitMessage, timeout) \
msleep((channel), NULL, (priority), (waitMessage), (timeout))
struct unrhdr;
struct unrhdr *new_unrhdr(int low, int high, struct mtx *mutex);
void delete_unrhdr(struct unrhdr *);
int alloc_unr(struct unrhdr *);
void free_unr(struct unrhdr *, u_int);
extern char *getenv(const char *name);
extern void freeenv(char *env);
#endif /* _FBSD_COMPAT_SYS_SYSTM_H_ */
@@ -0,0 +1,43 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_TASKQUEUE_H_
#define _FBSD_COMPAT_SYS_TASKQUEUE_H_
#include <sys/queue.h>
#include <sys/_task.h>
#define PI_NET (B_REAL_TIME_DISPLAY_PRIORITY - 1)
#define TASK_INIT(taskp, prio, hand, arg) task_init(taskp, prio, hand, arg)
typedef void (*taskqueue_enqueue_fn)(void *context);
struct taskqueue;
struct taskqueue *taskqueue_create(const char *name, int mflags,
taskqueue_enqueue_fn enqueue, void *context);
int taskqueue_start_threads(struct taskqueue **tq, int count, int pri,
const char *name, ...) __printflike(4, 5);
void taskqueue_free(struct taskqueue *tq);
void taskqueue_drain(struct taskqueue *tq, struct task *task);
void taskqueue_block(struct taskqueue *queue);
void taskqueue_unblock(struct taskqueue *queue);
int taskqueue_enqueue(struct taskqueue *tq, struct task *task);
void taskqueue_thread_enqueue(void *context);
extern struct taskqueue *taskqueue_fast;
extern struct taskqueue *taskqueue_swi;
int taskqueue_enqueue_fast(struct taskqueue *queue, struct task *task);
struct taskqueue *taskqueue_create_fast(const char *name, int mflags,
taskqueue_enqueue_fn enqueue, void *context);
void task_init(struct task *, int prio, task_handler_t handler, void *arg);
#endif
@@ -0,0 +1,20 @@
/*
* Copyright 2009, Colin Günther, coling@gmx.de.
* All rights reserved. Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_TIME_H_
#define _FBSD_COMPAT_SYS_TIME_H_
#include <posix/sys/time.h>
#include <sys/_timeval.h>
#include <sys/types.h>
#define time_uptime (system_time() / 1000000)
int ppsratecheck(struct timeval*, int*, int);
#endif /* _FBSD_COMPAT_SYS_TIME_H_ */
@@ -0,0 +1,22 @@
/*
* Copyright 2007 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_SYS_TYPES_H_
#define _FBSD_COMPAT_SYS_TYPES_H_
#include <posix/stdint.h>
#include <posix/sys/types.h>
#include <sys/cdefs.h>
#include <machine/endian.h>
#include <sys/_types.h>
typedef int boolean_t;
typedef __const char* c_caddr_t;
typedef uint64_t u_quad_t;
#endif
@@ -0,0 +1,12 @@
/*
* Copyright 2009 Haiku Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_VM_UMA_H_
#define _FBSD_COMPAT_VM_UMA_H_
#include <sys/param.h>
#include <sys/malloc.h>
#endif /* _FBSD_COMPAT_VM_UMA_H_ */
@@ -0,0 +1,36 @@
/*
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _FBSD_COMPAT_VM_VM_H_
#define _FBSD_COMPAT_VM_VM_H_
#include <stdint.h>
#include <KernelExport.h>
#ifdef B_HAIKU_64_BIT
typedef uint64_t vm_offset_t;
typedef uint64_t vm_paddr_t;
#else
typedef uint32_t vm_offset_t;
typedef uint32_t vm_paddr_t;
#endif
typedef void *pmap_t;
#define vmspace_pmap(...) NULL
#define pmap_extract(...) NULL
vm_paddr_t pmap_kextract(vm_offset_t virtualAddress);
#define vtophys(virtualAddress) pmap_kextract((vm_offset_t)(virtualAddress))
#endif /* _FBSD_COMPAT_VM_VM_H_ */
@@ -0,0 +1,46 @@
/*
* Copyright 2010, Ingo Weinhold, ingo_weinhold@gmx.de.
* Distributed under the terms of the MIT License.
*/
#include "compat_cpp.h"
#include <stdio.h>
#include <string.h>
#include <kernel/vm/vm.h>
void*
_kernel_contigmalloc_cpp(const char* file, int line, size_t size,
phys_addr_t low, phys_addr_t high, phys_size_t alignment,
phys_size_t boundary, bool zero, bool dontWait)
{
size = ROUNDUP(size, B_PAGE_SIZE);
uint32 creationFlags = (zero ? 0 : CREATE_AREA_DONT_CLEAR)
| (dontWait ? CREATE_AREA_DONT_WAIT : 0);
char name[B_OS_NAME_LENGTH];
const char* baseName = strrchr(file, '/');
baseName = baseName != NULL ? baseName + 1 : file;
snprintf(name, sizeof(name), "contig:%s:%d", baseName, line);
virtual_address_restrictions virtualRestrictions = {};
physical_address_restrictions physicalRestrictions = {};
physicalRestrictions.low_address = low;
physicalRestrictions.high_address = high;
physicalRestrictions.alignment = alignment;
physicalRestrictions.boundary = boundary;
void* address;
area_id area = create_area_etc(B_SYSTEM_TEAM, name, size, B_CONTIGUOUS,
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, creationFlags, 0,
&virtualRestrictions, &physicalRestrictions, &address);
if (area < 0)
return NULL;
return address;
}
@@ -0,0 +1,27 @@
/*
* Copyright 2010, Ingo Weinhold, ingo_weinhold@gmx.de.
* Distributed under the terms of the MIT License.
*/
#ifndef _FREE_BSD_NETWORK_COMPAT_CPP_H
#define _FREE_BSD_NETWORK_COMPAT_CPP_H
#include <SupportDefs.h>
#ifdef __cplusplus
extern "C" {
#endif
void* _kernel_contigmalloc_cpp(const char* file, int line, size_t size,
phys_addr_t low, phys_addr_t high, phys_size_t alignment,
phys_size_t boundary, bool zero, bool dontWait);
#ifdef __cplusplus
}
#endif
#endif /* _FREE_BSD_NETWORK_COMPAT_CPP_H */
@@ -0,0 +1,42 @@
/*
* Copyright 2009 Colin Günther, coling@gmx.de.
* All rights reserved. Distributed under the terms of the MIT License.
*/
#include <compat/sys/mutex.h>
#include <compat/sys/condvar.h>
#include "Condvar.h"
void cv_init(struct cv* variable, const char* description)
{
conditionInit(variable, description);
}
void cv_signal(struct cv* variable)
{
conditionNotifyOne(variable);
}
int cv_timedwait(struct cv* variable, struct mtx* mutex, int timeout)
{
int status;
mtx_unlock(mutex);
status = conditionTimedWait(variable, timeout);
mtx_lock(mutex);
return status;
}
void cv_wait(struct cv* variable, struct mtx* mutex)
{
mtx_unlock(mutex);
conditionWait(variable);
mtx_lock(mutex);
}
+303
View File
@@ -0,0 +1,303 @@
/*
* Copyright 2007-2009, Axel Dörfler, axeld@pinc-software.de.
* Copyright 2007, Hugo Santos. All Rights Reserved.
* Copyright 2004, Marcus Overhagen. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#include "device.h"
#include <stdlib.h>
#include <sys/sockio.h>
#include <Drivers.h>
#include <ether_driver.h>
#include <compat/sys/haiku-module.h>
#include <compat/sys/bus.h>
#include <compat/sys/mbuf.h>
#include <compat/net/ethernet.h>
#include <compat/net/if_media.h>
static status_t
compat_open(const char *name, uint32 flags, void **cookie)
{
struct ifnet *ifp;
struct ifreq ifr;
int i;
status_t status;
for (i = 0; i < MAX_DEVICES; i++) {
if (gDevices[i] != NULL && !strcmp(gDevices[i]->device_name, name))
break;
}
if (i == MAX_DEVICES)
return B_ERROR;
if (get_module(NET_STACK_MODULE_NAME, (module_info **)&gStack) != B_OK)
return B_ERROR;
ifp = gDevices[i];
if_printf(ifp, "compat_open(0x%" B_PRIx32 ")\n", flags);
if (atomic_or(&ifp->open_count, 1)) {
put_module(NET_STACK_MODULE_NAME);
return B_BUSY;
}
ifp->if_init(ifp->if_softc);
if (!HAIKU_DRIVER_REQUIRES(FBSD_WLAN)) {
ifp->if_flags &= ~IFF_UP;
ifp->if_ioctl(ifp, SIOCSIFFLAGS, NULL);
memset(&ifr, 0, sizeof(ifr));
ifr.ifr_media = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0);
status = ifp->if_ioctl(ifp, SIOCSIFMEDIA, (caddr_t)&ifr);
if (status != B_OK) {
ifr.ifr_media = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0);
status = ifp->if_ioctl(ifp, SIOCSIFMEDIA, (caddr_t)&ifr);
}
}
ifp->if_flags |= IFF_UP;
ifp->flags &= ~DEVICE_CLOSED;
ifp->if_ioctl(ifp, SIOCSIFFLAGS, NULL);
*cookie = ifp;
return B_OK;
}
static status_t
compat_close(void *cookie)
{
struct ifnet *ifp = cookie;
if_printf(ifp, "compat_close()\n");
atomic_or(&ifp->flags, DEVICE_CLOSED);
wlan_close(cookie);
release_sem_etc(ifp->receive_sem, 1, B_RELEASE_ALL);
return B_OK;
}
static status_t
compat_free(void *cookie)
{
struct ifnet *ifp = cookie;
if_printf(ifp, "compat_free()\n");
// TODO: empty out the send queue
atomic_and(&ifp->open_count, 0);
put_module(NET_STACK_MODULE_NAME);
return B_OK;
}
static status_t
compat_read(void *cookie, off_t position, void *buffer, size_t *numBytes)
{
struct ifnet *ifp = cookie;
uint32 semFlags = B_CAN_INTERRUPT;
status_t status;
struct mbuf *mb;
size_t length;
//if_printf(ifp, "compat_read(%lld, %p, [%lu])\n", position,
// buffer, *numBytes);
if (ifp->flags & DEVICE_CLOSED)
return B_INTERRUPTED;
if (ifp->flags & DEVICE_NON_BLOCK)
semFlags |= B_RELATIVE_TIMEOUT;
do {
status = acquire_sem_etc(ifp->receive_sem, 1, semFlags, 0);
if (ifp->flags & DEVICE_CLOSED)
return B_INTERRUPTED;
if (status == B_WOULD_BLOCK) {
*numBytes = 0;
return B_OK;
} else if (status < B_OK)
return status;
IF_DEQUEUE(&ifp->receive_queue, mb);
} while (mb == NULL);
length = min_c(max_c((size_t)mb->m_pkthdr.len, 0), *numBytes);
#if 0
mb = m_defrag(mb, 0);
if (mb == NULL) {
*numBytes = 0;
return B_NO_MEMORY;
}
#endif
m_copydata(mb, 0, length, buffer);
*numBytes = length;
m_freem(mb);
return B_OK;
}
static status_t
compat_write(void *cookie, off_t position, const void *buffer,
size_t *numBytes)
{
struct ifnet *ifp = cookie;
struct mbuf *mb;
//if_printf(ifp, "compat_write(%lld, %p, [%lu])\n", position,
// buffer, *numBytes);
if (*numBytes > MHLEN)
mb = m_getcl(0, MT_DATA, M_PKTHDR);
else
mb = m_gethdr(0, MT_DATA);
if (mb == NULL)
return ENOBUFS;
// if we waited, check after if the ifp is still valid
mb->m_pkthdr.len = mb->m_len = min_c(*numBytes, (size_t)MCLBYTES);
memcpy(mtod(mb, void *), buffer, mb->m_len);
return ifp->if_output(ifp, mb, NULL, NULL);
}
static status_t
compat_control(void *cookie, uint32 op, void *arg, size_t length)
{
struct ifnet *ifp = cookie;
//if_printf(ifp, "compat_control(op %lu, %p, [%lu])\n", op,
// arg, length);
switch (op) {
case ETHER_INIT:
return B_OK;
case ETHER_GETADDR:
return user_memcpy(arg, IF_LLADDR(ifp), ETHER_ADDR_LEN);
case ETHER_NONBLOCK:
{
int32 value;
if (length < 4)
return B_BAD_VALUE;
if (user_memcpy(&value, arg, sizeof(int32)) < B_OK)
return B_BAD_ADDRESS;
if (value)
ifp->flags |= DEVICE_NON_BLOCK;
else
ifp->flags &= ~DEVICE_NON_BLOCK;
return B_OK;
}
case ETHER_SETPROMISC:
{
int32 value;
if (length < 4)
return B_BAD_VALUE;
if (user_memcpy(&value, arg, sizeof(int32)) < B_OK)
return B_BAD_ADDRESS;
if (value)
ifp->if_flags |= IFF_PROMISC;
else
ifp->if_flags &= ~IFF_PROMISC;
return ifp->if_ioctl(ifp, SIOCSIFFLAGS, NULL);
}
case ETHER_GETFRAMESIZE:
{
uint32 frameSize;
if (length < 4)
return B_BAD_VALUE;
frameSize = ifp->if_mtu + ETHER_HDR_LEN;
return user_memcpy(arg, &frameSize, 4);
}
case ETHER_ADDMULTI:
case ETHER_REMMULTI:
{
struct sockaddr_dl address;
if ((ifp->if_flags & IFF_MULTICAST) == 0)
return B_NOT_SUPPORTED;
memset(&address, 0, sizeof(address));
address.sdl_family = AF_LINK;
memcpy(LLADDR(&address), arg, ETHER_ADDR_LEN);
if (op == ETHER_ADDMULTI)
return if_addmulti(ifp, (struct sockaddr *)&address, NULL);
return if_delmulti(ifp, (struct sockaddr *)&address);
}
case ETHER_GET_LINK_STATE:
{
struct ifmediareq mediareq;
ether_link_state_t state;
status_t status;
if (length < sizeof(ether_link_state_t))
return EINVAL;
memset(&mediareq, 0, sizeof(mediareq));
status = ifp->if_ioctl(ifp, SIOCGIFMEDIA, (caddr_t)&mediareq);
if (status < B_OK)
return status;
state.media = mediareq.ifm_active;
if ((mediareq.ifm_status & IFM_ACTIVE) != 0)
state.media |= IFM_ACTIVE;
if ((mediareq.ifm_active & IFM_10_T) != 0)
state.speed = 10000000;
else if ((mediareq.ifm_active & IFM_100_TX) != 0)
state.speed = 100000000;
else
state.speed = 1000000000;
state.quality = 1000;
return user_memcpy(arg, &state, sizeof(ether_link_state_t));
}
case ETHER_SET_LINK_STATE_SEM:
if (user_memcpy(&ifp->link_state_sem, arg, sizeof(sem_id)) < B_OK) {
ifp->link_state_sem = -1;
return B_BAD_ADDRESS;
}
return B_OK;
}
return wlan_control(cookie, op, arg, length);
}
device_hooks gDeviceHooks = {
compat_open,
compat_close,
compat_free,
compat_control,
compat_read,
compat_write,
};

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