Use the existing ARM MMU definitions and remove duplicates.
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@@ -52,6 +52,7 @@
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* I will use the old format...
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*/
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#define ARM_MMU_L2_TYPE_LARGE 0x1
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#define ARM_MMU_L2_TYPE_SMALLEXT 0x3
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/* for new format entries (cortex-a8) */
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@@ -22,7 +22,6 @@
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#include <thread.h>
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#include <vm/vm.h>
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#include <vm/VMAddressSpace.h>
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#include <arm_mmu.h>
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#include "paging/32bit/ARMPagingStructures32Bit.h"
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#include "paging/32bit/ARMVMTranslationMap32Bit.h"
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@@ -172,7 +171,7 @@ ARMPagingMethod32Bit::PhysicalPageSlotPool::Map(phys_addr_t physicalAddress,
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page_table_entry& pte = fPageTable[
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(virtualAddress - fVirtualBase) / B_PAGE_SIZE];
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pte = (physicalAddress & ARM_PTE_ADDRESS_MASK)
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| ARM_PTE_TYPE_SMALL_PAGE;
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| ARM_MMU_L2_TYPE_SMALLEXT;
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arch_cpu_invalidate_TLB_range(virtualAddress, virtualAddress + B_PAGE_SIZE);
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// invalidate_TLB(virtualAddress);
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@@ -462,8 +461,7 @@ ARMPagingMethod32Bit::IsKernelPageAccessible(addr_t virtualAddress,
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ARMPagingMethod32Bit::PutPageTableInPageDir(page_directory_entry* entry,
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phys_addr_t pgtablePhysical, uint32 attributes)
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{
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*entry = (pgtablePhysical & ARM_PDE_ADDRESS_MASK)
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| ARM_PDE_TYPE_COARSE_L2_PAGE_TABLE;
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*entry = (pgtablePhysical & ARM_PDE_ADDRESS_MASK) | ARM_MMU_L1_TYPE_COARSE;
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// TODO: we ignore the attributes of the page table - for compatibility
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// with BeOS we allow having user accessible areas in the kernel address
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// space. This is currently being used by some drivers, mainly for the
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@@ -480,7 +478,7 @@ ARMPagingMethod32Bit::PutPageTableEntryInTable(page_table_entry* entry,
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bool globalPage)
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{
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page_table_entry page = (physicalAddress & ARM_PTE_ADDRESS_MASK)
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| ARM_PTE_TYPE_SMALL_PAGE;
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| ARM_MMU_L2_TYPE_SMALLEXT;
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#if 0 //IRA
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| ARM_PTE_PRESENT | (globalPage ? ARM_PTE_GLOBAL : 0)
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| MemoryTypeToPageTableEntryFlags(memoryType);
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@@ -16,25 +16,8 @@
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#include <int.h>
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#include <kernel.h>
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#define VADDR_TO_PDENT(va) ((va) >> 20)
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#define VADDR_TO_PTENT(va) (((va) & 0xff000) >> 12)
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#define VADDR_TO_PGOFF(va) ((va) & 0x0fff)
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#include <arm_mmu.h>
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// page directory entry bits
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#define ARM_PDE_TYPE_MASK 0x00000003
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#define ARM_PDE_TYPE_COARSE_L2_PAGE_TABLE 0x00000001
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#define ARM_PDE_TYPE_SECTION 0x00000002
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#define ARM_PDE_TYPE_FINE_L2_PAGE_TABLE 0x00000003
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#define ARM_PDE_ADDRESS_MASK 0xfffffc00
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// page table entry bits
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#define ARM_PTE_TYPE_MASK 0x00000003
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#define ARM_PTE_TYPE_LARGE_PAGE 0x00000001
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#define ARM_PTE_TYPE_SMALL_PAGE 0x00000002
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#define ARM_PTE_TYPE_EXT_SMALL_PAGE 0x00000003
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#define ARM_PTE_ADDRESS_MASK 0xfffff000
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#define FIRST_USER_PGDIR_ENT (VADDR_TO_PDENT(USER_BASE))
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#define NUM_USER_PGDIR_ENTS (VADDR_TO_PDENT(ROUNDUP(USER_SIZE, \
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