i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

* Use haiku provided arch defines Axel pointed out

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42413 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-07-11 20:06:39 +00:00
parent b8d5c5cec2
commit ff2898e24a
2 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/accelerants/radeon/CP.c
+1 -1
View File
@@ -330,7 +330,7 @@ void Radeon_SendIndirectBuffer( accelerator_info *ai,
// (this code is a bit of a overkill - currently, only some WinChip/Cyrix // (this code is a bit of a overkill - currently, only some WinChip/Cyrix
// CPU's support out-of-order writes, but we are prepared) // CPU's support out-of-order writes, but we are prepared)
// TODO : Other Architectures? PowerPC? // TODO : Other Architectures? PowerPC?
#if defined(__x86__) || defined(__x86_64__) #ifdef __INTEL__
__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory"); __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
#endif #endif
// make sure the motherboard chipset has flushed its write buffer by // make sure the motherboard chipset has flushed its write buffer by
src/add-ons/kernel/drivers/graphics/radeon/PCI_GART.c
+2 -2
View File
@@ -234,9 +234,9 @@ static status_t initGATT( GART_info *gart )
// back to real live - some chipsets have write buffers that // back to real live - some chipsets have write buffers that
// proove all previous assumptions wrong // proove all previous assumptions wrong
// (don't know whether this really helps though) // (don't know whether this really helps though)
#if defined(__x86__) || defined(__x86_64__) #if defined(__INTEL__)
asm volatile ( "wbinvd" ::: "memory" ); asm volatile ( "wbinvd" ::: "memory" );
#elif defined(__powerpc__) #elif defined(__POWERPC__)
// TODO : icbi on PowerPC to flush instruction cache? // TODO : icbi on PowerPC to flush instruction cache?
#endif #endif
return B_OK; return B_OK;