- The added command is mandatory under the HCI Implementation Conformance Statement (ICS).
- The command was tested through running the bluetooth_server and Bluetooth preferences and tracking the output logs.
Change-Id: I471766233dee5b24b3fe424fe6724e4378b5927b
Reviewed-on: https://review.haiku-os.org/c/haiku/+/11075
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
The bootloader is now only responsible for setting up Protected Mode
and Paging. It otherwise preserves the existing CR0, and leaves setup
to the kernel.
The kernel now sets CR0 for each CPU in preboot_init_percpu().
Some redundant sets are removed from x86_init_fpu, which now
panic()s in the case where we don't have a FPU, and avoids
unnecessary prints.
This fixes a massive oversight where CR0 was never reset on x86
systems booted using the EFI loader, except on the boot CPU! That
meant that NUMERIC_ERROR and possibly even WRITE_PROTECT were
simply not set on non-boot CPUs, unless the EFI BIOS had set them up
already. (On the BIOS loader, smp_start_kernel() ran on all CPUs.)
Fixes NVMM initialization on non-boot CPUs on Intel hardware.
* VMUserAddressSpace & VMTranslationMap64Bit will need to be inherited from.
* vm_soft_fault & vm_unmap_address_range will need to be invoked directly.
* map_backing_store will need to be invoked directly. The whole concept
of "backing stores" is long merged into VMCache anyway, so at the
same time, just rename the method to "vm_map_cache".
Methods added to the internal vm_priv.h; they should not be needed
except in special circumstances.
should avoid instruction reorder seen on #20100,
could lead to pinning happening after getting the cpu
_ZL15call_single_cpujPFvPviES_b before:
mov 0x90(%rbx),%rax
addl $0x1,0xa8(%rbx)
_ZL15call_single_cpujPFvPviES_b after:
addl $0x1,0xa8(%rbx)
mov 0x90(%rbx),%rax
Change-Id: I7759c5e086856a190aac21270601ae55c0b39fac
Reviewed-on: https://review.haiku-os.org/c/haiku/+/11050
Haiku-Format: Haiku-format Bot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
On some Intel MacBooks, system firmware configures the framebuffer
as X-tiled and uses the "Graphics Memory Fence Table Register"s to
transparently convert linear framebuffer accesses by the CPU to tiled
accesses. If you change the framebuffer base address or stride, you get
a garbled display since the "fence" configuration no longer matches
the framebuffer.
Might fix#17688
Change-Id: Iaf9ea7641f7809acb9b8fbf14b88ed656a6a6964
Reviewed-on: https://review.haiku-os.org/c/haiku/+/11016
Reviewed-by: Adrien Destugues <[email protected]>
We should just be zeroing any unknown bits, not trying to preserve them.
If the BIOS or other mechanisms left the timer in some other mode
besides "one-shot" like we need, then we might incorrectly preserve
those bits.
This also has the advantage of avoiding config reads in set_hardware_timer.
* Get rid of the global sUserTimerLock. This was added in 2013
to prepare for the removal of the global scheduler lock, which
is what all these routines previously used. The locking design
was never redesigned since then to accomodate for the changes,
it appears.
* Make CPU timers always locked by time_lock, and the system-time
timers locked by a local lock.
* Make fScheduled load-bearing as to whether the timer is presently
in the team/thread lists or not.
* Don't re-fetch the team/thread every wait cycle. This allows us
to avoid a lock/unlock dance that would otherwise complicate
the scheduling logic significantly.
Tested using the old version of the Open POSIX Testsuite (which
indeed caught some bugs in earlier versions of this patch.) All
12 timer_create tests still pass, including the ones that depend on
timers firing within the right timeframe.
Fixes#20090.
Change-Id: I54dd9a49e72f51711baa0fbf18e5c35a7fafec8f
Reviewed-on: https://review.haiku-os.org/c/haiku/+/11007
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
- Add more secondary CPU startup methods:
PSCI using EL3 secure monitor calls (used on most ARM64 CPUs)
Spin tables (used on Apple CPUs, which lack EL3)
- Secondary startup code was rewritten to pass all needed info
to secondaries using static variables, since we can't
pass any info to secondaries when using spin tables
- Setup MMU state to known good values as early as possible
instead of relying on the values set by the bootloader.
This also requires generating new page tables, since we're
(potentially) changing MAIR as well as the address space sizes
(which determine the number of page table levels we need)
Change-Id: I3b90aab04090fa0c6a8ad82a01df7fee6a6a6964
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10984
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
The default C++ standard in GCC 16 is C++20 (from C++17),
which introduced "requires" as a keyword. This caused the
build of libsolv (and libpackage) to break.
fs_shell now sets -std=c++11 as in bfs_shell. Both define
__STRICT_ANSI__ to avoid using certain headers, which now
causes conflicts related to __int128 when the standard is
not actually strict ANSI.
Change-Id: Ie142fb87eb79a20fe0c1b5f3fdd3b94899eaff48
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10980
Haiku-Format: Haiku-format Bot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
They have been in BeBuild.h since BeOS days, but as this file
is included everywhere in the base system headers, it causes
a bunch of unnecessary POSIX namespace pollution. So, instead,
put them in a config header, and include it from SupportDefs.h,
which should only ever be included by Be/Haiku API headers.
It's a non-standard header we inherited from BeOS. According to the
POSIX specification, size_t should be declared from including stddef.h
and/or sys/types.h, and ssize_t from sys/types.h.
Fix various track session handling related bugs like unexpected
selected item change when mouse button was not pressed inside list view
or not currently pressed at all.
Use `fTrack->is_active` to indicate that track session is active.
Remove `fTrack->buttons` because exact mouse button is never checked in
code.
Remove some redundant conditions.
Remove now not needed workaround in `BColorListView::MouseUp`.
Change-Id: Ic4ac846019bd71af008c936dd8d7d265326cba9a
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10968
Haiku-Format: Haiku-format Bot <[email protected]>
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: John Scipione <[email protected]>
Check for AVX-512 support and enable on detected CPUs.
Additionally, reserve more bytes in the kernel thread state for the
typical case of AVX + AVX512 + PT when running under a VM.
This additional state will not be copied to the userland structures
until we can determine a more future-proof way of handling x86 extended
state.
The change also includes out the newly supported registers when entering
userland. This is done by issuing a `XRSTOR` instruction based on the
stored initial FPU state.
This change should not have any visible effects on non-AVX-512 CPUs.
It has been tested on an i7-1165g7 VM with .NET's AVX-512 test suite:
https://github.com/dotnet/runtime/blob/c0d836dbe2315b310e7e099afcb50475dce1a521/src/tests/nativeaot/SmokeTests/HardwareIntrinsics/Program.cs#L398-L424
Change-Id: Iad5123e6d13dff39c0fd3957f7e8135202236460
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10853
Reviewed-by: waddlesplash <[email protected]>
Reviewed-by: Adrien Destugues <[email protected]>
Tested-by: Commit checker robot <[email protected]>
CMD6 is a normal command on MMC, but an application command on SD. And
the parameters and response type are different.
Change-Id: I0583b8a98cf18dc4d77d28066673d0d07229e161
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10934
Reviewed-by: Adrien Destugues <[email protected]>
A similar change was made to address sectors instead of bytes.
The detection method is different in the initialization sequence.
Change-Id: I38af6e21b720d4437594431964a5244fb0d80848
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10933
Reviewed-by: Adrien Destugues <[email protected]>
Tested-by: Commit checker robot <[email protected]>
This is needed to handle MMC devices larger than 2GB. The protocol used
is different from how it's done in SDHC/SDXC.
Change-Id: I12edb1a4196c1e8f375886e9e5a5c1cef111e33c
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10929
Reviewed-by: Adrien Destugues <[email protected]>
It comes with AVX, so enable it if we've enabled AVX.
This also adjusts altcodepatch_replace to explicitly set NOPs
for the remainder of the patch area.
Change-Id: Ia07549851d86836ff5428635b580c751b4e5b2a3
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10867
Reviewed-by: waddlesplash <[email protected]>
Reviewed-by: Jérôme Duval <[email protected]>
Tested-by: Commit checker robot <[email protected]>
[+] Implemented proper initialization and detection for eMMC card at mmc_bus.cpp
[+] Extended SD_COMMANDS enum at mmc.h to support eMMC CMD3. some common commands
are highlighted removing its specific card type prefix.
[+] Reading eMMC Device CID register attributes for initiating mmc disk node.
[+] added formal register content wrapper classes.
[+] Printing some attrs for debugging and verification.
[+] MMCBus and SDHCIBus are aware of the underlying card type, no problem unless more than one device
on same mmc bus.
i followed the specs on CID stipping, still asking for your validation.
Built and tested with success for QEMU emulated sdHC eMMC device, also tested with emulated
SD card to verify nothing backfires.
my reference is JESD84-B51 document.
*log file looks has this:
mmc_bus: Trying MMC CMD1 initialization...
...
mmc_bus: Detected MMC card after CMD1
...
...
mmc_bus: MMC RCA: 1 Status: 500
mmc_bus: MMC CID: MID=0, name="XQEMU!", PSN=31370686, PRV=201, MDT=14/2028
Change-Id: Ia6e93b154548ff7cf2dfae3bcffe85e6b2aa01fb
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10641
Reviewed-by: Adrien Destugues <[email protected]>
Tested-by: Commit checker robot <[email protected]>
Putting all the per-CPU messages in one array means they'll all
be on the same cache lines. The cpu_ent structure is cache-line-aligned,
so this means they'll be on separate cache lines.
The goal is to handle `FIXME` within WorkerThread that of MMCBus.
[+] Extended SDHCIBus to have:
> private PowerOff() to clear corresponding VDD1 power bit.
> Public TerminateBus() to terminate the bus
powering off,disabling clock and interrupts.
Also called within the destructor.
[+] Extend `mmc_bus_interface` to encapsulate terminate_bus
coping the same style of other interface utilities.
[+] MMCBus can its newly added private _TerminateBus() for handling sd cards
not supporting proposed voltage range.
Testing:
- used false invokation on qemu emulated sd card to test
the termination branch.
- Successfully built and run,SD card doesn't show up in DriveSetup
- debug Log show correct power and clock bit setting(power=0xe, clock=0x800b).
Please Guide me further on more effective test method.
Change-Id: Icc8eeac97b9c96dfbf0106871d26a41d7faea5dc
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10622
Haiku-Format: Haiku-format Bot <[email protected]>
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: Adrien Destugues <[email protected]>
This makes for much faster lookups, and avoids the need
to allocate an array.
sizeof(BWindow) is unchanged (on x86_64, 504; on x86, 376)
so this should not break ABI/API.
Quick benchmark in Tracker:
501 lookups, before: ~488 usec
501 lookups, after: ~284 usec
Change-Id: Ica2c728f0c5957380add53e14a826a4aade52df0
Reviewed-on: https://review.haiku-os.org/c/haiku/+/10720
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
With the old code, if the currentErrno hadn't changed, but was in
fact re-assigned more recently than the local errno was, then we
would wind up incorrectly return the local value instead of the
system value. This was the cause of the build mimeset not working
properly when run in recursive mode on Haiku.
So, instead, create a wrapper struct to make assignment of the
local errno always pass through to the system one, so they never
get out of sync in the first place.