kernel: Make CACHE_LINE_ALIGN visible in the whole kernel
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@@ -55,4 +55,6 @@ void arch_cpu_memory_read_write_barrier(void);
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#include <arch_cpu.h>
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#define CACHE_LINE_ALIGN __attribute__((aligned(CACHE_LINE_SIZE)))
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#endif /* _KERNEL_ARCH_CPU_H */
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@@ -26,6 +26,8 @@
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#define CPU_MAX_CACHE_LEVEL 8
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#define CACHE_LINE_SIZE 64
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// MSR registers (possibly Intel specific)
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#define IA32_MSR_TSC 0x10
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@@ -86,7 +86,7 @@ typedef struct cpu_ent {
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// arch-specific stuff
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arch_cpu_info arch;
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} cpu_ent __attribute__((aligned(64)));
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} cpu_ent CACHE_LINE_ALIGN;
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//extern cpu_ent gCPU[MAX_BOOT_CPUS];
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@@ -18,9 +18,6 @@
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#include "RunQueue.h"
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#define CACHE_LINE_ALIGN __attribute__((aligned(64)))
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//#define TRACE_SCHEDULER
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#ifdef TRACE_SCHEDULER
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# define TRACE(...) dprintf_no_syslog(__VA_ARGS__)
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