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the previous commit shifted the PLLsel problem from digitally connected screens to analog connected screens apparantly. That is now fixed and both should work OK. Bumped version to 1.01. +alphabranch.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32958 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2009-09-06 10:20:42 +00:00
parent 032631e54a
commit 148077d71e
5 changed files with 11 additions and 10 deletions
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headers/private/graphics/nvidia/nv_macros.h
+1
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@@ -651,6 +651,7 @@
#define NVDAC_PLLSEL 0x0068050c
#define NVDAC_OUTPUT 0x0068052c
#define NVDAC_PIXPLLC2 0x00680578
#define NVDAC_NV40_PLLSEL2 0x00680580
#define NVDAC_GENCTRL 0x00680600
#define NVDAC_TSTCTRL 0x00680608
#define NVDAC_TSTDATA 0x00680610
src/add-ons/accelerants/nvidia/engine/nv_dac.c
+4 -2
View File
@@ -206,10 +206,12 @@ status_t nv_dac_set_pix_pll(display_mode target)
/* note:
* setup PLL assignment _after_ programming PLL */
if (si->ps.secondary_head) {
if (si->ps.card_arch < NV40A)
if (si->ps.card_arch < NV40A) {
DACW(PLLSEL, 0x30000f00);
else
} else {
DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));
DACW(PLLSEL, 0x30000f04);
}
} else {
DACW(PLLSEL, 0x10000700);
}
src/add-ons/accelerants/nvidia/engine/nv_dac2.c
+4 -6
View File
@@ -208,13 +208,11 @@ status_t nv_dac2_set_pix_pll(display_mode target)
/* (confirmed PLLSEL to be a write-only register on NV04 and NV11!) */
/* note:
* setup PLL assignment _after_ programming PLL */
if (si->ps.secondary_head) {
if (si->ps.card_arch < NV40A)
DACW(PLLSEL, 0x30000f00);
else
DACW(PLLSEL, 0x30000f04);
if (si->ps.card_arch < NV40A) {
DACW(PLLSEL, 0x30000f00);
} else {
DACW(PLLSEL, 0x10000700);
DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));
DACW(PLLSEL, 0x30000f04);
}
LOG(2,("DAC2: PIX PLL frequency should be locked now...\n"));
src/add-ons/accelerants/nvidia/engine/nv_general.c
+1 -1
View File
@@ -92,7 +92,7 @@ status_t nv_general_powerup()
{
status_t status;
LOG(1,("POWERUP: Haiku nVidia Accelerant 1.00 running.\n"));
LOG(1,("POWERUP: Haiku nVidia Accelerant 1.01 running.\n"));
/* log VBLANK INT usability status */
if (si->ps.int_assigned)
src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html
+1 -1
View File
@@ -4,7 +4,7 @@
</head>
<body>
<p><h2>Changes done for each driverversion:</h2></p>
<p><h1>head (SVN 1.00, Rudolf)</h1></p>
<p><h1>head (SVN 1.01, Rudolf)</h1></p>
<ul>
<li>Fixed driver assuming enabling AGP mode succeeded on some occasions if it did not block it itself. Blocking AGP mode completely via the AGP busmanager (option 'block_agp') resulted in a crashing acceleration engine because it was setup for AGP transfers instead of using PCI transfers. Error was solved with help from user kraton.
<li>Fixed shared_info struct problem occuring when 3D 'accelerant' is used (tested Alpha 4.1): the TVencoder type definition list apparantly gets some memory assigned these days when done inside the definition of shared_info. Moved encoder list outside the shared_info definition.