radeon_hd: cleanup some logic; no functional change

src/add-ons/accelerants/radeon_hd/display.cpp

@@ -272,6 +272,8 @@ detect_displays()
 			encoder_external_setup(id, 23860,
 				EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP);
 			gDisplay[displayIndex]->attached = true;
+
+			// TODO: DDC Router switching for DisplayPort (and others?)
 		} else if (gConnector[id]->type == VIDEO_CONNECTOR_LVDS) {
 		#endif
 		if (gConnector[id]->type == VIDEO_CONNECTOR_LVDS) {

src/add-ons/accelerants/radeon_hd/encoder.cpp

@@ -1351,9 +1351,11 @@ transmitter_dig_setup(uint32 connectorIndex, uint32 pixelClock,
 
 					// Select the PLL for the PHY
 					// DP PHY to be clocked from external src if possible
+
+					// DCE4 has external DCPLL clock for DP
 					if (isDP && gInfo->dpExternalClock) {
-						// use external clock source
-						args.v3.acConfig.ucRefClkSource = ATOM_DCPLL;
+						// use external clock source (id'ed to 2 on DCE4)
+						args.v3.acConfig.ucRefClkSource = 2; // EXT clock
 					} else
 						args.v3.acConfig.ucRefClkSource = pll->id;
 
@@ -1417,6 +1419,7 @@ transmitter_dig_setup(uint32 connectorIndex, uint32 pixelClock,
 
 					// Select the PLL for the PHY
 					// DP PHY to be clocked from external src if possible
+					// DCE5, DCPLL usually generates the DP ref clock
 					if (isDP) {
 						if (gInfo->dpExternalClock > 0) {
 							args.v4.acConfig.ucRefClkSource