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added pixelprecise panning for all colordepths

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7692 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-05-31 11:33:14 +00:00
parent bb6583ad28
commit 4642295154
4 changed files with 34 additions and 29 deletions
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src/add-ons/accelerants/neomagic/Cursor.c
+4 -16
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@@ -3,7 +3,7 @@
This file may be used under the terms of the Be Sample Code License.
Other authors:
Rudolf Cornelissen 4/2003-6/2003
Rudolf Cornelissen 4/2003-5/2004
*/
#define MODULE_BIT 0x20000000
@@ -54,21 +54,9 @@ void MOVE_CURSOR(uint16 x, uint16 y)
si->cursor.x = x;
si->cursor.y = y;
switch(si->dm.space)
{
case B_CMAP8:
h_adjust = 0x03;
break;
case B_RGB15_LITTLE:case B_RGB16_LITTLE:
h_adjust = 0x01;
break;
case B_RGB32_LITTLE:
h_adjust = 0x00;
break;
default:
h_adjust = 0x03;
break;
}
/* setting up minimum amount to scroll not needed:
* Neomagic cards can always do pixelprecise panning */
h_adjust = 0x00;
/* if internal panel is active correct visible screensize! */
if (nm_general_output_read() & 0x02)
src/add-ons/accelerants/neomagic/SetDisplayMode.c
+6 -5
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@@ -170,20 +170,21 @@ status_t MOVE_DISPLAY(uint16 h_display_start, uint16 v_display_start)
LOG(4,("MOVE_DISPLAY: h %d, v %d\n", h_display_start, v_display_start));
/* reset lower bits, don't return an error! */
/* Neomagic cards support pixelprecise panning in all modes:
* No stepping granularity needed! */
/* determine bits used for the colordepth */
switch(si->dm.space)
{
case B_CMAP8:
colour_depth=8;
h_display_start &= ~0x03;
break;
case B_RGB15_LITTLE: case B_RGB16_LITTLE:
case B_RGB15_LITTLE:
case B_RGB16_LITTLE:
colour_depth=16;
h_display_start &= ~0x01;
break;
case B_RGB24_LITTLE:
colour_depth=24;
h_display_start &= ~0x03;
break;
default:
return B_ERROR;
src/add-ons/accelerants/neomagic/engine/nm_crtc.c
+23 -7
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@@ -481,12 +481,10 @@ status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp)
timeout++;
}
/* the neomagic framebuffer startadress is given in 32bit words */
startadd >>= 2;
/* set standard VGA registers */
ISACRTCW(FBSTADDH, ((startadd & 0x00FF00) >> 8));
ISACRTCW(FBSTADDL, (startadd & 0x0000FF));
/* (startadress in 32bit words (b2 - b17) */
ISACRTCW(FBSTADDH, ((startadd & 0x03fc00) >> 10));
ISACRTCW(FBSTADDL, ((startadd & 0x0003fc) >> 2));
/* set NM extended register */
//fixme: NM2380 _must_ have one more bit (has >4Mb RAM)!!
@@ -496,9 +494,27 @@ status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp)
/* we need to wait a bit or the card will mess-up it's register values.. (NM2160) */
snooze(10);
if (si->ps.card_type < NM2200)
ISAGRPHW(FBSTADDE,(((startadd >> 16) & 0x07) | (val & 0xf8)));
/* extended bits: (b18-20) */
ISAGRPHW(FBSTADDE,(((startadd >> 18) & 0x07) | (val & 0xf8)));
else
ISAGRPHW(FBSTADDE,(((startadd >> 16) & 0x0f) | (val & 0xf0)));
/* extended bits: (b18-21) */
ISAGRPHW(FBSTADDE,(((startadd >> 18) & 0x0f) | (val & 0xf0)));
/* set byte adress: (b0 - 1):
* Neomagic cards work with _pixel_ offset here. */
switch(bpp)
{
case 8:
ISAATBW(HORPIXPAN, (startadd & 0x00000003));
break;
case 15:
case 16:
ISAATBW(HORPIXPAN, ((startadd & 0x00000002) >> 1));
break;
case 24:
ISAATBW(HORPIXPAN, ((4 - (startadd & 0x00000003)) & 0x03));
break;
}
return B_OK;
}
src/add-ons/accelerants/neomagic/engine/nm_general.c
+1 -1
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@@ -47,7 +47,7 @@ status_t nm_general_powerup()
{
status_t status;
LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.06-14 running.\n"));
LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.06-15 running.\n"));
/* detect card type and power it up */
switch(CFGR(DEVID))