i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

* Added some cpuid eax == 1 feature definitions to arch_cpu.h

Browse Source 
* Renamed IA32_MTR_WRITE_COMBINED to IA32_MTR_WRITE_COMBINING.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15559 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2005-12-16 12:25:49 +00:00
parent 348c7214f5
commit 7d7f4675bb
4 changed files with 9 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
headers/private/kernel/arch/x86/arch_cpu.h
+6 -1
View File
@@ -21,12 +21,17 @@
#define IA32_MSR_MTRR_PHYSICAL_BASE_0 0x200
#define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201
// cpuid eax 1 features
#define IA32_FEATURE_MTRR (1UL << 12)
#define IA32_FEATURE_GLOBAL_PAGES (1UL << 13)
// cr4 flags
#define IA32_CR4_GLOBAL_PAGES (1UL << 7)
// Memory type ranges
#define IA32_MTR_UNCACHED 0
#define IA32_MTR_WRITE_COMBINED 1
#define IA32_MTR_WRITE_COMBINING 1
#define IA32_MTR_WRITE_THROUGH 4
#define IA32_MTR_WRITE_PROTECTED 5
#define IA32_MTR_WRITE_BACK 6
src/system/kernel/arch/x86/arch_system_info.c
+1 -1
View File
@@ -93,7 +93,7 @@ arch_system_info_init(struct kernel_args *args)
else if (!strncmp(cpuInfo.eax_0.vendor_id, "RiseRiseRise", 12))
base = B_CPU_RISE_x86;
else if (!strncmp(cpuInfo.eax_0.vendor_id, "CentaurHauls", 12))
base = B_CPU_IDT_x86;
base = B_CPU_VIA_IDT_x86;
else if (!strncmp(cpuInfo.eax_0.vendor_id, "NexGenDriven", 12))
// ToDo: add NexGen CPU types
base = B_CPU_x86;
src/system/kernel/arch/x86/arch_vm.c
+1 -1
View File
@@ -106,7 +106,7 @@ set_memory_type(int32 id, uint64 base, uint64 length, uint32 type)
type = IA32_MTR_UNCACHED;
break;
case B_MTR_WC:
type = IA32_MTR_WRITE_COMBINED;
type = IA32_MTR_WRITE_COMBINING;
break;
case B_MTR_WT:
type = IA32_MTR_WRITE_THROUGH;
src/system/kernel/arch/x86/arch_vm_translation_map.c
+1 -3
View File
@@ -26,8 +26,6 @@
# define TRACE(x) ;
#endif
#define IA32_GLOBAL_PAGE_FEATURE (1UL << 13)
// 256 MB of iospace
#define IOSPACE_SIZE (256*1024*1024)
// put it 256 MB into kernel space
@@ -941,7 +939,7 @@ arch_vm_translation_map_init(kernel_args *args)
// enable global page feature if available
get_current_cpuid(&info, 1);
if (info.eax_1.features & IA32_GLOBAL_PAGE_FEATURE) {
if (info.eax_1.features & IA32_FEATURE_GLOBAL_PAGES) {
// this prevents kernel pages from being flushed from TLB on context-switch
x86_write_cr4(x86_read_cr4() | IA32_CR4_GLOBAL_PAGES);
}