intel extreme: skylake sets color, base and address, no resolution and refresh yet
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@@ -762,6 +762,14 @@ struct intel_free_graphics_memory {
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#define DISPLAY_CONTROL_RGB15 (4UL << 26)
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#define DISPLAY_CONTROL_RGB16 (5UL << 26)
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#define DISPLAY_CONTROL_RGB32 (6UL << 26)
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#define DISPLAY_CONTROL_RGB64 (0x0cUL << 26)
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// Skylake
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#define DISPLAY_CONTROL_COLOR_MASK_SKY (0x0fUL << 24)
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#define DISPLAY_CONTROL_CMAP8_SKY (0x0cUL << 24)
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#define DISPLAY_CONTROL_RGB15_SKY (0x0eUL << 24)
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#define DISPLAY_CONTROL_RGB16_SKY (0x0eUL << 24)
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#define DISPLAY_CONTROL_RGB32_SKY (0x04UL << 24)
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#define DISPLAY_CONTROL_RGB64_SKY (0x06UL << 24)
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// INTEL_DISPLAY_A_PIPE_CONTROL ILK+
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#define INTEL_PIPE_DITHER_TYPE_MASK (0x0000000c)
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@@ -38,12 +38,21 @@ void
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program_pipe_color_modes(uint32 colorMode)
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{
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// All pipes get the same color mode
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write32(INTEL_DISPLAY_A_CONTROL, (read32(INTEL_DISPLAY_A_CONTROL)
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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write32(INTEL_DISPLAY_A_CONTROL, (read32(INTEL_DISPLAY_A_CONTROL)
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& ~(DISPLAY_CONTROL_COLOR_MASK_SKY | DISPLAY_CONTROL_GAMMA))
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| colorMode);
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write32(INTEL_DISPLAY_B_CONTROL, (read32(INTEL_DISPLAY_B_CONTROL)
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& ~(DISPLAY_CONTROL_COLOR_MASK_SKY | DISPLAY_CONTROL_GAMMA))
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| colorMode);
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} else {
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write32(INTEL_DISPLAY_A_CONTROL, (read32(INTEL_DISPLAY_A_CONTROL)
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& ~(DISPLAY_CONTROL_COLOR_MASK | DISPLAY_CONTROL_GAMMA))
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| colorMode);
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write32(INTEL_DISPLAY_B_CONTROL, (read32(INTEL_DISPLAY_B_CONTROL)
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| colorMode);
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write32(INTEL_DISPLAY_B_CONTROL, (read32(INTEL_DISPLAY_B_CONTROL)
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& ~(DISPLAY_CONTROL_COLOR_MASK | DISPLAY_CONTROL_GAMMA))
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| colorMode);
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| colorMode);
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}
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}
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@@ -232,6 +232,11 @@ intel_wait_engine_idle(void)
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{
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CALLED();
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// Skylake acc engine not yet functional (stalls)
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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return;
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}
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{
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QueueCommands queue(gInfo->shared_info->primary_ring_buffer);
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queue.PutFlush();
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@@ -48,23 +48,39 @@ get_color_space_format(const display_mode &mode, uint32 &colorMode,
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switch (mode.space) {
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case B_RGB32_LITTLE:
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colorMode = DISPLAY_CONTROL_RGB32;
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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colorMode = DISPLAY_CONTROL_RGB32_SKY;
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} else {
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colorMode = DISPLAY_CONTROL_RGB32;
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}
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bytesPerPixel = 4;
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bitsPerPixel = 32;
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break;
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case B_RGB16_LITTLE:
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colorMode = DISPLAY_CONTROL_RGB16;
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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colorMode = DISPLAY_CONTROL_RGB16_SKY;
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} else {
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colorMode = DISPLAY_CONTROL_RGB16;
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}
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bytesPerPixel = 2;
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bitsPerPixel = 16;
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break;
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case B_RGB15_LITTLE:
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colorMode = DISPLAY_CONTROL_RGB15;
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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colorMode = DISPLAY_CONTROL_RGB15_SKY;
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} else {
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colorMode = DISPLAY_CONTROL_RGB15;
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}
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bytesPerPixel = 2;
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bitsPerPixel = 15;
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break;
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case B_CMAP8:
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default:
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colorMode = DISPLAY_CONTROL_CMAP8;
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if (gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_LAKE)) {
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colorMode = DISPLAY_CONTROL_CMAP8_SKY;
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} else {
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colorMode = DISPLAY_CONTROL_CMAP8;
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}
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bytesPerPixel = 1;
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bitsPerPixel = 8;
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break;
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@@ -121,8 +137,10 @@ set_frame_buffer_registers(uint32 offset)
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|| sharedInfo.device_type.InGroup(INTEL_GROUP_G4x)
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|| sharedInfo.device_type.InGroup(INTEL_GROUP_ILK)
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|| sharedInfo.device_type.InFamily(INTEL_FAMILY_SER5)
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|| sharedInfo.device_type.InFamily(INTEL_FAMILY_LAKE)
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|| sharedInfo.device_type.InFamily(INTEL_FAMILY_SOC0)) {
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if (sharedInfo.device_type.InGroup(INTEL_GROUP_HAS)) {
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// || sharedInfo.device_type.InGroup(INTEL_GROUP_SKY)) {
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write32(INTEL_DISPLAY_A_OFFSET_HAS + offset,
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((uint32)mode.v_display_start << 16)
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| (uint32)mode.h_display_start);
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@@ -463,8 +481,13 @@ intel_set_display_mode(display_mode* mode)
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// Always set both pipes, just in case
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// TODO rework this when we get multiple head support with different
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// resolutions
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write32(INTEL_DISPLAY_A_BYTES_PER_ROW, bytesPerRow);
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write32(INTEL_DISPLAY_B_BYTES_PER_ROW, bytesPerRow);
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if (sharedInfo.device_type.InFamily(INTEL_FAMILY_LAKE)) {
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write32(INTEL_DISPLAY_A_BYTES_PER_ROW, bytesPerRow >> 6);
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write32(INTEL_DISPLAY_B_BYTES_PER_ROW, bytesPerRow >> 6);
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} else {
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write32(INTEL_DISPLAY_A_BYTES_PER_ROW, bytesPerRow);
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write32(INTEL_DISPLAY_B_BYTES_PER_ROW, bytesPerRow);
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}
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// update shared info
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sharedInfo.current_mode = target;
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@@ -132,7 +132,7 @@ const struct supported_device {
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{0x1904, 0x190a, INTEL_MODEL_SKYS, "Skylake GT1"},
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{0x1904, 0x190b, INTEL_MODEL_SKY, "Skylake GT1"},
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{0x1904, 0x190e, INTEL_MODEL_SKYM, "Skylake GT1"},
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{0x1904, 0x1912, INTEL_MODEL_SKY, "Skylake GT2"},
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{0x191f, 0x1912, INTEL_MODEL_SKY, "Skylake GT2"}, // confirmed
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{0x1904, 0x1916, INTEL_MODEL_SKYM, "Skylake GT2"},
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{0x1904, 0x191a, INTEL_MODEL_SKYS, "Skylake GT2"},
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{0x1904, 0x191b, INTEL_MODEL_SKY, "Skylake GT2"},
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@@ -105,6 +105,7 @@ const struct supported_device {
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{0x0d26, INTEL_MODEL_HASM, "Haswell Mobile"},
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{0x0a16, INTEL_MODEL_HASM, "Haswell Mobile"},
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{0x1912, INTEL_MODEL_SKY, "Skylake GT2"}, // testing..
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#if 0
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// The driver does not make any attempt to handle this modern hardware.
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// Better let VESA/UEFI do it.
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