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radeon_hd: slight adjustment to PLL choosing on DP

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This commit is contained in:
Alexander von Gluck IV
2012-08-14 19:58:08 -05:00
parent 51014b9eb6
commit baa7999a48
1 changed files with 4 additions and 4 deletions
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src/add-ons/accelerants/radeon_hd/pll.cpp
+4 -4
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@@ -942,15 +942,15 @@ pll_pick(uint32 connectorIndex)
return B_OK;
} else if (info.dceMajor >= 4) {
if (connector_is_dp(connectorIndex)) {
if (info.dceMajor >= 6) {
if (gInfo->dpExternalClock) {
pll->id = ATOM_PPLL_INVALID;
return B_OK;
} else if (info.dceMajor >= 6) {
pll->id = ATOM_PPLL1;
return B_OK;
} else if (info.dceMajor >= 5) {
pll->id = ATOM_DCPLL;
return B_OK;
} else if (gInfo->dpExternalClock) {
pll->id = ATOM_PPLL_INVALID;
return B_OK;
}
}
pll->id = ATOM_PPLL1;