sdhci and mmc implementation
sdhci: - Add semaphore for interrupt management - Add basic operations (setting clock, executing a command) - Add early initialization (clocks and power up) - Wrap the bus in a C++ class to ease usage - Expose API to MMC bus manager - TODO: manage card insertion and removal interrupts - TODO: use MSI when available mmc_bus: - Implements SD card management independant of the way we access the bus (later on different drivers can provide the same API as SDHCI) - Worker thread to do the initialization - Implement card initialization process up until getting an RCA from the card. This is the generic part to assign an ID to the card, after this point commands can be targetted at the specific card so it can be handed over to the mmc_disk driver. - TODO: initialization for non-SDHC cards which do not reply to CMD8. Change-Id: I71950ca3ce206378a68fa7f97c19f638183d6cdd Reviewed-on: https://review.haiku-os.org/c/1032 Reviewed-by: waddlesplash <[email protected]>
This commit is contained in:
Adrien Destugues
committed by
waddlesplash
waddlesplash
parent
1f93ed9936
commit
ff76d2df8e
@@ -0,0 +1,28 @@
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/*
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* Copyright 2019, Haiku, Inc. All Rights Reserved.
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* Distributed under the terms of the MIT License.
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*
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* Authors:
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* Adrien Destugues, [email protected]
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*/
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#ifndef _MMC_H
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#define _MMC_H
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#include <device_manager.h>
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#define MMC_BUS_MODULE_NAME "bus_managers/mmc_bus/driver_v1"
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// Interface between mmc_bus and underlying implementation
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typedef struct mmc_bus_interface {
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driver_module_info info;
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status_t (*set_clock)(void* controller, uint32_t kilohertz);
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status_t (*execute_command)(void* controller, uint8_t command,
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uint32_t argument, uint32_t* result);
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} mmc_bus_interface;
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#endif /* _MMC_H */
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@@ -1,6 +1,7 @@
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SubDir HAIKU_TOP src add-ons kernel bus_managers mmc ;
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UsePrivateKernelHeaders ;
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UsePrivateHeaders drivers ;
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KernelAddon mmc_bus :
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mmc_module.cpp
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@@ -7,6 +7,10 @@
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*/
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#include "mmc_bus.h"
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#include <Errors.h>
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#include <stdint.h>
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MMCBus::MMCBus(device_node* node)
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:
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@@ -14,9 +18,11 @@ MMCBus::MMCBus(device_node* node)
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fController(NULL),
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fCookie(NULL),
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fStatus(B_OK),
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fDriverCookie(NULL)
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fWorkerThread(0)
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{
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CALLED();
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// Get the parent info, it includes the API to send commands to the hardware
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device_node* parent = gDeviceManager->get_parent_node(node);
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fStatus = gDeviceManager->get_driver(parent,
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(driver_module_info**)&fController, &fCookie);
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@@ -27,12 +33,25 @@ MMCBus::MMCBus(device_node* node)
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strerror(fStatus));
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return;
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}
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// TODO enumerate the bus (in a separate thread?)
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fWorkerThread = spawn_kernel_thread(WorkerThread, "SD bus controller",
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B_NORMAL_PRIORITY, this);
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resume_thread(fWorkerThread);
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}
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MMCBus::~MMCBus()
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{
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CALLED();
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// stop worker thread
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fStatus = B_SHUTTING_DOWN;
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status_t result;
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if (fWorkerThread != 0)
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wait_for_thread(fWorkerThread, &result);
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// TODO power off cards, stop clock, etc if needed.
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}
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@@ -41,3 +60,98 @@ MMCBus::InitCheck()
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{
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return fStatus;
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}
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status_t
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MMCBus::ExecuteCommand(uint8_t command, uint32_t argument, uint32_t* response)
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{
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return fController->execute_command(fCookie, command, argument, response);
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}
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status_t
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MMCBus::WorkerThread(void* cookie)
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{
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TRACE("worker thread spawned.\n");
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MMCBus* bus = (MMCBus*)cookie;
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uint32_t response;
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// FIXME wait for bus to signal a card is inserted
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// We assume the bus defaults to 400kHz clock and has already powered on
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// cards.
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// Reset all cards on the bus
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bus->ExecuteCommand(0, 0, NULL);
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// Probe the voltage range
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// FIXME MMC cards will not reply to this! They expect CMD1 instead
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// SD v1 cards will also not reply, but we can proceed to ACMD41
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// If ACMD41 also does not work, it may be an SDIO card, too
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uint32_t probe = (1 << 8) | 0x55;
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bus->ExecuteCommand(8, probe, &response);
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if (response != probe) {
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ERROR("Card does not support voltage range (expected %x, reply %x)\n",
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probe, response);
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// TODO what now?
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}
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// Probe OCR, waiting for card to become ready
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uint32_t ocr;
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do {
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uint32_t cardStatus;
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while (bus->ExecuteCommand(55, 0, &cardStatus)
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== B_BUSY) {
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// FIXME we shouldn't get here if we handle CMD8 failure properly
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ERROR("Card locked after CMD8...\n");
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snooze(1000000);
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}
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if ((cardStatus & 0xFFFF8000) != 0)
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ERROR("SD card reports error\n");
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if ((cardStatus & (1 << 5)) == 0)
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ERROR("Card did not enter ACMD mode");
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bus->ExecuteCommand(41, (1 << 30) | 0xFF8000, &ocr);
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if ((ocr & (1 << 31)) == 0) {
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TRACE("Card is busy\n");
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snooze(100000);
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}
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} while (((ocr & (1 << 31)) == 0));
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if (ocr & (1 << 30))
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TRACE("Card is SDHC");
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if (ocr & (1 << 29))
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TRACE("Card supports UHS-II");
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if (ocr & (1 << 24))
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TRACE("Card supports 1.8v");
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TRACE("Voltage range: %x\n", ocr & 0xFFFFFF);
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// TODO send CMD11 to switch to low voltage mode if card supports it?
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uint32_t cid[4];
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bus->ExecuteCommand(2, 0, cid);
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TRACE("Manufacturer: %02x%c%c\n", cid[3] >> 16, cid[3] >> 8, cid[3]);
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TRACE("Name: %c%c%c%c%c\n", cid[2] >> 24, cid[2] >> 16, cid[2] >> 8,
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cid[2], cid[1] >> 24);
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TRACE("Revision: %d.%d\n", (cid[1] >> 20) & 0xF, (cid[1] >> 16) & 0xF);
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TRACE("Serial number: %x\n", (cid[1] << 16) | (cid[0] >> 16));
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TRACE("Date: %d/%d\n", cid[0] & 0xF, 2000 + ((cid[0] >> 4) & 0xFF));
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bus->ExecuteCommand(3, 0, &response);
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TRACE("RCA: %x Status: %x\n", response >> 16, response & 0xFFFF);
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if ((response & 0xFF00) != 0x5000)
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ERROR("Card did not enter data state\n");
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// The card now has an RCA and it entered the data phase, which means our
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// initializing job is over, we can pass it on to the mmc_disk driver.
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// TODO publish child device for the card
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// TODO fill it with attributes from the CID
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// TODO iterate CMD2/CMD3 to assign an RCA to all cards (and publish devices
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// for each of them)
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}
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@@ -15,7 +15,7 @@
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#include <lock.h>
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#include <util/AutoLock.h>
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#include "../../busses/mmc/sdhci_pci.h"
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#include "mmc.h"
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#define MMCBUS_TRACE
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@@ -36,18 +36,23 @@ class MMCBus;
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class MMCBus {
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public:
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MMCBus(device_node *node);
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~MMCBus();
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status_t InitCheck();
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MMCBus(device_node *node);
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~MMCBus();
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status_t InitCheck();
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private:
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status_t ExecuteCommand(uint8_t command,
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uint32_t argument, uint32_t* response);
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static status_t WorkerThread(void*);
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private:
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device_node* fNode;
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sdhci_mmc_bus_interface* fController;
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void* fCookie;
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status_t fStatus;
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void* fDriverCookie;
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device_node* fNode;
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mmc_bus_interface* fController;
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void* fCookie;
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status_t fStatus;
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thread_id fWorkerThread;
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};
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#endif /*MMC_BUS_H*/
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#endif /*MMC_BUS_H*/
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@@ -8,6 +8,9 @@
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#include "mmc_bus.h"
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#define MMC_BUS_DEVICE_NAME "bus_managers/mmc_bus/device/v1"
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device_manager_info* gDeviceManager = NULL;
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@@ -53,23 +56,13 @@ status_t
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mmc_bus_added_device(device_node* parent)
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{
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CALLED();
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uint16 deviceType;
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if (gDeviceManager->get_attr_uint16(parent,
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SDHCI_DEVICE_TYPE_ITEM, &deviceType, true) != B_OK) {
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TRACE("device is missing\n");
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return B_ERROR;
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}
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TRACE("MMC bus device added\n");
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device_attr attributes[] = {
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{ B_DEVICE_BUS, B_STRING_TYPE, { string: "mmc bus"}},
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{ SDHCI_DEVICE_TYPE_ITEM, B_UINT16_TYPE,
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{ ui16: deviceType }},
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{ NULL }
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};
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return gDeviceManager->register_node(parent, MMC_BUS_MODULE_NAME,
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return gDeviceManager->register_node(parent, MMC_BUS_DEVICE_NAME,
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attributes, NULL, NULL);
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}
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@@ -93,7 +86,7 @@ std_ops(int32 op, ...)
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driver_module_info mmc_bus_device_module = {
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{
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MMC_BUS_MODULE_NAME,
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MMC_BUS_DEVICE_NAME,
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0,
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std_ops
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},
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@@ -111,7 +104,7 @@ driver_module_info mmc_bus_device_module = {
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driver_module_info mmc_bus_controller_module = {
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{
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SDHCI_BUS_CONTROLLER_MODULE_NAME,
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MMC_BUS_MODULE_NAME,
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0,
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&std_ops
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},
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@@ -2,6 +2,8 @@ SubDir HAIKU_TOP src add-ons kernel busses mmc ;
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SubDirC++Flags -fno-rtti ;
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UsePrivateHeaders drivers ;
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KernelAddon sdhci_pci :
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sdhci_pci.cpp
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;
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@@ -14,6 +14,7 @@
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#include <KernelExport.h>
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#include "mmc.h"
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#include "sdhci_pci.h"
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@@ -35,75 +36,234 @@
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#define SLOT_NUMBER "device/slot"
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#define BAR_INDEX "device/bar"
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typedef struct {
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struct registers* fRegisters;
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uint8_t fIrq;
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} sdhci_pci_mmc_bus_info;
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class SdhciBus {
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public:
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SdhciBus(struct registers* registers, uint8_t irq);
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~SdhciBus();
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void EnableInterrupts(uint32_t mask);
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status_t ExecuteCommand(uint8_t command, uint32_t argument,
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uint32_t* response);
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int32 HandleInterrupt();
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status_t InitCheck();
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void Reset();
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void SetClock(int kilohertz);
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private:
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void DumpRegisters(uint8_t slot);
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bool PowerOn();
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void RecoverError();
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private:
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struct registers* fRegisters;
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uint8_t fIrq;
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sem_id fSemaphore;
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status_t fStatus;
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};
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device_manager_info* gDeviceManager;
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device_module_info* gSDHCIDeviceController;
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device_module_info* gMMCBusController;
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static pci_x86_module_info* sPCIx86Module;
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static void
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sdhci_register_dump(uint8_t slot, struct registers* regs)
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static int32
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sdhci_generic_interrupt(void* data)
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{
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SdhciBus* bus = (SdhciBus*)data;
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return bus->HandleInterrupt();
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}
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SdhciBus::SdhciBus(struct registers* registers, uint8_t irq)
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:
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fRegisters(registers),
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fIrq(irq),
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fSemaphore(0)
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{
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if (irq == 0 || irq == 0xff) {
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ERROR("PCI IRQ not assigned\n");
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fStatus = B_BAD_DATA;
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return;
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}
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fSemaphore = create_sem(0, "SDHCI command");
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fStatus = install_io_interrupt_handler(fIrq,
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sdhci_generic_interrupt, this, 0);
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if (fStatus != B_OK) {
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ERROR("can't install interrupt handler\n");
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return;
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}
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// First of all, we have to make sure we are in a sane state. The easiest
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// way is to reset everything.
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Reset();
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// Then we configure the clock to the frequency needed for initialization
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SetClock(400);
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// And we turn on the power supply to the card
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// FIXME maybe this should only be done when a card is inserted?
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if (!PowerOn()) {
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ERROR("Failed to power on the card\n");
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fStatus = B_NO_INIT;
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return;
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}
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// FIXME do we need all these? Wouldn't card insertion/removal and command
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// completion be enough?
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EnableInterrupts(SDHCI_INT_CMD_CMP
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| SDHCI_INT_TRANS_CMP | SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM
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| SDHCI_INT_TIMEOUT | SDHCI_INT_CRC | SDHCI_INT_INDEX
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| SDHCI_INT_BUS_POWER | SDHCI_INT_END_BIT);
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}
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SdhciBus::~SdhciBus()
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{
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if (fSemaphore != 0)
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delete_sem(fSemaphore);
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EnableInterrupts(0);
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if (fIrq != 0)
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remove_io_interrupt_handler(fIrq, sdhci_generic_interrupt, this);
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area_id regs_area = area_for(fRegisters);
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delete_area(regs_area);
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}
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void
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SdhciBus::DumpRegisters(uint8_t slot)
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{
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#ifdef TRACE_SDHCI
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TRACE("Register values for slot %d:\n", slot);
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TRACE("system_address: %d\n", regs->system_address);
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TRACE("%d blocks of size %d\n", regs->block_count, regs->block_size);
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TRACE("argument: %d\n", regs->argument);
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TRACE("transfer_mode: %d\n", regs->transfer_mode);
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TRACE("command: %d\n", regs->command.Bits());
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TRACE("system_address: %d\n", fRegisters->system_address);
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TRACE("%d blocks of size %d\n", fRegisters->block_count,
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fRegisters->block_size);
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TRACE("argument: %x\n", fRegisters->argument);
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TRACE("transfer_mode: %d\n", fRegisters->transfer_mode);
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TRACE("command: %x\n", fRegisters->command.Bits());
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TRACE("response:");
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for (int i = 0; i < 8; i++)
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dprintf(" %d", regs->response[i]);
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for (int i = 0; i < 4; i++)
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dprintf(" %d", fRegisters->response[i]);
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dprintf("\n");
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TRACE("buffer_data_port: %d\n", regs->buffer_data_port);
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TRACE("present_state: %x\n", regs->present_state.Bits());
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TRACE("power_control: %d\n", regs->power_control.Bits());
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TRACE("host_control: %d\n", regs->host_control);
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TRACE("wakeup_control: %d\n", regs->wakeup_control);
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TRACE("block_gap_control: %d\n", regs->block_gap_control);
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TRACE("clock_control: %x\n", regs->clock_control.Bits());
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TRACE("software_reset: %d\n", regs->software_reset.Bits());
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TRACE("timeout_control: %d\n", regs->timeout_control);
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TRACE("buffer_data_port: %d\n", fRegisters->buffer_data_port);
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TRACE("present_state: %x\n", fRegisters->present_state.Bits());
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TRACE("power_control: %d\n", fRegisters->power_control.Bits());
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TRACE("host_control: %d\n", fRegisters->host_control);
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TRACE("wakeup_control: %d\n", fRegisters->wakeup_control);
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TRACE("block_gap_control: %d\n", fRegisters->block_gap_control);
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TRACE("clock_control: %x\n", fRegisters->clock_control.Bits());
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TRACE("software_reset: %d\n", fRegisters->software_reset.Bits());
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TRACE("timeout_control: %d\n", fRegisters->timeout_control);
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TRACE("interrupt_status: %x enable: %x signal: %x\n",
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regs->interrupt_status, regs->interrupt_status_enable,
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regs->interrupt_signal_enable);
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TRACE("auto_cmd12_error_status: %d\n", regs->auto_cmd12_error_status);
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TRACE("capabilities: %lld\n", regs->capabilities.Bits());
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fRegisters->interrupt_status, fRegisters->interrupt_status_enable,
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fRegisters->interrupt_signal_enable);
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TRACE("auto_cmd12_error_status: %d\n", fRegisters->auto_cmd12_error_status);
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TRACE("capabilities: %lld\n", fRegisters->capabilities.Bits());
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TRACE("max_current_capabilities: %lld\n",
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regs->max_current_capabilities);
|
||||
TRACE("slot_interrupt_status: %d\n", regs->slot_interrupt_status);
|
||||
fRegisters->max_current_capabilities);
|
||||
TRACE("slot_interrupt_status: %d\n", fRegisters->slot_interrupt_status);
|
||||
TRACE("host_controller_version spec %x vendor %x\n",
|
||||
regs->host_controller_version.specVersion,
|
||||
regs->host_controller_version.vendorVersion);
|
||||
fRegisters->host_controller_version.specVersion,
|
||||
fRegisters->host_controller_version.vendorVersion);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sdhci_reset(struct registers* regs)
|
||||
void
|
||||
SdhciBus::EnableInterrupts(uint32_t mask)
|
||||
{
|
||||
// if card is not present then no point of reseting the registers
|
||||
if (!regs->present_state.IsCardInserted())
|
||||
return;
|
||||
|
||||
// enabling software reset all
|
||||
regs->software_reset.ResetAll();
|
||||
fRegisters->interrupt_status_enable = mask;
|
||||
fRegisters->interrupt_signal_enable = mask;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sdhci_set_clock(struct registers* regs)
|
||||
status_t
|
||||
SdhciBus::ExecuteCommand(uint8_t command, uint32_t argument, uint32_t* response)
|
||||
{
|
||||
int base_clock = regs->capabilities.BaseClockFrequency();
|
||||
// Try to get as close to 400kHz as possible, but not faster
|
||||
int divider = base_clock * 1000 / 400;
|
||||
TRACE("ExecuteCommand(%d, %x)\n", command, argument);
|
||||
if (fRegisters->present_state.CommandInhibit()) {
|
||||
ERROR("Execution aborted, command inhibit\n");
|
||||
return B_BUSY;
|
||||
}
|
||||
|
||||
if (regs->host_controller_version.specVersion <= 1) {
|
||||
fRegisters->argument = argument;
|
||||
|
||||
uint32_t replyType;
|
||||
|
||||
switch(command) {
|
||||
case 0:
|
||||
replyType = Command::kNoReplyType;
|
||||
break;
|
||||
case 2:
|
||||
replyType = Command::kR2Type;
|
||||
break;
|
||||
case 55:
|
||||
replyType = Command::kR1Type;
|
||||
break;
|
||||
case 41: // ACMD
|
||||
replyType = Command::kR3Type;
|
||||
break;
|
||||
case 3:
|
||||
replyType = Command::kR6Type;
|
||||
break;
|
||||
case 8:
|
||||
replyType = Command::kR7Type;
|
||||
break;
|
||||
default:
|
||||
ERROR("Unknown command\n");
|
||||
return B_BAD_DATA;
|
||||
}
|
||||
|
||||
fRegisters->command.SendCommand(command, replyType);
|
||||
acquire_sem(fSemaphore);
|
||||
|
||||
if (replyType == Command::kNoReplyType) {
|
||||
// No response
|
||||
} else if (replyType == Command::kR2Type) {
|
||||
// 128 bit response
|
||||
response[0] = fRegisters->response[0];
|
||||
response[1] = fRegisters->response[1];
|
||||
response[2] = fRegisters->response[2];
|
||||
response[3] = fRegisters->response[3];
|
||||
} else {
|
||||
// 32 bit response
|
||||
*response = fRegisters->response[0];
|
||||
}
|
||||
|
||||
ERROR("Command execution complete\n");
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
status_t
|
||||
SdhciBus::InitCheck()
|
||||
{
|
||||
return fStatus;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
SdhciBus::Reset()
|
||||
{
|
||||
fRegisters->software_reset.ResetAll();
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
SdhciBus::SetClock(int kilohertz)
|
||||
{
|
||||
int base_clock = fRegisters->capabilities.BaseClockFrequency();
|
||||
// Try to get as close to 400kHz as possible, but not faster
|
||||
int divider = base_clock * 1000 / kilohertz;
|
||||
|
||||
if (fRegisters->host_controller_version.specVersion <= 1) {
|
||||
// Old controller only support power of two dividers up to 256,
|
||||
// round to next power of two up to 256
|
||||
if (divider > 256)
|
||||
@@ -116,7 +276,7 @@ sdhci_set_clock(struct registers* regs)
|
||||
divider++;
|
||||
}
|
||||
|
||||
divider = regs->clock_control.SetDivider(divider);
|
||||
divider = fRegisters->clock_control.SetDivider(divider);
|
||||
|
||||
// Log the value after possible rounding by SetDivider (only even values
|
||||
// are allowed).
|
||||
@@ -124,16 +284,16 @@ sdhci_set_clock(struct registers* regs)
|
||||
base_clock * 1000 / divider);
|
||||
|
||||
// We have set the divider, now we can enable the internal clock.
|
||||
regs->clock_control.EnableInternal();
|
||||
fRegisters->clock_control.EnableInternal();
|
||||
|
||||
// wait until internal clock is stabilized
|
||||
while (!(regs->clock_control.InternalStable()));
|
||||
while (!(fRegisters->clock_control.InternalStable()));
|
||||
|
||||
regs->clock_control.EnablePLL();
|
||||
while (!(regs->clock_control.InternalStable()));
|
||||
fRegisters->clock_control.EnablePLL();
|
||||
while (!(fRegisters->clock_control.InternalStable()));
|
||||
|
||||
// Finally, route the clock to the SD card
|
||||
regs->clock_control.EnableSD();
|
||||
fRegisters->clock_control.EnableSD();
|
||||
}
|
||||
|
||||
|
||||
@@ -144,31 +304,28 @@ sdhci_stop_clock(struct registers* regs)
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sdhci_set_power(struct registers* _regs)
|
||||
bool
|
||||
SdhciBus::PowerOn()
|
||||
{
|
||||
uint8_t supportedVoltages = _regs->capabilities.SupportedVoltages();
|
||||
if (!fRegisters->present_state.IsCardInserted()) {
|
||||
TRACE("Card not inserted, not powering on for now\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
uint8_t supportedVoltages = fRegisters->capabilities.SupportedVoltages();
|
||||
if ((supportedVoltages & Capabilities::k3v3) != 0)
|
||||
_regs->power_control.SetVoltage(PowerControl::k3v3);
|
||||
fRegisters->power_control.SetVoltage(PowerControl::k3v3);
|
||||
else if ((supportedVoltages & Capabilities::k3v0) != 0)
|
||||
_regs->power_control.SetVoltage(PowerControl::k3v0);
|
||||
fRegisters->power_control.SetVoltage(PowerControl::k3v0);
|
||||
else if ((supportedVoltages & Capabilities::k1v8) != 0)
|
||||
_regs->power_control.SetVoltage(PowerControl::k1v8);
|
||||
fRegisters->power_control.SetVoltage(PowerControl::k1v8);
|
||||
else {
|
||||
_regs->power_control.PowerOff();
|
||||
fRegisters->power_control.PowerOff();
|
||||
ERROR("No voltage is supported\n");
|
||||
return;
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!_regs->present_state.IsCardInserted()) {
|
||||
TRACE("Card not inserted\n");
|
||||
return;
|
||||
}
|
||||
|
||||
TRACE("Execute CMD0\n");
|
||||
_regs->command.SendCommand(0, false);
|
||||
|
||||
DELAY(1000);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
@@ -176,15 +333,8 @@ static status_t
|
||||
init_bus(device_node* node, void** bus_cookie)
|
||||
{
|
||||
CALLED();
|
||||
status_t status = B_OK;
|
||||
area_id regs_area;
|
||||
volatile uint32_t* regs;
|
||||
uint8_t bar, slot;
|
||||
|
||||
sdhci_pci_mmc_bus_info* bus = new(std::nothrow) sdhci_pci_mmc_bus_info;
|
||||
if (bus == NULL)
|
||||
return B_NO_MEMORY;
|
||||
|
||||
// Get the PCI driver and device
|
||||
pci_device_module_info* pci;
|
||||
pci_device* device;
|
||||
|
||||
@@ -198,9 +348,12 @@ init_bus(device_node* node, void** bus_cookie)
|
||||
if (get_module(B_PCI_X86_MODULE_NAME, (module_info**)&sPCIx86Module)
|
||||
!= B_OK) {
|
||||
sPCIx86Module = NULL;
|
||||
TRACE("PCIx86Module not loaded\n");
|
||||
ERROR("PCIx86Module not loaded\n");
|
||||
// FIXME try probing FDT as well
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint8_t bar, slot;
|
||||
if (gDeviceManager->get_attr_uint8(node, SLOT_NUMBER, &slot, false) < B_OK
|
||||
|| gDeviceManager->get_attr_uint8(node, BAR_INDEX, &bar, false) < B_OK)
|
||||
return -1;
|
||||
@@ -212,6 +365,7 @@ init_bus(device_node* node, void** bus_cookie)
|
||||
int msiCount = sPCIx86Module->get_msi_count(pciInfo.bus,
|
||||
pciInfo.device, pciInfo.function);
|
||||
TRACE("interrupts count: %d\n",msiCount);
|
||||
// FIXME if available, use MSI rather than good old IRQ...
|
||||
|
||||
// enable bus master and io
|
||||
uint16 pcicmd = pci->read_pci_config(device, PCI_command, 2);
|
||||
@@ -219,74 +373,49 @@ init_bus(device_node* node, void** bus_cookie)
|
||||
pcicmd |= PCI_command_master | PCI_command_memory;
|
||||
pci->write_pci_config(device, PCI_command, 2, pcicmd);
|
||||
|
||||
TRACE("init_bus() %p node %p pci %p device %p\n", bus, node,
|
||||
pci, device);
|
||||
|
||||
// mapping the registers by MMUIO method
|
||||
int bar_size = pciInfo->u.h0.base_register_sizes[bar];
|
||||
|
||||
// map the slot registers
|
||||
area_id regs_area;
|
||||
struct registers* _regs;
|
||||
regs_area = map_physical_memory("sdhc_regs_map",
|
||||
pciInfo.u.h0.base_registers[bar],
|
||||
pciInfo.u.h0.base_register_sizes[bar], B_ANY_KERNEL_BLOCK_ADDRESS,
|
||||
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)®s);
|
||||
B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)&_regs);
|
||||
|
||||
if (regs_area < B_OK) {
|
||||
TRACE("mapping failed");
|
||||
ERROR("Could not map registers\n");
|
||||
return B_BAD_VALUE;
|
||||
}
|
||||
|
||||
struct registers* _regs = (struct registers*)regs;
|
||||
bus->fRegisters = _regs;
|
||||
sdhci_reset(_regs);
|
||||
|
||||
// the interrupt is shared between all busses in an SDHC controller, but
|
||||
// they each register an handler. Not a problem, we will just test the
|
||||
// interrupt registers for all busses one after the other and find no
|
||||
// interrupts on the idle busses.
|
||||
bus->fIrq = pciInfo.u.h0.interrupt_line;
|
||||
uint8_t irq = pciInfo.u.h0.interrupt_line;
|
||||
TRACE("irq interrupt line: %d\n", irq);
|
||||
|
||||
TRACE("irq interrupt line: %d\n", bus->fIrq);
|
||||
SdhciBus* bus = new(std::nothrow) SdhciBus(_regs, irq);
|
||||
|
||||
if (bus->fIrq == 0 || bus->fIrq == 0xff) {
|
||||
TRACE("PCI IRQ not assigned\n");
|
||||
if (sPCIx86Module != NULL) {
|
||||
put_module(B_PCI_X86_MODULE_NAME);
|
||||
sPCIx86Module = NULL;
|
||||
}
|
||||
delete_area(regs_area);
|
||||
delete bus;
|
||||
return B_ERROR;
|
||||
}
|
||||
|
||||
status = install_io_interrupt_handler(bus->fIrq,
|
||||
sdhci_generic_interrupt, bus, 0);
|
||||
status_t status = B_NO_MEMORY;
|
||||
if (bus != NULL)
|
||||
status = bus->InitCheck();
|
||||
|
||||
if (status != B_OK) {
|
||||
TRACE("can't install interrupt handler\n");
|
||||
if (sPCIx86Module != NULL) {
|
||||
put_module(B_PCI_X86_MODULE_NAME);
|
||||
sPCIx86Module = NULL;
|
||||
}
|
||||
delete_area(regs_area);
|
||||
delete bus;
|
||||
|
||||
if (bus != NULL)
|
||||
delete bus;
|
||||
else
|
||||
delete_area(regs_area);
|
||||
return status;
|
||||
}
|
||||
TRACE("interrupt handler installed\n");
|
||||
|
||||
_regs->interrupt_status_enable = SDHCI_INT_CMD_CMP
|
||||
| SDHCI_INT_TRANS_CMP | SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM
|
||||
| SDHCI_INT_TIMEOUT | SDHCI_INT_CRC | SDHCI_INT_INDEX
|
||||
| SDHCI_INT_BUS_POWER | SDHCI_INT_END_BIT;
|
||||
_regs->interrupt_signal_enable = SDHCI_INT_CMD_CMP
|
||||
| SDHCI_INT_TRANS_CMP | SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM
|
||||
| SDHCI_INT_TIMEOUT | SDHCI_INT_CRC | SDHCI_INT_INDEX
|
||||
| SDHCI_INT_BUS_POWER | SDHCI_INT_END_BIT;
|
||||
|
||||
sdhci_register_dump(slot, _regs);
|
||||
sdhci_set_clock(_regs);
|
||||
sdhci_set_power(_regs);
|
||||
|
||||
// Store the created object as a cookie, allowing users of the bus to
|
||||
// locate it.
|
||||
*bus_cookie = bus;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -294,41 +423,31 @@ init_bus(device_node* node, void** bus_cookie)
|
||||
static void
|
||||
uninit_bus(void* bus_cookie)
|
||||
{
|
||||
sdhci_pci_mmc_bus_info* bus = (sdhci_pci_mmc_bus_info*)bus_cookie;
|
||||
|
||||
bus->fRegisters->interrupt_signal_enable = 0;
|
||||
bus->fRegisters->interrupt_status_enable = 0;
|
||||
|
||||
remove_io_interrupt_handler(bus->fIrq, sdhci_generic_interrupt, bus);
|
||||
|
||||
area_id regs_area = area_for(bus->fRegisters);
|
||||
delete_area(regs_area);
|
||||
SdhciBus* bus = (SdhciBus*)bus_cookie;
|
||||
delete bus;
|
||||
|
||||
// FIXME do we need to put() the PCI module here?
|
||||
|
||||
delete bus;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sdhci_error_interrupt_recovery(struct registers* _regs)
|
||||
SdhciBus::RecoverError()
|
||||
{
|
||||
_regs->interrupt_signal_enable &= ~(SDHCI_INT_CMD_CMP
|
||||
fRegisters->interrupt_signal_enable &= ~(SDHCI_INT_CMD_CMP
|
||||
| SDHCI_INT_TRANS_CMP | SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM);
|
||||
|
||||
if (_regs->interrupt_status & 7)
|
||||
_regs->software_reset.ResetTransaction();
|
||||
if (fRegisters->interrupt_status & 7)
|
||||
fRegisters->software_reset.ResetTransaction();
|
||||
|
||||
int16_t erorr_status = _regs->interrupt_status;
|
||||
_regs->interrupt_status &= ~(erorr_status);
|
||||
int16_t error_status = fRegisters->interrupt_status;
|
||||
fRegisters->interrupt_status &= ~(error_status);
|
||||
}
|
||||
|
||||
|
||||
int32
|
||||
sdhci_generic_interrupt(void* data)
|
||||
SdhciBus::HandleInterrupt()
|
||||
{
|
||||
sdhci_pci_mmc_bus_info* bus = (sdhci_pci_mmc_bus_info*)data;
|
||||
uint32_t intmask = bus->fRegisters->slot_interrupt_status;
|
||||
uint32_t intmask = fRegisters->slot_interrupt_status;
|
||||
|
||||
if ((intmask == 0) || (intmask == 0xffffffff)) {
|
||||
return B_UNHANDLED_INTERRUPT;
|
||||
@@ -336,20 +455,23 @@ sdhci_generic_interrupt(void* data)
|
||||
|
||||
TRACE("interrupt function called\n");
|
||||
|
||||
// FIXME use the global "slot interrupt" register to quickly decide if an
|
||||
// interrupt is targetted to this slot
|
||||
|
||||
// handling card presence interrupt
|
||||
if (intmask & (SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM)) {
|
||||
uint32_t card_present = ((intmask & SDHCI_INT_CARD_INS) != 0);
|
||||
bus->fRegisters->interrupt_status_enable &= ~(SDHCI_INT_CARD_INS
|
||||
fRegisters->interrupt_status_enable &= ~(SDHCI_INT_CARD_INS
|
||||
| SDHCI_INT_CARD_REM);
|
||||
bus->fRegisters->interrupt_signal_enable &= ~(SDHCI_INT_CARD_INS
|
||||
fRegisters->interrupt_signal_enable &= ~(SDHCI_INT_CARD_INS
|
||||
| SDHCI_INT_CARD_REM);
|
||||
|
||||
bus->fRegisters->interrupt_status_enable |= card_present
|
||||
fRegisters->interrupt_status_enable |= card_present
|
||||
? SDHCI_INT_CARD_REM : SDHCI_INT_CARD_INS;
|
||||
bus->fRegisters->interrupt_signal_enable |= card_present
|
||||
fRegisters->interrupt_signal_enable |= card_present
|
||||
? SDHCI_INT_CARD_REM : SDHCI_INT_CARD_INS;
|
||||
|
||||
bus->fRegisters->interrupt_status |= (intmask &
|
||||
fRegisters->interrupt_status |= (intmask &
|
||||
(SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM));
|
||||
TRACE("Card presence interrupt handled\n");
|
||||
|
||||
@@ -358,8 +480,9 @@ sdhci_generic_interrupt(void* data)
|
||||
|
||||
// handling command interrupt
|
||||
if (intmask & SDHCI_INT_CMD_MASK) {
|
||||
bus->fRegisters->interrupt_status |= (intmask & SDHCI_INT_CMD_MASK);
|
||||
// TODO do something with the interrupt
|
||||
fRegisters->interrupt_status |= (intmask & SDHCI_INT_CMD_MASK);
|
||||
// Notify the thread
|
||||
release_sem_etc(fSemaphore, 1, B_DO_NOT_RESCHEDULE);
|
||||
TRACE("Command interrupt handled\n");
|
||||
|
||||
return B_HANDLED_INTERRUPT;
|
||||
@@ -367,17 +490,15 @@ sdhci_generic_interrupt(void* data)
|
||||
|
||||
// handling bus power interrupt
|
||||
if (intmask & SDHCI_INT_BUS_POWER) {
|
||||
bus->fRegisters->interrupt_status |= SDHCI_INT_BUS_POWER;
|
||||
fRegisters->interrupt_status |= SDHCI_INT_BUS_POWER;
|
||||
TRACE("card is consuming too much power\n");
|
||||
|
||||
return B_HANDLED_INTERRUPT;
|
||||
}
|
||||
|
||||
intmask = bus->fRegisters->slot_interrupt_status;
|
||||
intmask = fRegisters->slot_interrupt_status;
|
||||
if (intmask != 0) {
|
||||
ERROR("Remaining interrupts at end of handler: %x\n", intmask);
|
||||
intmask &= ~(SDHCI_INT_BUS_POWER | SDHCI_INT_CARD_INS
|
||||
| SDHCI_INT_CARD_REM | SDHCI_INT_CMD_MASK);
|
||||
}
|
||||
|
||||
return B_UNHANDLED_INTERRUPT;
|
||||
@@ -403,7 +524,6 @@ register_child_devices(void* cookie)
|
||||
|
||||
gDeviceManager->get_driver(parent, (driver_module_info**)&pci,
|
||||
(void**)&device);
|
||||
uint16 pciSubDeviceId = pci->read_pci_config(device, PCI_subsystem_id, 2);
|
||||
slotsInfo = pci->read_pci_config(device, SDHCI_PCI_SLOT_INFO, 1);
|
||||
bar = SDHCI_PCI_SLOT_INFO_FIRST_BASE_INDEX(slotsInfo);
|
||||
slots_count = SDHCI_PCI_SLOTS(slotsInfo);
|
||||
@@ -411,28 +531,22 @@ register_child_devices(void* cookie)
|
||||
char prettyName[25];
|
||||
|
||||
if (slots_count > 6 || bar > 5) {
|
||||
TRACE("Invalid slots count: %d or BAR count: %d \n", slots_count, bar);
|
||||
ERROR("Invalid slots count: %d or BAR count: %d \n", slots_count, bar);
|
||||
return B_BAD_VALUE;
|
||||
}
|
||||
|
||||
for (uint8_t slot = 0; slot <= slots_count; slot++) {
|
||||
|
||||
bar = bar + slot;
|
||||
sprintf(prettyName, "SDHC bus %" B_PRIu16 " slot %"
|
||||
B_PRIu8, pciSubDeviceId, slot);
|
||||
sprintf(prettyName, "SDHC bus %" B_PRIu8, slot);
|
||||
device_attr attrs[] = {
|
||||
// properties of this controller for SDHCI bus manager
|
||||
{ B_DEVICE_PRETTY_NAME, B_STRING_TYPE,
|
||||
{ string: prettyName }},
|
||||
{ B_DEVICE_PRETTY_NAME, B_STRING_TYPE, { string: prettyName } },
|
||||
{ B_DEVICE_FIXED_CHILD, B_STRING_TYPE,
|
||||
{string: SDHCI_BUS_CONTROLLER_MODULE_NAME}},
|
||||
{SDHCI_DEVICE_TYPE_ITEM, B_UINT16_TYPE,
|
||||
{ ui16: pciSubDeviceId}},
|
||||
{B_DEVICE_BUS, B_STRING_TYPE,{string: "mmc"}},
|
||||
{SLOT_NUMBER, B_UINT8_TYPE,
|
||||
{ ui8: slot}},
|
||||
{BAR_INDEX, B_UINT8_TYPE,
|
||||
{ ui8: bar}},
|
||||
{string: MMC_BUS_MODULE_NAME} },
|
||||
{ B_DEVICE_BUS, B_STRING_TYPE, {string: "mmc"} },
|
||||
{ SLOT_NUMBER, B_UINT8_TYPE, { ui8: slot} },
|
||||
{ BAR_INDEX, B_UINT8_TYPE, { ui8: bar} },
|
||||
{ NULL }
|
||||
};
|
||||
if (gDeviceManager->register_node(node, SDHCI_PCI_MMC_BUS_MODULE_NAME,
|
||||
@@ -477,11 +591,14 @@ supports_device(device_node* parent)
|
||||
if (gDeviceManager->get_attr_string(parent, B_DEVICE_BUS, &bus, false)
|
||||
!= B_OK || gDeviceManager->get_attr_uint16(parent, B_DEVICE_SUB_TYPE,
|
||||
&subType, false) < B_OK || gDeviceManager->get_attr_uint16(parent,
|
||||
B_DEVICE_TYPE, &type, false) < B_OK)
|
||||
B_DEVICE_TYPE, &type, false) < B_OK) {
|
||||
ERROR("Could not find required attribute device/bus\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (strcmp(bus, "pci") != 0)
|
||||
return 0.0f;
|
||||
}
|
||||
|
||||
if (type == PCI_base_peripheral) {
|
||||
if (subType != PCI_sd_host)
|
||||
@@ -501,14 +618,34 @@ supports_device(device_node* parent)
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
set_clock(void* controller, uint32_t kilohertz)
|
||||
{
|
||||
SdhciBus* bus = (SdhciBus*)controller;
|
||||
bus->SetClock(kilohertz);
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
execute_command(void* controller, uint8_t command, uint32_t argument,
|
||||
uint32_t* response)
|
||||
{
|
||||
SdhciBus* bus = (SdhciBus*)controller;
|
||||
return bus->ExecuteCommand(command, argument, response);
|
||||
}
|
||||
|
||||
|
||||
module_dependency module_dependencies[] = {
|
||||
{ SDHCI_BUS_CONTROLLER_MODULE_NAME, (module_info**)&gSDHCIDeviceController},
|
||||
{ MMC_BUS_MODULE_NAME, (module_info**)&gMMCBusController},
|
||||
{ B_DEVICE_MANAGER_MODULE_NAME, (module_info**)&gDeviceManager },
|
||||
{}
|
||||
};
|
||||
|
||||
|
||||
static sdhci_mmc_bus_interface gSDHCIPCIDeviceModule = {
|
||||
// Device node registered for each SD slot. It implements the MMC operations so
|
||||
// the bus manager can use it to communicate with SD cards.
|
||||
static mmc_bus_interface gSDHCIPCIDeviceModule = {
|
||||
{
|
||||
{
|
||||
SDHCI_PCI_MMC_BUS_MODULE_NAME,
|
||||
@@ -522,10 +659,15 @@ static sdhci_mmc_bus_interface gSDHCIPCIDeviceModule = {
|
||||
NULL, // register child devices
|
||||
NULL, // rescan
|
||||
bus_removed,
|
||||
}
|
||||
},
|
||||
|
||||
set_clock,
|
||||
execute_command,
|
||||
};
|
||||
|
||||
|
||||
// Root device that binds to the PCI bus. It will register an mmc_bus_interface
|
||||
// node for each SD slot in the device.
|
||||
static driver_module_info sSDHCIDevice = {
|
||||
{
|
||||
SDHCI_PCI_DEVICE_MODULE_NAME,
|
||||
|
||||
@@ -25,11 +25,18 @@ class Command {
|
||||
public:
|
||||
uint16_t Bits() { return fBits; }
|
||||
|
||||
void SendCommand(uint8_t command, bool data)
|
||||
void SendCommand(uint8_t command, uint8_t type)
|
||||
{
|
||||
fBits = (command << 8) | (data << 5);
|
||||
fBits = (command << 8) | type;
|
||||
}
|
||||
|
||||
static const uint8_t kNoReplyType = 0;
|
||||
static const uint8_t kR1Type = 0x1C;
|
||||
static const uint8_t kR2Type = 0x09;
|
||||
static const uint8_t kR3Type = 0x02;
|
||||
static const uint8_t kR6Type = 0x1C;
|
||||
static const uint8_t kR7Type = 0x3C;
|
||||
|
||||
private:
|
||||
volatile uint16_t fBits;
|
||||
} __attribute__((packed));
|
||||
@@ -43,6 +50,7 @@ class PresentState {
|
||||
uint32_t Bits() { return fBits; }
|
||||
|
||||
bool IsCardInserted() { return fBits & (1 << 16); }
|
||||
bool CommandInhibit() { return fBits & (1 << 0); }
|
||||
|
||||
private:
|
||||
volatile uint32_t fBits;
|
||||
@@ -166,7 +174,7 @@ struct registers {
|
||||
Command command;
|
||||
|
||||
// Response
|
||||
volatile uint16_t response[8];
|
||||
volatile uint32_t response[4];
|
||||
|
||||
// Buffer Data Port
|
||||
volatile uint32_t buffer_data_port;
|
||||
@@ -249,25 +257,6 @@ struct registers {
|
||||
|
||||
typedef void* sdhci_mmc_bus;
|
||||
|
||||
#define DELAY(n) snooze(n)
|
||||
|
||||
#define SDHCI_BUS_CONTROLLER_MODULE_NAME "bus_managers/mmc_bus/driver_v1"
|
||||
|
||||
#define MMC_BUS_MODULE_NAME "bus_managers/mmc_bus/device/v1"
|
||||
|
||||
static void sdhci_register_dump(uint8_t, struct registers*);
|
||||
static void sdhci_reset(struct registers*);
|
||||
static void sdhci_set_clock(struct registers*);
|
||||
static void sdhci_set_power(struct registers*);
|
||||
static void sdhci_stop_clock(struct registers*);
|
||||
void sdhci_error_interrupt_recovery(struct registers*);
|
||||
|
||||
status_t sdhci_generic_interrupt(void*);
|
||||
|
||||
typedef struct {
|
||||
driver_module_info info;
|
||||
|
||||
} sdhci_mmc_bus_interface;
|
||||
|
||||
|
||||
#endif /*_SDHCI_PCI_H*/
|
||||
|
||||
Reference in New Issue
Block a user