NVidia: 64bit fixes.
This commit is contained in:
@@ -60,7 +60,7 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space)
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switch (a_color_space)
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{
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default:
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return
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return
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( B_OVERLAY_KEYING_USES_ALPHA |
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B_OVERLAY_COLOR_KEY |
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B_OVERLAY_HORIZONTAL_FILTERING |
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@@ -68,19 +68,21 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space)
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}
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}
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const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint16 height)
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const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width,
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uint16 height)
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{
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int offset = 0; /* used to determine next buffer to create */
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uint32 adress, adress2, temp32; /* used to calculate buffer adresses */
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uintptr_t adress, adress2, temp32; /* used to calculate buffer adresses */
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uint32 oldsize = 0; /* used to 'squeeze' new buffers between already existing ones */
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int cnt; /* loopcounter */
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/* acquire the shared benaphore */
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AQUIRE_BEN(si->overlay.lock)
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LOG(4,("Overlay: cardRAM_start = $%08x\n",(uint32)((uint8*)si->framebuffer)));
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LOG(4,("Overlay: cardRAM_start_DMA = $%08x\n",(uint32)((uint8*)si->framebuffer_pci)));
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LOG(4,("Overlay: cardRAM_size = %3.3fMb\n",(si->ps.memory_size / (1024.0 * 1024.0))));
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LOG(4, ("Overlay: cardRAM_start = $%p\n", (uint8*)si->framebuffer));
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LOG(4, ("Overlay: cardRAM_start_DMA = $%p\n", (uint8*)si->framebuffer_pci));
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LOG(4, ("Overlay: cardRAM_size = %3.3fMb\n", (si->ps.memory_size / (1024.0 * 1024.0))));
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/* find first empty slot (room for another buffer?) */
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for (offset = 0; offset < MAXBUFFERS; offset++)
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@@ -88,7 +90,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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if (si->overlay.myBuffer[offset].buffer == NULL) break;
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}
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LOG(4,("Overlay: Allocate_buffer offset = %d\n",offset));
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LOG(4, ("Overlay: Allocate_buffer offset = %d\n", offset));
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if (offset < MAXBUFFERS)
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/* setup new scaler input buffer */
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@@ -100,9 +102,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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{
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/* check if slopspace is needed: RIVA128 and TNT need ~0x000f. */
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si->overlay.myBuffer[offset].width = ((width + 0x000f) & ~0x000f);
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}
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else
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{
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} else {
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/* check if slopspace is needed: GeForce need ~0x001f. */
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/* fixme:
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* update needed for GF DVDmax support to adhere to CRTC2 constraints?? */
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@@ -114,7 +114,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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//fixme: tune for GF and TNT...
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if (si->overlay.myBuffer[offset].width > 4088)
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{
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LOG(4,("Overlay: Sorry, requested buffer pitch not supported, aborted\n"));
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LOG(4, ("Overlay: Sorry, requested buffer pitch not supported, aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -124,7 +124,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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break;
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default:
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/* unsupported colorspace! */
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LOG(4,("Overlay: Sorry, colorspace $%08x not supported, aborted\n",cs));
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LOG(4, ("Overlay: Sorry, colorspace $%08x not supported, aborted\n",cs));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -141,7 +141,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* check if the requested buffer width is supported */
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if (si->overlay.myBuffer[offset].width > 1024) {
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LOG(4,("Overlay: Sorry, requested buffer width not supported, aborted\n"));
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LOG(4, ("Overlay: Sorry, requested buffer width not supported, aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -149,7 +149,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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}
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/* check if the requested buffer height is supported */
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if (height > 1024) {
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LOG(4,("Overlay: Sorry, requested buffer height not supported, aborted\n"));
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LOG(4, ("Overlay: Sorry, requested buffer height not supported, aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -161,7 +161,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* check if the requested buffer width is supported */
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if (si->overlay.myBuffer[offset].width > 1920) {
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LOG(4,("Overlay: Sorry, requested buffer width not supported, aborted\n"));
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LOG(4, ("Overlay: Sorry, requested buffer width not supported, aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -169,7 +169,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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}
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/* check if the requested buffer height is supported */
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if (height > 1080) {
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LOG(4,("Overlay: Sorry, requested buffer height not supported, aborted\n"));
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LOG(4, ("Overlay: Sorry, requested buffer height not supported, aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -183,7 +183,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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si->overlay.myBuffer[offset].space = cs;
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si->overlay.myBuffer[offset].height = height;
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/* we define the overlay buffers to reside 'in the back' of the cards RAM */
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/* NOTE to app programmers:
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* Beware that an app using overlay needs to track workspace switches and screenprefs
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@@ -200,22 +200,22 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* Another NOTE for app programmers:
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* A *positive* side-effect of assigning the first overlay buffer exactly at the end of the
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* cardRAM is that apps that try to write beyond the buffer's space get a segfault immediately.
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* This *greatly* simplifies tracking such errors!
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* This *greatly* simplifies tracking such errors!
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* Of course such errors may lead to strange effects in the app or driver behaviour if they are
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* not hunted down and removed.. */
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/* calculate first free RAM adress in card:
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* Driver setup is as follows:
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* Driver setup is as follows:
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* card base: - hardware cursor bitmap (if used),
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* directly above - screen memory for both heads */
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adress2 = (((uint32)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */
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adress2 = (((uintptr_t)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */
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(si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */
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LOG(4,("Overlay: first free cardRAM virtual adress $%08x\n", adress2));
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LOG(4, ("Overlay: first free cardRAM virtual adress $%08x\n", adress2));
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/* calculate 'preliminary' buffer size including slopspace */
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oldsize = si->overlay.myBufInfo[offset].size;
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si->overlay.myBufInfo[offset].size =
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si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
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si->overlay.myBufInfo[offset].size
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= si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
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/* calculate virtual memory adress that would be needed for a new bitmap */
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/* NOTE to app programmers:
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@@ -228,7 +228,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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* If you switch now to settings: 1600x1200x32bit (single head) the app needs to fallback to
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* bitmap output or maybe single buffered overlay output if small bitmaps are used. */
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adress = (((uint32)((uint8*)si->framebuffer)) + si->ps.memory_size);
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adress = (((uintptr_t)((uint8*)si->framebuffer)) + si->ps.memory_size);
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/* Keep some extra distance as a workaround for certain bugs (see
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* DriverInterface.h for an explanation). */
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if (si->ps.card_arch < NV40A)
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@@ -246,7 +246,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* Check if we need to modify the buffers starting adress and thus the size */
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/* calculate 'would be' cardRAM offset */
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temp32 = (adress - ((uint32)((vuint32 *)si->framebuffer)));
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temp32 = (adress - ((uintptr_t)((vuint32 *)si->framebuffer)));
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/* check if it is aligned */
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if (temp32 != (temp32 & 0xfffffff0))
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{
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@@ -255,19 +255,19 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* update the (already calculated) adress to get it aligned */
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adress -= (temp32 - (temp32 & 0xfffffff0));
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}
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LOG(4,("Overlay: new buffer needs virtual adress $%08x\n", adress));
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LOG(4, ("Overlay: new buffer needs virtual adress $%08x\n", adress));
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/* First check now if buffer to be defined is 'last one' in memory (speaking backwards):
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* this is done to prevent a large buffer getting created in the space a small buffer
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* occupied earlier, if not all buffers created were deleted.
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* Note also that the app can delete the buffers in any order desired. */
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/* NOTE to app programmers:
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/* NOTE to app programmers:
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* If you are going to delete a overlay buffer you created, you should delete them *all* and
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* then re-create only the new ones needed. This way you are sure not to get unused memory-
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* space in between your overlay buffers for instance, so cardRAM is used 'to the max'.
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* If you don't, you might not get a buffer at all if you are trying to set up a larger one
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* than before.
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* than before.
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* (Indeed: not all buffers *have* to be of the same type and size...) */
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for (cnt = offset; cnt < MAXBUFFERS; cnt++)
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@@ -285,12 +285,10 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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"Overlay: resetting it to virtual adress $%08x and size $%08x\n", adress,oldsize));
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/* force exiting the FOR loop */
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cnt = MAXBUFFERS;
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}
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else
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{
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} else {
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/* nogo, sorry */
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LOG(4,("Overlay: Other buffer(s) exist after this one:\n"
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"Overlay: not enough space to 'squeeze' this one in, aborted\n"));
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LOG(4, ("Overlay: Other buffer(s) exist after this one:\n"
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"Overlay: not enough space to 'squeeze' this one in, aborted\n"));
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/* Reset to the old size to prevent the space from 'growing' if we get here again... */
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si->overlay.myBufInfo[offset].size = oldsize;
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@@ -303,23 +301,23 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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}
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}
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/* check if we have enough space to setup this new bitmap
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/* check if we have enough space to setup this new bitmap
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* (preventing overlap of desktop RAMspace & overlay bitmap RAMspace here) */
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if (adress < adress2)
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/* nope, sorry */
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{
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LOG(4,("Overlay: Sorry, no more space for buffers: aborted\n"));
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LOG(4, ("Overlay: Sorry, no more space for buffers: aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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return NULL;
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}
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/* continue buffer setup */
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/* continue buffer setup */
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si->overlay.myBuffer[offset].buffer = (void *) adress;
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/* calculate physical memory adress (for dma use) */
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adress = (((uint32)((uint8*)si->framebuffer_pci)) + si->ps.memory_size);
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adress = (((uintptr_t)((uint8*)si->framebuffer_pci)) + si->ps.memory_size);
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/* Keep some extra distance as a workaround for certain bugs (see
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* DriverInterface.h for an explanation). */
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if (si->ps.card_arch < NV40A)
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@@ -334,20 +332,18 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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/* this adress is already aligned to the scaler's requirements (via the already modified sizes) */
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si->overlay.myBuffer[offset].buffer_dma = (void *) adress;
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LOG(4,("Overlay: New buffer: addr $%08x, dma_addr $%08x, color space $%08x\n",
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(uint32)((uint8*)si->overlay.myBuffer[offset].buffer),
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(uint32)((uint8*)si->overlay.myBuffer[offset].buffer_dma), cs));
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LOG(4,("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size));
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LOG(4, ("Overlay: New buffer: addr $%p, dma_addr $%p, color space $%08x\n",
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(uint8*)si->overlay.myBuffer[offset].buffer,
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(uint8*)si->overlay.myBuffer[offset].buffer_dma, cs));
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LOG(4, ("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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return &si->overlay.myBuffer[offset];
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}
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else
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/* sorry, no more room for buffers */
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{
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LOG(4,("Overlay: Sorry, no more space for buffers: aborted\n"));
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} else {
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/* sorry, no more room for buffers */
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LOG(4, ("Overlay: Sorry, no more space for buffers: aborted\n"));
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/* release the shared benaphore */
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RELEASE_BEN(si->overlay.lock)
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@@ -356,6 +352,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
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}
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}
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status_t RELEASE_OVERLAY_BUFFER(const overlay_buffer *ob)
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/* Note that the user can delete the buffers in any order desired! */
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{
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@@ -513,7 +513,7 @@ status_t nv_acc_init_dma()
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ACCW(PR_CTX0_C, 0x00023002);
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}
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ACCW(PR_CTX1_C, 0x000fffff); /* DMA limit: tablesize is 1M bytes */
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ACCW(PR_CTX2_C, (((uint32)((uint8 *)(si->dma_buffer_pci))) | 0x00000002));
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ACCW(PR_CTX2_C, (((uintptr_t)((uint8 *)(si->dma_buffer_pci))) | 0x00000002));
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/* DMA access type is READ_AND_WRITE;
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* table is located in main system RAM (b12-31):
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* It's adress needs to be at a 4kb boundary! */
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@@ -1042,18 +1042,17 @@ status_t nv_acc_init_dma()
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* b0-1 aren't used as adressbits. Using b0 to indicate a valid pointer. */
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for (cnt = 0; cnt < 0x08; cnt++)
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{
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si->engine.fifo.ch_ptr[(si->engine.fifo.handle[cnt])] =
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(0x00000001 + (cnt * 0x00002000));
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si->engine.fifo.ch_ptr[(si->engine.fifo.handle[cnt])]
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= (0x00000001 + (cnt * 0x00002000));
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}
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/*** init DMA command buffer info ***/
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if (si->ps.card_arch >= NV40A) //main mem DMA buf on pre-NV40
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{
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si->dma_buffer = (void *)((char *)si->framebuffer +
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((si->ps.memory_size - 1) & 0xffff8000));
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si->dma_buffer = (void *)((char *)si->framebuffer
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+ ((si->ps.memory_size - 1) & 0xffff8000));
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}
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LOG(4,("ACC_DMA: command buffer is at adress $%08x\n",
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((uint32)(si->dma_buffer))));
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LOG(4, ("ACC_DMA: command buffer is at adress $%p\n", si->dma_buffer));
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/* we have issued no DMA cmd's to the engine yet */
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si->engine.dma.put = 0;
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/* the current first free adress in the DMA buffer is at offset 0 */
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@@ -1076,9 +1075,7 @@ status_t nv_acc_init_dma()
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if (si->ps.card_arch >= NV40A)
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{
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if (nv_acc_fifofree_dma(12) != B_OK) return B_ERROR;
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}
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else
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{
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} else {
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if (nv_acc_fifofree_dma(16) != B_OK) return B_ERROR;
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}
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@@ -1888,9 +1885,10 @@ void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(engine_token *et, scaled_blit_par
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si->engine.threeD.reload = 0xffffffff;
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}
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/* scaled and filtered screen to screen blit - i.e. video playback without overlay */
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/* note: source and destination may not overlap. */
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//fixme? checkout NV5 and NV10 version of cmd: faster?? (or is 0x77 a 'autoselect' version?)
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// FIXME? checkout NV5 and NV10 version of cmd: faster?? (or is 0x77 a 'autoselect' version?)
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void OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(
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engine_token *et, offscreen_buffer_config *config, clipped_scaled_blit_params *list, uint32 count)
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{
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@@ -1898,11 +1896,12 @@ void OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(
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uint32 cmd_depth;
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uint8 bpp;
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LOG(4,("ACC_DMA: offscreen src buffer location $%08x\n", (uint32)((uint8*)(config->buffer))));
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LOG(4, ("ACC_DMA: offscreen src buffer location $%p\n",
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(uint8*)(config->buffer)));
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/*** init acc engine for scaled filtered blit function ***/
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/* Set pixel width */
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switch(config->space)
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switch (config->space)
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{
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case B_RGB15_LITTLE:
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cmd_depth = 0x00000002;
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@@ -17,7 +17,7 @@ nv_agp_setup(bool enable_agp)
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nv_nth_agp_info nai;
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nv_cmd_agp nca;
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uint8 index;
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agp_info nv_ai;
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agp_info nv_ai = {0};
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bool agp = false;
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/* preset we are running in PCI mode: so acc engine may not use AGP transfers */
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@@ -13,7 +13,7 @@ struct move_overlay_info
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uint32 vcoordv; /* top and bottom edges of video output window */
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uint32 hsrcstv; /* horizontal source start in source buffer (clipping) */
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uint32 v1srcstv; /* vertical source start in source buffer (clipping) */
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uint32 a1orgv; /* alternate source clipping via startadress of source buffer */
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uintptr_t a1orgv; /* alternate source clipping via startadress of source buffer */
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};
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static void nv_bes_calc_move_overlay(move_overlay_info *moi);
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@@ -235,9 +235,9 @@ static void nv_bes_calc_move_overlay(move_overlay_info *moi)
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*******************************/
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/* calculate inputbitmap origin adress */
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moi->a1orgv = (uint32)((vuint32 *)si->overlay.ob.buffer);
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moi->a1orgv -= (uint32)((vuint32 *)si->framebuffer);
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LOG(4,("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv));
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moi->a1orgv = (uintptr_t)((vuint32 *)si->overlay.ob.buffer);
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moi->a1orgv -= (uintptr_t)((vuint32 *)si->framebuffer);
|
||||
LOG(4, ("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv));
|
||||
|
||||
/* Setup vertical source start: first (sub)pixel contributing to output picture. */
|
||||
/* Note:
|
||||
|
||||
@@ -312,6 +312,7 @@ static void nv_dac_dump_pix_pll(void)
|
||||
DACW(PLLSEL, 0x10000700);
|
||||
}
|
||||
|
||||
|
||||
/* find nearest valid pix pll */
|
||||
status_t nv_dac_pix_pll_find
|
||||
(display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
|
||||
@@ -322,17 +323,19 @@ status_t nv_dac_pix_pll_find
|
||||
return B_ERROR;
|
||||
}
|
||||
|
||||
|
||||
/* find nearest valid pixel PLL setting */
|
||||
static status_t nv4_nv10_nv20_dac_pix_pll_find(
|
||||
display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
|
||||
display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
|
||||
uint8* p_result, uint8 test)
|
||||
{
|
||||
int m = 0, n = 0, p = 0/*, m_max*/;
|
||||
float error, error_best = 999999999;
|
||||
int best[3];
|
||||
float error, error_best = INFINITY;
|
||||
int best[3] = {0, 0, 0};
|
||||
float f_vco, max_pclk;
|
||||
float req_pclk = target.timing.pixel_clock/1000.0;
|
||||
|
||||
LOG(4,("DAC: NV4/NV10/NV20 restrictions apply\n"));
|
||||
LOG(4, ("DAC: NV4/NV10/NV20 restrictions apply\n"));
|
||||
|
||||
/* determine the max. pixelclock for the current videomode */
|
||||
switch (target.space)
|
||||
@@ -473,19 +476,20 @@ static status_t nv4_nv10_nv20_dac_pix_pll_find(
|
||||
|
||||
/* find nearest valid system PLL setting */
|
||||
status_t nv_dac_sys_pll_find(
|
||||
float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result, uint8* p_result, uint8 test)
|
||||
float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result,
|
||||
uint8* p_result, uint8 test)
|
||||
{
|
||||
int m = 0, n = 0, p = 0, m_max, p_max;
|
||||
float error, error_best = 999999999;
|
||||
int best[3];
|
||||
float error, error_best = INFINITY;
|
||||
int best[3] = {0, 0, 0};
|
||||
float f_vco, discr_low, discr_high;
|
||||
|
||||
/* determine the max. reference-frequency postscaler setting for the
|
||||
/* determine the max. reference-frequency postscaler setting for the
|
||||
* current requested clock */
|
||||
switch (si->ps.card_arch)
|
||||
{
|
||||
case NV04A:
|
||||
LOG(4,("DAC: NV04 restrictions apply\n"));
|
||||
LOG(4, ("DAC: NV04 restrictions apply\n"));
|
||||
/* set phase-discriminator frequency range (Mhz) (verified) */
|
||||
discr_low = 1.0;
|
||||
discr_high = 2.0;
|
||||
@@ -499,7 +503,7 @@ status_t nv_dac_sys_pll_find(
|
||||
{
|
||||
case NV28:
|
||||
//fixme: how about some other cards???
|
||||
LOG(4,("DAC: NV28 restrictions apply\n"));
|
||||
LOG(4, ("DAC: NV28 restrictions apply\n"));
|
||||
/* set max. useable reference frequency postscaler divider factor;
|
||||
* apparantly we would get distortions on high PLL output frequencies if
|
||||
* we use the phase-discriminator at low frequencies */
|
||||
@@ -515,7 +519,7 @@ status_t nv_dac_sys_pll_find(
|
||||
discr_high = 27.0;
|
||||
break;
|
||||
default:
|
||||
LOG(4,("DAC: NV10/NV20/NV30 restrictions apply\n"));
|
||||
LOG(4, ("DAC: NV10/NV20/NV30 restrictions apply\n"));
|
||||
/* set max. useable reference frequency postscaler divider factor;
|
||||
* apparantly we would get distortions on high PLL output frequencies if
|
||||
* we use the phase-discriminator at low frequencies */
|
||||
@@ -535,23 +539,23 @@ status_t nv_dac_sys_pll_find(
|
||||
break;
|
||||
}
|
||||
|
||||
LOG(4,("DAC: PLL reference frequency postscaler divider range is 1 - %d\n", m_max));
|
||||
LOG(4,("DAC: PLL VCO output postscaler divider range is 1 - %d\n", p_max));
|
||||
LOG(4,("DAC: PLL discriminator input frequency range is %2.2fMhz - %2.2fMhz\n",
|
||||
LOG(4, ("DAC: PLL reference frequency postscaler divider range is 1 - %d\n", m_max));
|
||||
LOG(4, ("DAC: PLL VCO output postscaler divider range is 1 - %d\n", p_max));
|
||||
LOG(4, ("DAC: PLL discriminator input frequency range is %2.2fMhz - %2.2fMhz\n",
|
||||
discr_low, discr_high));
|
||||
|
||||
/* Make sure the requested clock is within the PLL's operational limits */
|
||||
/* lower limit is min_system_vco divided by highest postscaler-factor */
|
||||
if (req_sclk < (si->ps.min_system_vco / ((float)p_max)))
|
||||
{
|
||||
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
|
||||
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
|
||||
req_sclk, (si->ps.min_system_vco / ((float)p_max))));
|
||||
req_sclk = (si->ps.min_system_vco / ((float)p_max));
|
||||
}
|
||||
/* upper limit is given by pins */
|
||||
if (req_sclk > si->ps.max_system_vco)
|
||||
{
|
||||
LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
|
||||
LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n",
|
||||
req_sclk, (float)si->ps.max_system_vco));
|
||||
req_sclk = si->ps.max_system_vco;
|
||||
}
|
||||
|
||||
@@ -280,17 +280,19 @@ status_t nv_dac2_pix_pll_find
|
||||
return B_ERROR;
|
||||
}
|
||||
|
||||
|
||||
/* find nearest valid pixel PLL setting */
|
||||
static status_t nv10_nv20_dac2_pix_pll_find(
|
||||
display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
|
||||
display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result,
|
||||
uint8* p_result, uint8 test)
|
||||
{
|
||||
int m = 0, n = 0, p = 0/*, m_max*/;
|
||||
float error, error_best = 999999999;
|
||||
int best[3];
|
||||
float error, error_best = INFINITY;
|
||||
int best[3] = {0, 0, 0};
|
||||
float f_vco, max_pclk;
|
||||
float req_pclk = target.timing.pixel_clock/1000.0;
|
||||
|
||||
LOG(4,("DAC2: NV10/NV20 restrictions apply\n"));
|
||||
LOG(4, ("DAC2: NV10/NV20 restrictions apply\n"));
|
||||
|
||||
/* determine the max. pixelclock for the current videomode */
|
||||
switch (target.space)
|
||||
|
||||
@@ -133,6 +133,7 @@ status_t parse_pins ()
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
static status_t pins2_read(uint8 *rom, uint32 offset)
|
||||
{
|
||||
uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256);
|
||||
@@ -141,20 +142,26 @@ static status_t pins2_read(uint8 *rom, uint32 offset)
|
||||
/* confirmed by comparing cards */
|
||||
uint16 ram_tab = init1 - 0x0010;
|
||||
/* fixme: PPC BIOSes (might) return NULL pointers for messages here */
|
||||
char* signon_msg = &(rom[(rom[offset + 24] + (rom[offset + 25] * 256))]);
|
||||
char* vendor_name = &(rom[(rom[offset + 40] + (rom[offset + 41] * 256))]);
|
||||
char* product_name = &(rom[(rom[offset + 42] + (rom[offset + 43] * 256))]);
|
||||
char* product_rev = &(rom[(rom[offset + 44] + (rom[offset + 45] * 256))]);
|
||||
unsigned char* signon_msg
|
||||
= &(rom[(rom[offset + 24] + (rom[offset + 25] * 256))]);
|
||||
unsigned char* vendor_name
|
||||
= &(rom[(rom[offset + 40] + (rom[offset + 41] * 256))]);
|
||||
unsigned char* product_name
|
||||
= &(rom[(rom[offset + 42] + (rom[offset + 43] * 256))]);
|
||||
unsigned char* product_rev
|
||||
= &(rom[(rom[offset + 44] + (rom[offset + 45] * 256))]);
|
||||
|
||||
LOG(8,("INFO: cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2, init_size));
|
||||
LOG(8,("INFO: signon msg:\n%s\n", signon_msg));
|
||||
LOG(8,("INFO: vendor name: %s\n", vendor_name));
|
||||
LOG(8,("INFO: product name: %s\n", product_name));
|
||||
LOG(8,("INFO: product rev: %s\n", product_rev));
|
||||
LOG(8, ("INFO: cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2,
|
||||
init_size));
|
||||
LOG(8, ("INFO: signon msg:\n%s\n", signon_msg));
|
||||
LOG(8, ("INFO: vendor name: %s\n", vendor_name));
|
||||
LOG(8, ("INFO: product name: %s\n", product_name));
|
||||
LOG(8, ("INFO: product rev: %s\n", product_rev));
|
||||
|
||||
return coldstart_card(rom, init1, init2, init_size, ram_tab);
|
||||
}
|
||||
|
||||
|
||||
static status_t pins3_5_read(uint8 *rom, uint32 offset)
|
||||
{
|
||||
uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256);
|
||||
@@ -163,16 +170,21 @@ static status_t pins3_5_read(uint8 *rom, uint32 offset)
|
||||
/* confirmed on a TNT2-M64 with pins V5.1 */
|
||||
uint16 ram_tab = rom[offset + 24] + (rom[offset + 25] * 256);
|
||||
/* fixme: PPC BIOSes (might) return NULL pointers for messages here */
|
||||
char* signon_msg = &(rom[(rom[offset + 30] + (rom[offset + 31] * 256))]);
|
||||
char* vendor_name = &(rom[(rom[offset + 46] + (rom[offset + 47] * 256))]);
|
||||
char* product_name = &(rom[(rom[offset + 48] + (rom[offset + 49] * 256))]);
|
||||
char* product_rev = &(rom[(rom[offset + 50] + (rom[offset + 51] * 256))]);
|
||||
unsigned char* signon_msg
|
||||
= &(rom[(rom[offset + 30] + (rom[offset + 31] * 256))]);
|
||||
unsigned char* vendor_name
|
||||
= &(rom[(rom[offset + 46] + (rom[offset + 47] * 256))]);
|
||||
unsigned char* product_name
|
||||
= &(rom[(rom[offset + 48] + (rom[offset + 49] * 256))]);
|
||||
unsigned char* product_rev
|
||||
= &(rom[(rom[offset + 50] + (rom[offset + 51] * 256))]);
|
||||
|
||||
LOG(8,("INFO: pre PINS 5.16 cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2, init_size));
|
||||
LOG(8,("INFO: signon msg:\n%s\n", signon_msg));
|
||||
LOG(8,("INFO: vendor name: %s\n", vendor_name));
|
||||
LOG(8,("INFO: product name: %s\n", product_name));
|
||||
LOG(8,("INFO: product rev: %s\n", product_rev));
|
||||
LOG(8, ("INFO: pre PINS 5.16 cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n",
|
||||
init1, init2, init_size));
|
||||
LOG(8, ("INFO: signon msg:\n%s\n", signon_msg));
|
||||
LOG(8, ("INFO: vendor name: %s\n", vendor_name));
|
||||
LOG(8, ("INFO: product name: %s\n", product_name));
|
||||
LOG(8, ("INFO: product rev: %s\n", product_rev));
|
||||
|
||||
/* pins 5.06 and higher has VCO range info */
|
||||
if (((rom[offset + 5]) == 5) && ((rom[offset + 6]) >= 0x06))
|
||||
|
||||
Reference in New Issue
Block a user